1 from parse
import Parse
2 from pprint
import pprint
5 # map pins to litex name conventions, primarily for use in coriolis2
6 # yes this is a mess. it'll do the job though. improvements later
7 def pinparse(psp
, pinspec
):
8 p
= Parse(pinspec
, verify
=False)
13 print (p
.muxed_cells_bank
)
19 pads
= {'N': pn
, 'S': ps
, 'E': pe
, 'W': pw
}
27 for (padnum
, name
, x
), bank
in zip(p
.muxed_cells
, p
.muxed_cells_bank
):
30 domain
= None # TODO, get this from the PinSpec. sigh
32 start
= p
.bankstart
[bank
]
33 banknum
= padnum
- start
34 print ("bank", bank
, banknum
, "padname", name
, padnum
, x
)
38 if name
.startswith('vss'):
39 name
= 'p_%s_' % name
[:-2] + name
[-1]
41 name
= 'ground_' + name
[-1]
44 name
= 'ioground_' + name
[-1]
48 elif name
.startswith('vdd'):
51 name
= 'power_' + name
[-1]
55 name
= 'iopower_' + name
[-1]
59 elif name
.startswith('sys'):
61 if name
== 'sys_pllclk':
62 pad
= ["p_"+name
, name
, name
]
63 elif name
== 'sys_rst':
65 pad
= [name
, name
, name
]
66 padbank
[banknum
] = name
67 print ("sys_rst add", bank
, banknum
, name
)
69 elif name
== 'sys_pllclk':
71 elif name
== 'sys_pllvcout':
72 name
= 'sys_pll_vco_o'
73 pad
= ['p_' + name
, name
, name
, "A"] # A for Analog
74 elif name
== 'sys_plltestout':
75 name
= 'sys_pll_testout_o'
76 pad
= ['p_' + name
, name
, name
]
77 elif name
.startswith('sys_pllsel'):
79 name2
= 'sys_clksel_i(%s)' % i
80 name
= 'p_sys_clksel_' + i
81 pad
= [name
, name2
, name2
]
83 # iopads.append([pname, name, name])
84 print ("sys pad", name
)
86 elif name
.startswith('mspi0') or name
.startswith('mspi1'):
93 if name
.startswith('mspi0'):
97 litex_name
= name
[:6] + suffix
98 name
= prefix
+ suffix
99 pad
= ['p_' + name
, name
, name
]
101 elif name
.startswith('sd0'):
103 if name
.startswith('sd0_d'):
105 name
= 'sdcard_data' + i
106 name2
= 'sdcard_data_%%s(%s)' % i
107 pad
= ['p_'+name
, name
, name2
% 'o', name2
% 'i', name2
% 'oe']
108 elif name
.startswith('sd0_cmd'):
110 name2
= 'sdcard_cmd_%s'
111 pad
= ['p_'+name
, name
, name2
% 'o', name2
% 'i', name2
% 'oe']
113 name
= 'sdcard_' + name
[4:]
114 pad
= ['p_' + name
, name
, name
]
115 litex_name
= orig_name
[:4] + "_".join(name
.split("_")[1:])
117 elif name
.startswith('sdr'):
119 if name
== 'sdr_clk':
121 pad
= ['p_' + name
, name
, name
]
122 elif name
.startswith('sdr_ad'):
124 name
= 'sdram_a_' + i
125 name2
= 'sdram_a(%s)' % i
126 pad
= ['p_' + name
, name2
, name2
]
127 elif name
.startswith('sdr_ba'):
129 name
= 'sdram_ba_' + i
130 name2
= 'sdram_ba(%s)' % i
131 pad
= ['p_' + name
, name2
, name2
]
132 elif name
.startswith('sdr_dqm'):
134 name
= 'sdram_dm_' + i
135 name2
= 'sdram_dm(%s)' % i
136 pad
= ['p_' + name
, name2
, name2
]
137 elif name
.startswith('sdr_d'):
139 name
= 'sdram_dq_' + i
140 name2
= 'sdram_dq_%%s(%s)' % i
141 pad
= ['p_'+name
, name
, name2
% 'o', name2
% 'i', name2
% 'oe']
142 elif name
== 'sdr_csn0':
144 pad
= ['p_' + name
, name
, name
]
145 elif name
[-1] == 'n':
146 name
= 'sdram_' + name
[4:-1] + '_n'
147 pad
= ['p_' + name
, name
, name
]
149 name
= 'sdram_' + name
[4:]
150 pad
= ['p_' + name
, name
, name
]
151 litex_name
= orig_name
[:4] + "_".join(name
.split("_")[1:])
153 elif name
.startswith('uart'):
155 name
= 'uart_' + name
[6:]
156 pad
= ['p_' + name
, name
, name
]
158 elif name
.startswith('gpio'):
163 name2
= 'gpio_%%s(%s)' % i
164 pad
= ['p_' + name
, name
, name2
% 'o', name2
% 'i', name2
% 'oe']
165 print ("GPIO pad", name
, pad
)
166 litex_name
= "gpio_%s" % gbank
+ "_".join(name
.split("_")[1:])
168 elif name
.startswith('mtwi'):
171 litex_name
= 'mtwi' + suffix
172 name
= 'i2c' + suffix
173 if name
.startswith('i2c_sda'):
175 pad
= ['p_'+name
, name
, name2
% 'o', name2
% 'i', name2
% 'oe']
176 print ("I2C pad", name
, pad
)
178 pad
= ['p_' + name
, name
, name
]
180 elif name
.startswith('twi'):
182 name
= 'i2c' + name
[3:]
184 pad
= ['p_'+name
, name
, name2
% 'o', name2
% 'i', name2
% 'oe']
185 print ("I2C pad", name
, pad
)
187 elif name
.startswith('eint'):
191 name2
= 'eint_%s' % i
192 pad
= ['p_' + name
, name2
, name2
]
194 elif name
.startswith('pwm'):
198 name2
= 'pwm(%s)' % i
199 pad
= ['p_' + name
, name2
, name2
]
201 pad
= ['p_' + name
, name
, name
]
202 print ("GPIO pad", name
, pad
)
204 if litex_name
is None:
208 if name
and name
.startswith('jtag'):
211 if name
and not name
.startswith('p_'):
212 if 'power' not in name
and 'ground' not in name
:
215 padbank
[banknum
] = name
217 if domain
is not None:
218 if domain
not in domains
:
220 domains
[domain
].append(name
)
222 if domain
in psp
.clocks
and orig_name
.startswith(dl
):
223 clk
= psp
.clocks
[domain
]
224 if clk
.lower() in orig_name
: # TODO, might over-match
225 clocks
[domain
] = name
227 pinmap
[orig_name
] = name
228 litexmap
[litex_name
] = name
231 if domain
and pad
is not None:
232 # append direction from spec/domain. damn awkward processing
234 fn
, name
= orig_name
.split("_")
239 for k
in psp
.byspec
.keys():
240 if k
.startswith(domain
):
242 print ("spec found", domain
, spec
)
243 assert spec
is not None
246 if pname
.lower().startswith(name
):
248 print ("found spec", found
)
249 assert found
is not None
250 # whewwww. add the direction onto the pad spec list
257 elif pad
is not None:
262 for pl
in [pe
, pw
, pn
, ps
]:
263 for i
in range(len(pl
)):
265 name
= 'nc_%d' % nc_idx
266 name2
= 'nc(%d)' % nc_idx
269 iopads
.append([name
, name2
, name2
, "-"])
285 print ("chip domains (excluding sys-default)")
287 print ("chip clocks (excluding sys-default)")
297 'pads.instances' : iopads
,
298 'pins.specs' : psp
.byspec
,
300 'litex.map' : litexmap
,
301 'chip.domains' : domains
,
302 'chip.clocks' : clocks
,
303 'chip.n_intpower': n_intpower
,
304 'chip.n_extpower': n_extpower
,