7cde69fc6f5e8fbe17b074b3c5ec57b3ad2ca29a
1 # Copyright (c) 2012-2013 ARM Limited
4 # The license below extends only to copyright in the software and shall
5 # not be construed as granting a license to any other intellectual
6 # property including but not limited to intellectual property relating
7 # to a hardware implementation of the functionality of the software
8 # licensed hereunder. You may use the software subject to the license
9 # terms below provided that you ensure that this notice is replicated
10 # unmodified and in its entirety in all distributions of the software,
11 # modified or unmodified, in source code or in binary form.
13 # Copyright (c) 2006-2007 The Regents of The University of Michigan
14 # Copyright (c) 2015 The University of Bologna
15 # All rights reserved.
17 # Redistribution and use in source and binary forms, with or without
18 # modification, are permitted provided that the following conditions are
19 # met: redistributions of source code must retain the above copyright
20 # notice, this list of conditions and the following disclaimer;
21 # redistributions in binary form must reproduce the above copyright
22 # notice, this list of conditions and the following disclaimer in the
23 # documentation and/or other materials provided with the distribution;
24 # neither the name of the copyright holders nor the names of its
25 # contributors may be used to endorse or promote products derived from
26 # this software without specific prior written permission.
28 # THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
29 # "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
30 # LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
31 # A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
32 # OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
33 # SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
34 # LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
35 # DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
36 # THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
37 # (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
38 # OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
40 from m5
.params
import *
41 from m5
.objects
.ClockedObject
import ClockedObject
43 # SerialLink is a simple variation of the Bridge class, with the ability to
44 # account for the latency of packet serialization.
46 class SerialLink(ClockedObject
):
48 cxx_header
= "mem/serial_link.hh"
49 mem_side_port
= RequestPort("This port sends requests and "
51 master
= DeprecatedParam(mem_side_port
,
52 '`master` is now called `mem_side_port`')
53 cpu_side_port
= ResponsePort("This port receives requests and "
55 slave
= DeprecatedParam(cpu_side_port
,
56 '`slave` is now called `cpu_side_port`')
57 req_size
= Param
.Unsigned(16, "The number of requests to buffer")
58 resp_size
= Param
.Unsigned(16, "The number of responses to buffer")
59 delay
= Param
.Latency('0ns', "The latency of this serial_link")
60 ranges
= VectorParam
.AddrRange([AllMemory
],
61 "Address ranges to pass through the serial_link")
62 # Bandwidth of the serial link is determined by the clock domain which the
63 # link belongs to and the number of lanes:
64 num_lanes
= Param
.Unsigned(1, "Number of parallel lanes inside the serial"
65 "link. (aka. lane width)")
66 link_speed
= Param
.UInt64(1, "Gb/s Speed of each parallel lane inside the"
67 "serial link. (aka. lane speed)")