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41 #include "mem/abstract_mem.hh"
45 #include "arch/locked_mem.hh"
46 #include "base/loader/memory_image.hh"
47 #include "base/loader/object_file.hh"
48 #include "cpu/thread_context.hh"
49 #include "debug/LLSC.hh"
50 #include "debug/MemoryAccess.hh"
51 #include "mem/packet_access.hh"
52 #include "sim/system.hh"
54 AbstractMemory::AbstractMemory(const Params
&p
) :
55 ClockedObject(p
), range(p
.range
), pmemAddr(NULL
),
56 backdoor(params().range
, nullptr,
57 (MemBackdoor::Flags
)(MemBackdoor::Readable
|
58 MemBackdoor::Writeable
)),
59 confTableReported(p
.conf_table_reported
), inAddrMap(p
.in_addr_map
),
60 kvmMap(p
.kvm_map
), _system(NULL
),
63 panic_if(!range
.valid() || !range
.size(),
64 "Memory range %s must be valid with non-zero size.",
69 AbstractMemory::initState()
71 ClockedObject::initState();
73 const auto &file
= params().image_file
;
77 auto *object
= Loader::createObjectFile(file
, true);
78 fatal_if(!object
, "%s: Could not load %s.", name(), file
);
80 Loader::debugSymbolTable
.insert(*object
->symtab().globals());
81 Loader::MemoryImage image
= object
->buildImage();
83 AddrRange
image_range(image
.minAddr(), image
.maxAddr());
84 if (!range
.contains(image_range
.start())) {
85 warn("%s: Moving image from %s to memory address range %s.",
86 name(), image_range
.to_string(), range
.to_string());
87 image
= image
.offset(range
.start());
88 image_range
= AddrRange(image
.minAddr(), image
.maxAddr());
90 panic_if(!image_range
.isSubset(range
), "%s: memory image %s doesn't fit.",
93 PortProxy
proxy([this](PacketPtr pkt
) { functionalAccess(pkt
); },
94 system()->cacheLineSize());
96 panic_if(!image
.write(proxy
), "%s: Unable to write image.");
100 AbstractMemory::setBackingStore(uint8_t* pmem_addr
)
102 // If there was an existing backdoor, let everybody know it's going away.
104 backdoor
.invalidate();
106 // The back door can't handle interleaved memory.
107 backdoor
.ptr(range
.interleaved() ? nullptr : pmem_addr
);
109 pmemAddr
= pmem_addr
;
112 AbstractMemory::MemStats::MemStats(AbstractMemory
&_mem
)
113 : Stats::Group(&_mem
), mem(_mem
),
114 ADD_STAT(bytesRead
, "Number of bytes read from this memory"),
115 ADD_STAT(bytesInstRead
,
116 "Number of instructions bytes read from this memory"),
117 ADD_STAT(bytesWritten
, "Number of bytes written to this memory"),
118 ADD_STAT(numReads
, "Number of read requests responded to by this memory"),
120 "Number of write requests responded to by this memory"),
121 ADD_STAT(numOther
, "Number of other requests responded to by this memory"),
122 ADD_STAT(bwRead
, "Total read bandwidth from this memory (bytes/s)"),
124 "Instruction read bandwidth from this memory (bytes/s)"),
125 ADD_STAT(bwWrite
, "Write bandwidth from this memory (bytes/s)"),
126 ADD_STAT(bwTotal
, "Total bandwidth to/from this memory (bytes/s)")
131 AbstractMemory::MemStats::regStats()
133 using namespace Stats
;
135 Stats::Group::regStats();
137 System
*sys
= mem
.system();
139 const auto max_requestors
= sys
->maxRequestors();
142 .init(max_requestors
)
143 .flags(total
| nozero
| nonan
)
145 for (int i
= 0; i
< max_requestors
; i
++) {
146 bytesRead
.subname(i
, sys
->getRequestorName(i
));
150 .init(max_requestors
)
151 .flags(total
| nozero
| nonan
)
153 for (int i
= 0; i
< max_requestors
; i
++) {
154 bytesInstRead
.subname(i
, sys
->getRequestorName(i
));
158 .init(max_requestors
)
159 .flags(total
| nozero
| nonan
)
161 for (int i
= 0; i
< max_requestors
; i
++) {
162 bytesWritten
.subname(i
, sys
->getRequestorName(i
));
166 .init(max_requestors
)
167 .flags(total
| nozero
| nonan
)
169 for (int i
= 0; i
< max_requestors
; i
++) {
170 numReads
.subname(i
, sys
->getRequestorName(i
));
174 .init(max_requestors
)
175 .flags(total
| nozero
| nonan
)
177 for (int i
= 0; i
< max_requestors
; i
++) {
178 numWrites
.subname(i
, sys
->getRequestorName(i
));
182 .init(max_requestors
)
183 .flags(total
| nozero
| nonan
)
185 for (int i
= 0; i
< max_requestors
; i
++) {
186 numOther
.subname(i
, sys
->getRequestorName(i
));
192 .flags(total
| nozero
| nonan
)
194 for (int i
= 0; i
< max_requestors
; i
++) {
195 bwRead
.subname(i
, sys
->getRequestorName(i
));
200 .prereq(bytesInstRead
)
201 .flags(total
| nozero
| nonan
)
203 for (int i
= 0; i
< max_requestors
; i
++) {
204 bwInstRead
.subname(i
, sys
->getRequestorName(i
));
209 .prereq(bytesWritten
)
210 .flags(total
| nozero
| nonan
)
212 for (int i
= 0; i
< max_requestors
; i
++) {
213 bwWrite
.subname(i
, sys
->getRequestorName(i
));
219 .flags(total
| nozero
| nonan
)
221 for (int i
= 0; i
< max_requestors
; i
++) {
222 bwTotal
.subname(i
, sys
->getRequestorName(i
));
225 bwRead
= bytesRead
/ simSeconds
;
226 bwInstRead
= bytesInstRead
/ simSeconds
;
227 bwWrite
= bytesWritten
/ simSeconds
;
228 bwTotal
= (bytesRead
+ bytesWritten
) / simSeconds
;
232 AbstractMemory::getAddrRange() const
237 // Add load-locked to tracking list. Should only be called if the
238 // operation is a load and the LLSC flag is set.
240 AbstractMemory::trackLoadLocked(PacketPtr pkt
)
242 const RequestPtr
&req
= pkt
->req
;
243 Addr paddr
= LockedAddr::mask(req
->getPaddr());
245 // first we check if we already have a locked addr for this
246 // xc. Since each xc only gets one, we just update the
247 // existing record with the new address.
248 std::list
<LockedAddr
>::iterator i
;
250 for (i
= lockedAddrList
.begin(); i
!= lockedAddrList
.end(); ++i
) {
251 if (i
->matchesContext(req
)) {
252 DPRINTF(LLSC
, "Modifying lock record: context %d addr %#x\n",
253 req
->contextId(), paddr
);
259 // no record for this xc: need to allocate a new one
260 DPRINTF(LLSC
, "Adding lock record: context %d addr %#x\n",
261 req
->contextId(), paddr
);
262 lockedAddrList
.push_front(LockedAddr(req
));
263 backdoor
.invalidate();
267 // Called on *writes* only... both regular stores and
268 // store-conditional operations. Check for conventional stores which
269 // conflict with locked addresses, and for success/failure of store
272 AbstractMemory::checkLockedAddrList(PacketPtr pkt
)
274 const RequestPtr
&req
= pkt
->req
;
275 Addr paddr
= LockedAddr::mask(req
->getPaddr());
276 bool isLLSC
= pkt
->isLLSC();
278 // Initialize return value. Non-conditional stores always
279 // succeed. Assume conditional stores will fail until proven
281 bool allowStore
= !isLLSC
;
283 // Iterate over list. Note that there could be multiple matching records,
284 // as more than one context could have done a load locked to this location.
285 // Only remove records when we succeed in finding a record for (xc, addr);
286 // then, remove all records with this address. Failed store-conditionals do
287 // not blow unrelated reservations.
288 std::list
<LockedAddr
>::iterator i
= lockedAddrList
.begin();
291 while (i
!= lockedAddrList
.end()) {
292 if (i
->addr
== paddr
&& i
->matchesContext(req
)) {
293 // it's a store conditional, and as far as the memory system can
294 // tell, the requesting context's lock is still valid.
295 DPRINTF(LLSC
, "StCond success: context %d addr %#x\n",
296 req
->contextId(), paddr
);
300 // If we didn't find a match, keep searching! Someone else may well
301 // have a reservation on this line here but we may find ours in just
305 req
->setExtraData(allowStore
? 1 : 0);
307 // LLSCs that succeeded AND non-LLSC stores both fall into here:
309 // We write address paddr. However, there may be several entries with a
310 // reservation on this address (for other contextIds) and they must all
312 i
= lockedAddrList
.begin();
313 while (i
!= lockedAddrList
.end()) {
314 if (i
->addr
== paddr
) {
315 DPRINTF(LLSC
, "Erasing lock record: context %d addr %#x\n",
316 i
->contextId
, paddr
);
317 ContextID owner_cid
= i
->contextId
;
318 assert(owner_cid
!= InvalidContextID
);
319 ContextID requestor_cid
= req
->hasContextId() ?
322 if (owner_cid
!= requestor_cid
) {
323 ThreadContext
* ctx
= system()->threads
[owner_cid
];
324 TheISA::globalClearExclusive(ctx
);
326 i
= lockedAddrList
.erase(i
);
338 tracePacket(System
*sys
, const char *label
, PacketPtr pkt
)
340 int size
= pkt
->getSize();
341 if (size
== 1 || size
== 2 || size
== 4 || size
== 8) {
342 ByteOrder byte_order
= sys
->getGuestByteOrder();
343 DPRINTF(MemoryAccess
, "%s from %s of size %i on address %#x data "
344 "%#x %c\n", label
, sys
->getRequestorName(pkt
->req
->
345 requestorId()), size
, pkt
->getAddr(),
346 size
, pkt
->getAddr(), pkt
->getUintX(byte_order
),
347 pkt
->req
->isUncacheable() ? 'U' : 'C');
350 DPRINTF(MemoryAccess
, "%s from %s of size %i on address %#x %c\n",
351 label
, sys
->getRequestorName(pkt
->req
->requestorId()),
352 size
, pkt
->getAddr(), pkt
->req
->isUncacheable() ? 'U' : 'C');
353 DDUMP(MemoryAccess
, pkt
->getConstPtr
<uint8_t>(), pkt
->getSize());
356 # define TRACE_PACKET(A) tracePacket(system(), A, pkt)
358 # define TRACE_PACKET(A)
362 AbstractMemory::access(PacketPtr pkt
)
364 if (pkt
->cacheResponding()) {
365 DPRINTF(MemoryAccess
, "Cache responding to %#llx: not responding\n",
370 if (pkt
->cmd
== MemCmd::CleanEvict
|| pkt
->cmd
== MemCmd::WritebackClean
) {
371 DPRINTF(MemoryAccess
, "CleanEvict on 0x%x: not responding\n",
376 assert(pkt
->getAddrRange().isSubset(range
));
378 uint8_t *host_addr
= toHostAddr(pkt
->getAddr());
380 if (pkt
->cmd
== MemCmd::SwapReq
) {
381 if (pkt
->isAtomicOp()) {
383 pkt
->setData(host_addr
);
384 (*(pkt
->getAtomicOp()))(host_addr
);
387 std::vector
<uint8_t> overwrite_val(pkt
->getSize());
388 uint64_t condition_val64
;
389 uint32_t condition_val32
;
391 panic_if(!pmemAddr
, "Swap only works if there is real memory " \
392 "(i.e. null=False)");
394 bool overwrite_mem
= true;
395 // keep a copy of our possible write value, and copy what is at the
396 // memory address into the packet
397 pkt
->writeData(&overwrite_val
[0]);
398 pkt
->setData(host_addr
);
400 if (pkt
->req
->isCondSwap()) {
401 if (pkt
->getSize() == sizeof(uint64_t)) {
402 condition_val64
= pkt
->req
->getExtraData();
403 overwrite_mem
= !std::memcmp(&condition_val64
, host_addr
,
405 } else if (pkt
->getSize() == sizeof(uint32_t)) {
406 condition_val32
= (uint32_t)pkt
->req
->getExtraData();
407 overwrite_mem
= !std::memcmp(&condition_val32
, host_addr
,
410 panic("Invalid size for conditional read/write\n");
414 std::memcpy(host_addr
, &overwrite_val
[0], pkt
->getSize());
416 assert(!pkt
->req
->isInstFetch());
417 TRACE_PACKET("Read/Write");
418 stats
.numOther
[pkt
->req
->requestorId()]++;
420 } else if (pkt
->isRead()) {
421 assert(!pkt
->isWrite());
423 assert(!pkt
->fromCache());
424 // if the packet is not coming from a cache then we have
425 // to do the LL/SC tracking here
426 trackLoadLocked(pkt
);
429 pkt
->setData(host_addr
);
431 TRACE_PACKET(pkt
->req
->isInstFetch() ? "IFetch" : "Read");
432 stats
.numReads
[pkt
->req
->requestorId()]++;
433 stats
.bytesRead
[pkt
->req
->requestorId()] += pkt
->getSize();
434 if (pkt
->req
->isInstFetch())
435 stats
.bytesInstRead
[pkt
->req
->requestorId()] += pkt
->getSize();
436 } else if (pkt
->isInvalidate() || pkt
->isClean()) {
437 assert(!pkt
->isWrite());
438 // in a fastmem system invalidating and/or cleaning packets
439 // can be seen due to cache maintenance requests
441 // no need to do anything
442 } else if (pkt
->isWrite()) {
445 pkt
->writeData(host_addr
);
446 DPRINTF(MemoryAccess
, "%s write due to %s\n",
447 __func__
, pkt
->print());
449 assert(!pkt
->req
->isInstFetch());
450 TRACE_PACKET("Write");
451 stats
.numWrites
[pkt
->req
->requestorId()]++;
452 stats
.bytesWritten
[pkt
->req
->requestorId()] += pkt
->getSize();
455 panic("Unexpected packet %s", pkt
->print());
458 if (pkt
->needsResponse()) {
464 AbstractMemory::functionalAccess(PacketPtr pkt
)
466 assert(pkt
->getAddrRange().isSubset(range
));
468 uint8_t *host_addr
= toHostAddr(pkt
->getAddr());
472 pkt
->setData(host_addr
);
474 TRACE_PACKET("Read");
476 } else if (pkt
->isWrite()) {
478 pkt
->writeData(host_addr
);
480 TRACE_PACKET("Write");
482 } else if (pkt
->isPrint()) {
483 Packet::PrintReqState
*prs
=
484 dynamic_cast<Packet::PrintReqState
*>(pkt
->senderState
);
486 // Need to call printLabels() explicitly since we're not going
487 // through printObj().
489 // Right now we just print the single byte at the specified address.
490 ccprintf(prs
->os
, "%s%#x\n", prs
->curPrefix(), *host_addr
);
492 panic("AbstractMemory: unimplemented functional command %s",