2 * Copyright (c) 2010-2012 ARM Limited
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder. You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated
11 * unmodified and in its entirety in all distributions of the software,
12 * modified or unmodified, in source code or in binary form.
14 * Copyright (c) 2001-2005 The Regents of The University of Michigan
15 * All rights reserved.
17 * Redistribution and use in source and binary forms, with or without
18 * modification, are permitted provided that the following conditions are
19 * met: redistributions of source code must retain the above copyright
20 * notice, this list of conditions and the following disclaimer;
21 * redistributions in binary form must reproduce the above copyright
22 * notice, this list of conditions and the following disclaimer in the
23 * documentation and/or other materials provided with the distribution;
24 * neither the name of the copyright holders nor the names of its
25 * contributors may be used to endorse or promote products derived from
26 * this software without specific prior written permission.
28 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
29 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
30 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
31 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
32 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
33 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
34 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
35 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
36 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
37 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
38 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
40 * Authors: Ron Dreslinski
46 #include <sys/types.h>
58 #include "arch/registers.hh"
59 #include "config/the_isa.hh"
60 #include "debug/LLSC.hh"
61 #include "debug/MemoryAccess.hh"
62 #include "mem/abstract_mem.hh"
63 #include "mem/packet_access.hh"
64 #include "sim/system.hh"
68 AbstractMemory::AbstractMemory(const Params
*p
) :
69 MemObject(p
), range(params()->range
), pmemAddr(NULL
),
70 confTableReported(p
->conf_table_reported
), inAddrMap(p
->in_addr_map
),
73 if (size() % TheISA::PageBytes
!= 0)
74 panic("Memory Size not divisible by page size\n");
79 if (params()->file
== "") {
80 int map_flags
= MAP_ANON
| MAP_PRIVATE
;
81 pmemAddr
= (uint8_t *)mmap(NULL
, size(),
82 PROT_READ
| PROT_WRITE
, map_flags
, -1, 0);
84 int map_flags
= MAP_PRIVATE
;
85 int fd
= open(params()->file
.c_str(), O_RDONLY
);
86 long _size
= lseek(fd
, 0, SEEK_END
);
87 if (_size
!= range
.size()) {
88 fatal("Specified size %d does not match file %s %d\n",
89 range
.size(), params()->file
, _size
);
91 lseek(fd
, 0, SEEK_SET
);
92 pmemAddr
= (uint8_t *)mmap(NULL
, roundUp(_size
, sysconf(_SC_PAGESIZE
)),
93 PROT_READ
| PROT_WRITE
, map_flags
, fd
, 0);
96 if (pmemAddr
== (void *)MAP_FAILED
) {
98 if (params()->file
== "")
99 fatal("Could not mmap!\n");
101 fatal("Could not find file: %s\n", params()->file
);
104 //If requested, initialize all the memory to 0
106 memset(pmemAddr
, 0, size());
110 AbstractMemory::~AbstractMemory()
113 munmap((char*)pmemAddr
, size());
117 AbstractMemory::regStats()
119 using namespace Stats
;
124 .init(system()->maxMasters())
125 .name(name() + ".bytes_read")
126 .desc("Number of bytes read from this memory")
127 .flags(total
| nozero
| nonan
)
129 for (int i
= 0; i
< system()->maxMasters(); i
++) {
130 bytesRead
.subname(i
, system()->getMasterName(i
));
133 .init(system()->maxMasters())
134 .name(name() + ".bytes_inst_read")
135 .desc("Number of instructions bytes read from this memory")
136 .flags(total
| nozero
| nonan
)
138 for (int i
= 0; i
< system()->maxMasters(); i
++) {
139 bytesInstRead
.subname(i
, system()->getMasterName(i
));
142 .init(system()->maxMasters())
143 .name(name() + ".bytes_written")
144 .desc("Number of bytes written to this memory")
145 .flags(total
| nozero
| nonan
)
147 for (int i
= 0; i
< system()->maxMasters(); i
++) {
148 bytesWritten
.subname(i
, system()->getMasterName(i
));
151 .init(system()->maxMasters())
152 .name(name() + ".num_reads")
153 .desc("Number of read requests responded to by this memory")
154 .flags(total
| nozero
| nonan
)
156 for (int i
= 0; i
< system()->maxMasters(); i
++) {
157 numReads
.subname(i
, system()->getMasterName(i
));
160 .init(system()->maxMasters())
161 .name(name() + ".num_writes")
162 .desc("Number of write requests responded to by this memory")
163 .flags(total
| nozero
| nonan
)
165 for (int i
= 0; i
< system()->maxMasters(); i
++) {
166 numWrites
.subname(i
, system()->getMasterName(i
));
169 .init(system()->maxMasters())
170 .name(name() + ".num_other")
171 .desc("Number of other requests responded to by this memory")
172 .flags(total
| nozero
| nonan
)
174 for (int i
= 0; i
< system()->maxMasters(); i
++) {
175 numOther
.subname(i
, system()->getMasterName(i
));
178 .name(name() + ".bw_read")
179 .desc("Total read bandwidth from this memory (bytes/s)")
182 .flags(total
| nozero
| nonan
)
184 for (int i
= 0; i
< system()->maxMasters(); i
++) {
185 bwRead
.subname(i
, system()->getMasterName(i
));
189 .name(name() + ".bw_inst_read")
190 .desc("Instruction read bandwidth from this memory (bytes/s)")
192 .prereq(bytesInstRead
)
193 .flags(total
| nozero
| nonan
)
195 for (int i
= 0; i
< system()->maxMasters(); i
++) {
196 bwInstRead
.subname(i
, system()->getMasterName(i
));
199 .name(name() + ".bw_write")
200 .desc("Write bandwidth from this memory (bytes/s)")
202 .prereq(bytesWritten
)
203 .flags(total
| nozero
| nonan
)
205 for (int i
= 0; i
< system()->maxMasters(); i
++) {
206 bwWrite
.subname(i
, system()->getMasterName(i
));
209 .name(name() + ".bw_total")
210 .desc("Total bandwidth to/from this memory (bytes/s)")
213 .flags(total
| nozero
| nonan
)
215 for (int i
= 0; i
< system()->maxMasters(); i
++) {
216 bwTotal
.subname(i
, system()->getMasterName(i
));
218 bwRead
= bytesRead
/ simSeconds
;
219 bwInstRead
= bytesInstRead
/ simSeconds
;
220 bwWrite
= bytesWritten
/ simSeconds
;
221 bwTotal
= (bytesRead
+ bytesWritten
) / simSeconds
;
225 AbstractMemory::getAddrRange() const
230 // Add load-locked to tracking list. Should only be called if the
231 // operation is a load and the LLSC flag is set.
233 AbstractMemory::trackLoadLocked(PacketPtr pkt
)
235 Request
*req
= pkt
->req
;
236 Addr paddr
= LockedAddr::mask(req
->getPaddr());
238 // first we check if we already have a locked addr for this
239 // xc. Since each xc only gets one, we just update the
240 // existing record with the new address.
241 list
<LockedAddr
>::iterator i
;
243 for (i
= lockedAddrList
.begin(); i
!= lockedAddrList
.end(); ++i
) {
244 if (i
->matchesContext(req
)) {
245 DPRINTF(LLSC
, "Modifying lock record: context %d addr %#x\n",
246 req
->contextId(), paddr
);
252 // no record for this xc: need to allocate a new one
253 DPRINTF(LLSC
, "Adding lock record: context %d addr %#x\n",
254 req
->contextId(), paddr
);
255 lockedAddrList
.push_front(LockedAddr(req
));
259 // Called on *writes* only... both regular stores and
260 // store-conditional operations. Check for conventional stores which
261 // conflict with locked addresses, and for success/failure of store
264 AbstractMemory::checkLockedAddrList(PacketPtr pkt
)
266 Request
*req
= pkt
->req
;
267 Addr paddr
= LockedAddr::mask(req
->getPaddr());
268 bool isLLSC
= pkt
->isLLSC();
270 // Initialize return value. Non-conditional stores always
271 // succeed. Assume conditional stores will fail until proven
273 bool allowStore
= !isLLSC
;
275 // Iterate over list. Note that there could be multiple matching records,
276 // as more than one context could have done a load locked to this location.
277 // Only remove records when we succeed in finding a record for (xc, addr);
278 // then, remove all records with this address. Failed store-conditionals do
279 // not blow unrelated reservations.
280 list
<LockedAddr
>::iterator i
= lockedAddrList
.begin();
283 while (i
!= lockedAddrList
.end()) {
284 if (i
->addr
== paddr
&& i
->matchesContext(req
)) {
285 // it's a store conditional, and as far as the memory system can
286 // tell, the requesting context's lock is still valid.
287 DPRINTF(LLSC
, "StCond success: context %d addr %#x\n",
288 req
->contextId(), paddr
);
292 // If we didn't find a match, keep searching! Someone else may well
293 // have a reservation on this line here but we may find ours in just
297 req
->setExtraData(allowStore
? 1 : 0);
299 // LLSCs that succeeded AND non-LLSC stores both fall into here:
301 // We write address paddr. However, there may be several entries with a
302 // reservation on this address (for other contextIds) and they must all
304 i
= lockedAddrList
.begin();
305 while (i
!= lockedAddrList
.end()) {
306 if (i
->addr
== paddr
) {
307 DPRINTF(LLSC
, "Erasing lock record: context %d addr %#x\n",
308 i
->contextId
, paddr
);
309 i
= lockedAddrList
.erase(i
);
324 DPRINTF(MemoryAccess,"%s of size %i on address 0x%x data 0x%x\n", \
325 A, pkt->getSize(), pkt->getAddr(), pkt->get<T>()); \
329 #define TRACE_PACKET(A) \
331 switch (pkt->getSize()) { \
337 DPRINTF(MemoryAccess, "%s of size %i on address 0x%x\n", \
338 A, pkt->getSize(), pkt->getAddr()); \
339 DDUMP(MemoryAccess, pkt->getPtr<uint8_t>(), pkt->getSize());\
345 #define TRACE_PACKET(A)
350 AbstractMemory::access(PacketPtr pkt
)
352 assert(pkt
->getAddr() >= range
.start
&&
353 (pkt
->getAddr() + pkt
->getSize() - 1) <= range
.end
);
355 if (pkt
->memInhibitAsserted()) {
356 DPRINTF(MemoryAccess
, "mem inhibited on 0x%x: not responding\n",
361 uint8_t *hostAddr
= pmemAddr
+ pkt
->getAddr() - range
.start
;
363 if (pkt
->cmd
== MemCmd::SwapReq
) {
364 TheISA::IntReg overwrite_val
;
366 uint64_t condition_val64
;
367 uint32_t condition_val32
;
370 panic("Swap only works if there is real memory (i.e. null=False)");
371 assert(sizeof(TheISA::IntReg
) >= pkt
->getSize());
373 overwrite_mem
= true;
374 // keep a copy of our possible write value, and copy what is at the
375 // memory address into the packet
376 std::memcpy(&overwrite_val
, pkt
->getPtr
<uint8_t>(), pkt
->getSize());
377 std::memcpy(pkt
->getPtr
<uint8_t>(), hostAddr
, pkt
->getSize());
379 if (pkt
->req
->isCondSwap()) {
380 if (pkt
->getSize() == sizeof(uint64_t)) {
381 condition_val64
= pkt
->req
->getExtraData();
382 overwrite_mem
= !std::memcmp(&condition_val64
, hostAddr
,
384 } else if (pkt
->getSize() == sizeof(uint32_t)) {
385 condition_val32
= (uint32_t)pkt
->req
->getExtraData();
386 overwrite_mem
= !std::memcmp(&condition_val32
, hostAddr
,
389 panic("Invalid size for conditional read/write\n");
393 std::memcpy(hostAddr
, &overwrite_val
, pkt
->getSize());
395 assert(!pkt
->req
->isInstFetch());
396 TRACE_PACKET("Read/Write");
397 numOther
[pkt
->req
->masterId()]++;
398 } else if (pkt
->isRead()) {
399 assert(!pkt
->isWrite());
401 trackLoadLocked(pkt
);
404 memcpy(pkt
->getPtr
<uint8_t>(), hostAddr
, pkt
->getSize());
405 TRACE_PACKET(pkt
->req
->isInstFetch() ? "IFetch" : "Read");
406 numReads
[pkt
->req
->masterId()]++;
407 bytesRead
[pkt
->req
->masterId()] += pkt
->getSize();
408 if (pkt
->req
->isInstFetch())
409 bytesInstRead
[pkt
->req
->masterId()] += pkt
->getSize();
410 } else if (pkt
->isWrite()) {
413 memcpy(hostAddr
, pkt
->getPtr
<uint8_t>(), pkt
->getSize());
414 assert(!pkt
->req
->isInstFetch());
415 TRACE_PACKET("Write");
416 numWrites
[pkt
->req
->masterId()]++;
417 bytesWritten
[pkt
->req
->masterId()] += pkt
->getSize();
419 } else if (pkt
->isInvalidate()) {
420 // no need to do anything
422 panic("unimplemented");
425 if (pkt
->needsResponse()) {
431 AbstractMemory::functionalAccess(PacketPtr pkt
)
433 assert(pkt
->getAddr() >= range
.start
&&
434 (pkt
->getAddr() + pkt
->getSize() - 1) <= range
.end
);
436 uint8_t *hostAddr
= pmemAddr
+ pkt
->getAddr() - range
.start
;
440 memcpy(pkt
->getPtr
<uint8_t>(), hostAddr
, pkt
->getSize());
441 TRACE_PACKET("Read");
443 } else if (pkt
->isWrite()) {
445 memcpy(hostAddr
, pkt
->getPtr
<uint8_t>(), pkt
->getSize());
446 TRACE_PACKET("Write");
448 } else if (pkt
->isPrint()) {
449 Packet::PrintReqState
*prs
=
450 dynamic_cast<Packet::PrintReqState
*>(pkt
->senderState
);
452 // Need to call printLabels() explicitly since we're not going
453 // through printObj().
455 // Right now we just print the single byte at the specified address.
456 ccprintf(prs
->os
, "%s%#x\n", prs
->curPrefix(), *hostAddr
);
458 panic("AbstractMemory: unimplemented functional command %s",
464 AbstractMemory::serialize(ostream
&os
)
469 gzFile compressedMem
;
470 string filename
= name() + ".physmem";
471 long _size
= range
.size();
473 SERIALIZE_SCALAR(filename
);
474 SERIALIZE_SCALAR(_size
);
477 string thefile
= Checkpoint::dir() + "/" + filename
.c_str();
478 int fd
= creat(thefile
.c_str(), 0664);
481 fatal("Can't open physical memory checkpoint file '%s'\n", filename
);
484 compressedMem
= gzdopen(fd
, "wb");
485 if (compressedMem
== NULL
)
486 fatal("Insufficient memory to allocate compression state for %s\n",
489 uint64_t pass_size
= 0;
490 // gzwrite fails if (int)len < 0 (gzwrite returns int)
491 for (uint64_t written
= 0; written
< size(); written
+= pass_size
) {
492 pass_size
= (uint64_t)INT_MAX
< (size() - written
) ?
493 (uint64_t)INT_MAX
: (size() - written
);
495 if (gzwrite(compressedMem
, pmemAddr
+ written
,
496 (unsigned int) pass_size
) != (int)pass_size
) {
497 fatal("Write failed on physical memory checkpoint file '%s'\n",
502 if (gzclose(compressedMem
))
503 fatal("Close failed on physical memory checkpoint file '%s'\n",
506 list
<LockedAddr
>::iterator i
= lockedAddrList
.begin();
508 vector
<Addr
> lal_addr
;
510 while (i
!= lockedAddrList
.end()) {
511 lal_addr
.push_back(i
->addr
);
512 lal_cid
.push_back(i
->contextId
);
515 arrayParamOut(os
, "lal_addr", lal_addr
);
516 arrayParamOut(os
, "lal_cid", lal_cid
);
520 AbstractMemory::unserialize(Checkpoint
*cp
, const string
§ion
)
525 gzFile compressedMem
;
530 const uint32_t chunkSize
= 16384;
534 UNSERIALIZE_SCALAR(filename
);
536 filename
= cp
->cptDir
+ "/" + filename
;
539 int fd
= open(filename
.c_str(), O_RDONLY
);
542 fatal("Can't open physical memory checkpoint file '%s'", filename
);
545 compressedMem
= gzdopen(fd
, "rb");
546 if (compressedMem
== NULL
)
547 fatal("Insufficient memory to allocate compression state for %s\n",
550 // unmap file that was mmapped in the constructor
551 // This is done here to make sure that gzip and open don't muck with our
552 // nice large space of memory before we reallocate it
553 munmap((char*)pmemAddr
, size());
556 UNSERIALIZE_SCALAR(_size
);
557 if (_size
> params()->range
.size())
558 fatal("Memory size has changed! size %lld, param size %lld\n",
559 _size
, params()->range
.size());
561 pmemAddr
= (uint8_t *)mmap(NULL
, size(),
562 PROT_READ
| PROT_WRITE
, MAP_ANON
| MAP_PRIVATE
, -1, 0);
564 if (pmemAddr
== (void *)MAP_FAILED
) {
566 fatal("Could not mmap physical memory!\n");
570 tempPage
= (long*)malloc(chunkSize
);
571 if (tempPage
== NULL
)
572 fatal("Unable to malloc memory to read file %s\n", filename
);
574 /* Only copy bytes that are non-zero, so we don't give the VM system hell */
575 while (curSize
< size()) {
576 bytesRead
= gzread(compressedMem
, tempPage
, chunkSize
);
580 assert(bytesRead
% sizeof(long) == 0);
582 for (uint32_t x
= 0; x
< bytesRead
/ sizeof(long); x
++)
584 if (*(tempPage
+x
) != 0) {
585 pmem_current
= (long*)(pmemAddr
+ curSize
+ x
* sizeof(long));
586 *pmem_current
= *(tempPage
+x
);
589 curSize
+= bytesRead
;
594 if (gzclose(compressedMem
))
595 fatal("Close failed on physical memory checkpoint file '%s'\n",
598 vector
<Addr
> lal_addr
;
600 arrayParamIn(cp
, section
, "lal_addr", lal_addr
);
601 arrayParamIn(cp
, section
, "lal_cid", lal_cid
);
602 for(int i
= 0; i
< lal_addr
.size(); i
++)
603 lockedAddrList
.push_front(LockedAddr(lal_addr
[i
], lal_cid
[i
]));