src/mem/abstract_mem.hh

   1 /*
   2  * Copyright (c) 2012, 2019 ARM Limited
   3  * All rights reserved
   4  *
   5  * The license below extends only to copyright in the software and shall
   6  * not be construed as granting a license to any other intellectual
   7  * property including but not limited to intellectual property relating
   8  * to a hardware implementation of the functionality of the software
   9  * licensed hereunder.  You may use the software subject to the license
  10  * terms below provided that you ensure that this notice is replicated
  11  * unmodified and in its entirety in all distributions of the software,
  12  * modified or unmodified, in source code or in binary form.
  13  *
  14  * Copyright (c) 2001-2005 The Regents of The University of Michigan
  15  * All rights reserved.
  16  *
  17  * Redistribution and use in source and binary forms, with or without
  18  * modification, are permitted provided that the following conditions are
  19  * met: redistributions of source code must retain the above copyright
  20  * notice, this list of conditions and the following disclaimer;
  21  * redistributions in binary form must reproduce the above copyright
  22  * notice, this list of conditions and the following disclaimer in the
  23  * documentation and/or other materials provided with the distribution;
  24  * neither the name of the copyright holders nor the names of its
  25  * contributors may be used to endorse or promote products derived from
  26  * this software without specific prior written permission.
  27  *
  28  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  29  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  30  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  31  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  32  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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  34  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  35  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  36  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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  38  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  39  */
  40
  41 /**
  42  * @file
  43  * AbstractMemory declaration
  44  */
  45
  46 #ifndef __MEM_ABSTRACT_MEMORY_HH__
  47 #define __MEM_ABSTRACT_MEMORY_HH__
  48
  49 #include "mem/backdoor.hh"
  50 #include "mem/port.hh"
  51 #include "params/AbstractMemory.hh"
  52 #include "sim/clocked_object.hh"
  53 #include "sim/stats.hh"
  54
  55
  56 class System;
  57
  58 /**
  59  * Locked address class that represents a physical address and a
  60  * context id.
  61  */
  62 class LockedAddr {
  63
  64   private:
  65
  66     // on alpha, minimum LL/SC granularity is 16 bytes, so lower
  67     // bits need to masked off.
  68     static const Addr Addr_Mask = 0xf;
  69
  70   public:
  71
  72     // locked address
  73     Addr addr;
  74
  75     // locking hw context
  76     const ContextID contextId;
  77
  78     static Addr mask(Addr paddr) { return (paddr & ~Addr_Mask); }
  79
  80     // check for matching execution context
  81     bool matchesContext(const RequestPtr &req) const
  82     {
  83         assert(contextId != InvalidContextID);
  84         assert(req->hasContextId());
  85         return (contextId == req->contextId());
  86     }
  87
  88     LockedAddr(const RequestPtr &req) : addr(mask(req->getPaddr())),
  89                                         contextId(req->contextId())
  90     {}
  91
  92     // constructor for unserialization use
  93     LockedAddr(Addr _addr, int _cid) : addr(_addr), contextId(_cid)
  94     {}
  95 };
  96
  97 /**
  98  * An abstract memory represents a contiguous block of physical
  99  * memory, with an associated address range, and also provides basic
 100  * functionality for reading and writing this memory without any
 101  * timing information. It is a ClockedObject since subclasses may need timing
 102  * information.
 103  */
 104 class AbstractMemory : public ClockedObject
 105 {
 106   protected:
 107
 108     // Address range of this memory
 109     AddrRange range;
 110
 111     // Pointer to host memory used to implement this memory
 112     uint8_t* pmemAddr;
 113
 114     // Backdoor to access this memory.
 115     MemBackdoor backdoor;
 116
 117     // Enable specific memories to be reported to the configuration table
 118     const bool confTableReported;
 119
 120     // Should the memory appear in the global address map
 121     const bool inAddrMap;
 122
 123     // Should KVM map this memory for the guest
 124     const bool kvmMap;
 125
 126     std::list<LockedAddr> lockedAddrList;
 127
 128     // helper function for checkLockedAddrs(): we really want to
 129     // inline a quick check for an empty locked addr list (hopefully
 130     // the common case), and do the full list search (if necessary) in
 131     // this out-of-line function
 132     bool checkLockedAddrList(PacketPtr pkt);
 133
 134     // Record the address of a load-locked operation so that we can
 135     // clear the execution context's lock flag if a matching store is
 136     // performed
 137     void trackLoadLocked(PacketPtr pkt);
 138
 139     // Compare a store address with any locked addresses so we can
 140     // clear the lock flag appropriately.  Return value set to 'false'
 141     // if store operation should be suppressed (because it was a
 142     // conditional store and the address was no longer locked by the
 143     // requesting execution context), 'true' otherwise.  Note that
 144     // this method must be called on *all* stores since even
 145     // non-conditional stores must clear any matching lock addresses.
 146     bool writeOK(PacketPtr pkt) {
 147         const RequestPtr &req = pkt->req;
 148         if (lockedAddrList.empty()) {
 149             // no locked addrs: nothing to check, store_conditional fails
 150             bool isLLSC = pkt->isLLSC();
 151             if (isLLSC) {
 152                 req->setExtraData(0);
 153             }
 154             return !isLLSC; // only do write if not an sc
 155         } else {
 156             // iterate over list...
 157             return checkLockedAddrList(pkt);
 158         }
 159     }
 160
 161     /** Pointer to the System object.
 162      * This is used for getting the number of requestors in the system which is
 163      * needed when registering stats
 164      */
 165     System *_system;
 166
 167     struct MemStats : public Stats::Group {
 168         MemStats(AbstractMemory &mem);
 169
 170         void regStats() override;
 171
 172         const AbstractMemory &mem;
 173
 174         /** Number of total bytes read from this memory */
 175         Stats::Vector bytesRead;
 176         /** Number of instruction bytes read from this memory */
 177         Stats::Vector bytesInstRead;
 178         /** Number of bytes written to this memory */
 179         Stats::Vector bytesWritten;
 180         /** Number of read requests */
 181         Stats::Vector numReads;
 182         /** Number of write requests */
 183         Stats::Vector numWrites;
 184         /** Number of other requests */
 185         Stats::Vector numOther;
 186         /** Read bandwidth from this memory */
 187         Stats::Formula bwRead;
 188         /** Read bandwidth from this memory */
 189         Stats::Formula bwInstRead;
 190         /** Write bandwidth from this memory */
 191         Stats::Formula bwWrite;
 192         /** Total bandwidth from this memory */
 193         Stats::Formula bwTotal;
 194     } stats;
 195
 196
 197   private:
 198
 199     // Prevent copying
 200     AbstractMemory(const AbstractMemory&);
 201
 202     // Prevent assignment
 203     AbstractMemory& operator=(const AbstractMemory&);
 204
 205   public:
 206
 207     typedef AbstractMemoryParams Params;
 208
 209     AbstractMemory(const Params &p);
 210     virtual ~AbstractMemory() {}
 211
 212     void initState() override;
 213
 214     /**
 215      * See if this is a null memory that should never store data and
 216      * always return zero.
 217      *
 218      * @return true if null
 219      */
 220     bool isNull() const { return params().null; }
 221
 222     /**
 223      * Set the host memory backing store to be used by this memory
 224      * controller.
 225      *
 226      * @param pmem_addr Pointer to a segment of host memory
 227      */
 228     void setBackingStore(uint8_t* pmem_addr);
 229
 230     void
 231     getBackdoor(MemBackdoorPtr &bd_ptr)
 232     {
 233         if (lockedAddrList.empty() && backdoor.ptr())
 234             bd_ptr = &backdoor;
 235     }
 236
 237     /**
 238      * Get the list of locked addresses to allow checkpointing.
 239      */
 240     const std::list<LockedAddr> &
 241     getLockedAddrList() const
 242     {
 243         return lockedAddrList;
 244     }
 245
 246     /**
 247      * Add a locked address to allow for checkpointing.
 248      */
 249     void
 250     addLockedAddr(LockedAddr addr)
 251     {
 252         backdoor.invalidate();
 253         lockedAddrList.push_back(addr);
 254     }
 255
 256     /** read the system pointer
 257      * Implemented for completeness with the setter
 258      * @return pointer to the system object */
 259     System* system() const { return _system; }
 260
 261     /** Set the system pointer on this memory
 262      * This can't be done via a python parameter because the system needs
 263      * pointers to all the memories and the reverse would create a cycle in the
 264      * object graph. An init() this is set.
 265      * @param sys system pointer to set
 266      */
 267     void system(System *sys) { _system = sys; }
 268
 269     const Params &
 270     params() const
 271     {
 272         return dynamic_cast<const Params &>(_params);
 273     }
 274
 275     /**
 276      * Get the address range
 277      *
 278      * @return a single contigous address range
 279      */
 280     AddrRange getAddrRange() const;
 281
 282     /**
 283      * Transform a gem5 address space address into its physical counterpart
 284      * in the host address space.
 285      *
 286      * @param addr Address in gem5's address space.
 287      * @return Pointer to the corresponding memory address of the host.
 288      */
 289     inline uint8_t *
 290     toHostAddr(Addr addr) const
 291     {
 292         return pmemAddr + addr - range.start();
 293     }
 294
 295     /**
 296      * Get the memory size.
 297      *
 298      * @return the size of the memory
 299      */
 300     uint64_t size() const { return range.size(); }
 301
 302     /**
 303      * Get the start address.
 304      *
 305      * @return the start address of the memory
 306      */
 307     Addr start() const { return range.start(); }
 308
 309     /**
 310      *  Should this memory be passed to the kernel and part of the OS
 311      *  physical memory layout.
 312      *
 313      * @return if this memory is reported
 314      */
 315     bool isConfReported() const { return confTableReported; }
 316
 317     /**
 318      * Some memories are used as shadow memories or should for other
 319      * reasons not be part of the global address map.
 320      *
 321      * @return if this memory is part of the address map
 322      */
 323     bool isInAddrMap() const { return inAddrMap; }
 324
 325     /**
 326      * When shadow memories are in use, KVM may want to make one or the other,
 327      * but cannot map both into the guest address space.
 328      *
 329      * @return if this memory should be mapped into the KVM guest address space
 330      */
 331     bool isKvmMap() const { return kvmMap; }
 332
 333     /**
 334      * Perform an untimed memory access and update all the state
 335      * (e.g. locked addresses) and statistics accordingly. The packet
 336      * is turned into a response if required.
 337      *
 338      * @param pkt Packet performing the access
 339      */
 340     void access(PacketPtr pkt);
 341
 342     /**
 343      * Perform an untimed memory read or write without changing
 344      * anything but the memory itself. No stats are affected by this
 345      * access. In addition to normal accesses this also facilitates
 346      * print requests.
 347      *
 348      * @param pkt Packet performing the access
 349      */
 350     void functionalAccess(PacketPtr pkt);
 351 };
 352
 353 #endif //__MEM_ABSTRACT_MEMORY_HH__