src/mem/abstract_mem.hh

   1 /*
   2  * Copyright (c) 2012 ARM Limited
   3  * All rights reserved
   4  *
   5  * The license below extends only to copyright in the software and shall
   6  * not be construed as granting a license to any other intellectual
   7  * property including but not limited to intellectual property relating
   8  * to a hardware implementation of the functionality of the software
   9  * licensed hereunder.  You may use the software subject to the license
  10  * terms below provided that you ensure that this notice is replicated
  11  * unmodified and in its entirety in all distributions of the software,
  12  * modified or unmodified, in source code or in binary form.
  13  *
  14  * Copyright (c) 2001-2005 The Regents of The University of Michigan
  15  * All rights reserved.
  16  *
  17  * Redistribution and use in source and binary forms, with or without
  18  * modification, are permitted provided that the following conditions are
  19  * met: redistributions of source code must retain the above copyright
  20  * notice, this list of conditions and the following disclaimer;
  21  * redistributions in binary form must reproduce the above copyright
  22  * notice, this list of conditions and the following disclaimer in the
  23  * documentation and/or other materials provided with the distribution;
  24  * neither the name of the copyright holders nor the names of its
  25  * contributors may be used to endorse or promote products derived from
  26  * this software without specific prior written permission.
  27  *
  28  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  29  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  30  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  31  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  32  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  33  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  34  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  35  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  36  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  37  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  38  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  39  *
  40  * Authors: Ron Dreslinski
  41  *          Andreas Hansson
  42  */
  43
  44 /**
  45  * @file
  46  * AbstractMemory declaration
  47  */
  48
  49 #ifndef __ABSTRACT_MEMORY_HH__
  50 #define __ABSTRACT_MEMORY_HH__
  51
  52 #include "mem/mem_object.hh"
  53 #include "params/AbstractMemory.hh"
  54 #include "sim/stats.hh"
  55
  56
  57 class System;
  58
  59 /**
  60  * An abstract memory represents a contiguous block of physical
  61  * memory, with an associated address range, and also provides basic
  62  * functionality for reading and writing this memory without any
  63  * timing information. It is a MemObject since any subclass must have
  64  * at least one slave port.
  65  */
  66 class AbstractMemory : public MemObject
  67 {
  68   protected:
  69
  70     // Address range of this memory
  71     Range<Addr> range;
  72
  73     // Pointer to host memory used to implement this memory
  74     uint8_t* pmemAddr;
  75
  76     // Enable specific memories to be reported to the configuration table
  77     bool confTableReported;
  78
  79     // Should the memory appear in the global address map
  80     bool inAddrMap;
  81
  82     class LockedAddr {
  83
  84       public:
  85         // on alpha, minimum LL/SC granularity is 16 bytes, so lower
  86         // bits need to masked off.
  87         static const Addr Addr_Mask = 0xf;
  88
  89         static Addr mask(Addr paddr) { return (paddr & ~Addr_Mask); }
  90
  91         Addr addr;      // locked address
  92         int contextId;     // locking hw context
  93
  94         // check for matching execution context
  95         bool matchesContext(Request *req)
  96         {
  97             return (contextId == req->contextId());
  98         }
  99
 100         LockedAddr(Request *req) : addr(mask(req->getPaddr())),
 101                                    contextId(req->contextId())
 102         {
 103         }
 104         // constructor for unserialization use
 105         LockedAddr(Addr _addr, int _cid) : addr(_addr), contextId(_cid)
 106         {
 107         }
 108     };
 109
 110     std::list<LockedAddr> lockedAddrList;
 111
 112     // helper function for checkLockedAddrs(): we really want to
 113     // inline a quick check for an empty locked addr list (hopefully
 114     // the common case), and do the full list search (if necessary) in
 115     // this out-of-line function
 116     bool checkLockedAddrList(PacketPtr pkt);
 117
 118     // Record the address of a load-locked operation so that we can
 119     // clear the execution context's lock flag if a matching store is
 120     // performed
 121     void trackLoadLocked(PacketPtr pkt);
 122
 123     // Compare a store address with any locked addresses so we can
 124     // clear the lock flag appropriately.  Return value set to 'false'
 125     // if store operation should be suppressed (because it was a
 126     // conditional store and the address was no longer locked by the
 127     // requesting execution context), 'true' otherwise.  Note that
 128     // this method must be called on *all* stores since even
 129     // non-conditional stores must clear any matching lock addresses.
 130     bool writeOK(PacketPtr pkt) {
 131         Request *req = pkt->req;
 132         if (lockedAddrList.empty()) {
 133             // no locked addrs: nothing to check, store_conditional fails
 134             bool isLLSC = pkt->isLLSC();
 135             if (isLLSC) {
 136                 req->setExtraData(0);
 137             }
 138             return !isLLSC; // only do write if not an sc
 139         } else {
 140             // iterate over list...
 141             return checkLockedAddrList(pkt);
 142         }
 143     }
 144
 145     /** Number of total bytes read from this memory */
 146     Stats::Vector bytesRead;
 147     /** Number of instruction bytes read from this memory */
 148     Stats::Vector bytesInstRead;
 149     /** Number of bytes written to this memory */
 150     Stats::Vector bytesWritten;
 151     /** Number of read requests */
 152     Stats::Vector numReads;
 153     /** Number of write requests */
 154     Stats::Vector numWrites;
 155     /** Number of other requests */
 156     Stats::Vector numOther;
 157     /** Read bandwidth from this memory */
 158     Stats::Formula bwRead;
 159     /** Read bandwidth from this memory */
 160     Stats::Formula bwInstRead;
 161     /** Write bandwidth from this memory */
 162     Stats::Formula bwWrite;
 163     /** Total bandwidth from this memory */
 164     Stats::Formula bwTotal;
 165
 166     /** Pointor to the System object.
 167      * This is used for getting the number of masters in the system which is
 168      * needed when registering stats
 169      */
 170     System *_system;
 171
 172
 173   private:
 174
 175     // Prevent copying
 176     AbstractMemory(const AbstractMemory&);
 177
 178     // Prevent assignment
 179     AbstractMemory& operator=(const AbstractMemory&);
 180
 181   public:
 182
 183     typedef AbstractMemoryParams Params;
 184
 185     AbstractMemory(const Params* p);
 186     virtual ~AbstractMemory();
 187
 188     /** read the system pointer
 189      * Implemented for completeness with the setter
 190      * @return pointer to the system object */
 191     System* system() const { return _system; }
 192
 193     /** Set the system pointer on this memory
 194      * This can't be done via a python parameter because the system needs
 195      * pointers to all the memories and the reverse would create a cycle in the
 196      * object graph. An init() this is set.
 197      * @param sys system pointer to set
 198      */
 199     void system(System *sys) { _system = sys; }
 200
 201     const Params *
 202     params() const
 203     {
 204         return dynamic_cast<const Params *>(_params);
 205     }
 206
 207     /**
 208      * Get the address range
 209      *
 210      * @return a single contigous address range
 211      */
 212     Range<Addr> getAddrRange() const;
 213
 214     /**
 215      * Get the memory size.
 216      *
 217      * @return the size of the memory
 218      */
 219     uint64_t size() const { return range.size(); }
 220
 221     /**
 222      * Get the start address.
 223      *
 224      * @return the start address of the memory
 225      */
 226     Addr start() const { return range.start; }
 227
 228     /**
 229      *  Should this memory be passed to the kernel and part of the OS
 230      *  physical memory layout.
 231      *
 232      * @return if this memory is reported
 233      */
 234     bool isConfReported() const { return confTableReported; }
 235
 236     /**
 237      * Some memories are used as shadow memories or should for other
 238      * reasons not be part of the global address map.
 239      *
 240      * @return if this memory is part of the address map
 241      */
 242     bool isInAddrMap() const { return inAddrMap; }
 243
 244     /**
 245      * Perform an untimed memory access and update all the state
 246      * (e.g. locked addresses) and statistics accordingly. The packet
 247      * is turned into a response if required.
 248      *
 249      * @param pkt Packet performing the access
 250      */
 251     void access(PacketPtr pkt);
 252
 253     /**
 254      * Perform an untimed memory read or write without changing
 255      * anything but the memory itself. No stats are affected by this
 256      * access. In addition to normal accesses this also facilitates
 257      * print requests.
 258      *
 259      * @param pkt Packet performing the access
 260      */
 261     void functionalAccess(PacketPtr pkt);
 262
 263     /**
 264      * Register Statistics
 265      */
 266     virtual void regStats();
 267
 268     virtual void serialize(std::ostream &os);
 269     virtual void unserialize(Checkpoint *cp, const std::string &section);
 270
 271 };
 272
 273 #endif //__ABSTRACT_MEMORY_HH__