src/mem/bridge.cc

   1 /*
   2  * Copyright (c) 2011-2012 ARM Limited
   3  * All rights reserved
   4  *
   5  * The license below extends only to copyright in the software and shall
   6  * not be construed as granting a license to any other intellectual
   7  * property including but not limited to intellectual property relating
   8  * to a hardware implementation of the functionality of the software
   9  * licensed hereunder.  You may use the software subject to the license
  10  * terms below provided that you ensure that this notice is replicated
  11  * unmodified and in its entirety in all distributions of the software,
  12  * modified or unmodified, in source code or in binary form.
  13  *
  14  * Copyright (c) 2006 The Regents of The University of Michigan
  15  * All rights reserved.
  16  *
  17  * Redistribution and use in source and binary forms, with or without
  18  * modification, are permitted provided that the following conditions are
  19  * met: redistributions of source code must retain the above copyright
  20  * notice, this list of conditions and the following disclaimer;
  21  * redistributions in binary form must reproduce the above copyright
  22  * notice, this list of conditions and the following disclaimer in the
  23  * documentation and/or other materials provided with the distribution;
  24  * neither the name of the copyright holders nor the names of its
  25  * contributors may be used to endorse or promote products derived from
  26  * this software without specific prior written permission.
  27  *
  28  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  29  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  30  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  31  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  32  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  33  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  34  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  35  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  36  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  37  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  38  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  39  *
  40  * Authors: Ali Saidi
  41  *          Steve Reinhardt
  42  *          Andreas Hansson
  43  */
  44
  45 /**
  46  * @file
  47  * Implementation of a memory-mapped bus bridge that connects a master
  48  * and a slave through a request and response queue.
  49  */
  50
  51 #include "base/trace.hh"
  52 #include "debug/BusBridge.hh"
  53 #include "mem/bridge.hh"
  54 #include "params/Bridge.hh"
  55
  56 Bridge::BridgeSlavePort::BridgeSlavePort(const std::string &_name,
  57                                          Bridge* _bridge,
  58                                          BridgeMasterPort& _masterPort,
  59                                          int _delay, int _nack_delay,
  60                                          int _resp_limit,
  61                                          std::vector<Range<Addr> > _ranges)
  62     : SlavePort(_name, _bridge), bridge(_bridge), masterPort(_masterPort),
  63       delay(_delay), nackDelay(_nack_delay),
  64       ranges(_ranges.begin(), _ranges.end()),
  65       outstandingResponses(0), inRetry(false),
  66       respQueueLimit(_resp_limit), sendEvent(*this)
  67 {
  68 }
  69
  70 Bridge::BridgeMasterPort::BridgeMasterPort(const std::string &_name,
  71                                            Bridge* _bridge,
  72                                            BridgeSlavePort& _slavePort,
  73                                            int _delay, int _req_limit)
  74     : MasterPort(_name, _bridge), bridge(_bridge), slavePort(_slavePort),
  75       delay(_delay), inRetry(false), reqQueueLimit(_req_limit),
  76       sendEvent(*this)
  77 {
  78 }
  79
  80 Bridge::Bridge(Params *p)
  81     : MemObject(p),
  82       slavePort(p->name + ".slave", this, masterPort, p->delay,
  83                 p->nack_delay, p->resp_size, p->ranges),
  84       masterPort(p->name + ".master", this, slavePort, p->delay, p->req_size),
  85       ackWrites(p->write_ack), _params(p)
  86 {
  87     if (ackWrites)
  88         panic("No support for acknowledging writes\n");
  89 }
  90
  91 MasterPort&
  92 Bridge::getMasterPort(const std::string &if_name, int idx)
  93 {
  94     if (if_name == "master")
  95         return masterPort;
  96     else
  97         // pass it along to our super class
  98         return MemObject::getMasterPort(if_name, idx);
  99 }
 100
 101 SlavePort&
 102 Bridge::getSlavePort(const std::string &if_name, int idx)
 103 {
 104     if (if_name == "slave")
 105         return slavePort;
 106     else
 107         // pass it along to our super class
 108         return MemObject::getSlavePort(if_name, idx);
 109 }
 110
 111 void
 112 Bridge::init()
 113 {
 114     // make sure both sides are connected and have the same block size
 115     if (!slavePort.isConnected() || !masterPort.isConnected())
 116         fatal("Both ports of bus bridge are not connected to a bus.\n");
 117
 118     if (slavePort.peerBlockSize() != masterPort.peerBlockSize())
 119         fatal("Slave port size %d, master port size %d \n " \
 120               "Busses don't have the same block size... Not supported.\n",
 121               slavePort.peerBlockSize(), masterPort.peerBlockSize());
 122
 123     // notify the master side  of our address ranges
 124     slavePort.sendRangeChange();
 125 }
 126
 127 bool
 128 Bridge::BridgeSlavePort::respQueueFull()
 129 {
 130     return outstandingResponses == respQueueLimit;
 131 }
 132
 133 bool
 134 Bridge::BridgeMasterPort::reqQueueFull()
 135 {
 136     return requestQueue.size() == reqQueueLimit;
 137 }
 138
 139 bool
 140 Bridge::BridgeMasterPort::recvTimingResp(PacketPtr pkt)
 141 {
 142     // all checks are done when the request is accepted on the slave
 143     // side, so we are guaranteed to have space for the response
 144     DPRINTF(BusBridge, "recvTiming: response %s addr 0x%x\n",
 145             pkt->cmdString(), pkt->getAddr());
 146
 147     DPRINTF(BusBridge, "Request queue size: %d\n", requestQueue.size());
 148
 149     slavePort.queueForSendTiming(pkt);
 150
 151     return true;
 152 }
 153
 154 bool
 155 Bridge::BridgeSlavePort::recvTimingReq(PacketPtr pkt)
 156 {
 157     DPRINTF(BusBridge, "recvTiming: request %s addr 0x%x\n",
 158             pkt->cmdString(), pkt->getAddr());
 159
 160     DPRINTF(BusBridge, "Response queue size: %d outresp: %d\n",
 161             responseQueue.size(), outstandingResponses);
 162
 163     if (masterPort.reqQueueFull()) {
 164         DPRINTF(BusBridge, "Request queue full, nacking\n");
 165         nackRequest(pkt);
 166         return true;
 167     }
 168
 169     if (pkt->needsResponse()) {
 170         if (respQueueFull()) {
 171             DPRINTF(BusBridge,
 172                     "Response queue full, no space for response, nacking\n");
 173             DPRINTF(BusBridge,
 174                     "queue size: %d outstanding resp: %d\n",
 175                     responseQueue.size(), outstandingResponses);
 176             nackRequest(pkt);
 177             return true;
 178         } else {
 179             DPRINTF(BusBridge, "Request Needs response, reserving space\n");
 180             assert(outstandingResponses != respQueueLimit);
 181             ++outstandingResponses;
 182         }
 183     }
 184
 185     masterPort.queueForSendTiming(pkt);
 186
 187     return true;
 188 }
 189
 190 void
 191 Bridge::BridgeSlavePort::nackRequest(PacketPtr pkt)
 192 {
 193     // Nack the packet
 194     pkt->makeTimingResponse();
 195     pkt->setNacked();
 196
 197     // The Nack packets are stored in the response queue just like any
 198     // other response, but they do not occupy any space as this is
 199     // tracked by the outstandingResponses, this guarantees space for
 200     // the Nack packets, but implicitly means we have an (unrealistic)
 201     // unbounded Nack queue.
 202
 203     // put it on the list to send
 204     Tick readyTime = curTick() + nackDelay;
 205     DeferredResponse resp(pkt, readyTime, true);
 206
 207     // nothing on the list, add it and we're done
 208     if (responseQueue.empty()) {
 209         assert(!sendEvent.scheduled());
 210         bridge->schedule(sendEvent, readyTime);
 211         responseQueue.push_back(resp);
 212         return;
 213     }
 214
 215     assert(sendEvent.scheduled() || inRetry);
 216
 217     // does it go at the end?
 218     if (readyTime >= responseQueue.back().ready) {
 219         responseQueue.push_back(resp);
 220         return;
 221     }
 222
 223     // ok, somewhere in the middle, fun
 224     std::list<DeferredResponse>::iterator i = responseQueue.begin();
 225     std::list<DeferredResponse>::iterator end = responseQueue.end();
 226     std::list<DeferredResponse>::iterator begin = responseQueue.begin();
 227     bool done = false;
 228
 229     while (i != end && !done) {
 230         if (readyTime < (*i).ready) {
 231             if (i == begin)
 232                 bridge->reschedule(sendEvent, readyTime);
 233             responseQueue.insert(i, resp);
 234             done = true;
 235         }
 236         i++;
 237     }
 238     assert(done);
 239 }
 240
 241 void
 242 Bridge::BridgeMasterPort::queueForSendTiming(PacketPtr pkt)
 243 {
 244     Tick readyTime = curTick() + delay;
 245
 246     // If we expect to see a response, we need to restore the source
 247     // and destination field that is potentially changed by a second
 248     // bus
 249     if (!pkt->memInhibitAsserted() && pkt->needsResponse()) {
 250         // Update the sender state so we can deal with the response
 251         // appropriately
 252         RequestState *req_state = new RequestState(pkt);
 253         pkt->senderState = req_state;
 254     }
 255
 256     // If we're about to put this packet at the head of the queue, we
 257     // need to schedule an event to do the transmit.  Otherwise there
 258     // should already be an event scheduled for sending the head
 259     // packet.
 260     if (requestQueue.empty()) {
 261         bridge->schedule(sendEvent, readyTime);
 262     }
 263
 264     assert(requestQueue.size() != reqQueueLimit);
 265
 266     requestQueue.push_back(DeferredRequest(pkt, readyTime));
 267 }
 268
 269
 270 void
 271 Bridge::BridgeSlavePort::queueForSendTiming(PacketPtr pkt)
 272 {
 273     // This is a response for a request we forwarded earlier.  The
 274     // corresponding request state should be stored in the packet's
 275     // senderState field.
 276     RequestState *req_state = dynamic_cast<RequestState*>(pkt->senderState);
 277     assert(req_state != NULL);
 278     // set up new packet dest & senderState based on values saved
 279     // from original request
 280     req_state->fixResponse(pkt);
 281
 282     // the bridge assumes that at least one bus has set the
 283     // destination field of the packet
 284     assert(pkt->isDestValid());
 285     DPRINTF(BusBridge, "response, new dest %d\n", pkt->getDest());
 286     delete req_state;
 287
 288     Tick readyTime = curTick() + delay;
 289
 290     // If we're about to put this packet at the head of the queue, we
 291     // need to schedule an event to do the transmit.  Otherwise there
 292     // should already be an event scheduled for sending the head
 293     // packet.
 294     if (responseQueue.empty()) {
 295         bridge->schedule(sendEvent, readyTime);
 296     }
 297     responseQueue.push_back(DeferredResponse(pkt, readyTime));
 298 }
 299
 300 void
 301 Bridge::BridgeMasterPort::trySend()
 302 {
 303     assert(!requestQueue.empty());
 304
 305     DeferredRequest req = requestQueue.front();
 306
 307     assert(req.ready <= curTick());
 308
 309     PacketPtr pkt = req.pkt;
 310
 311     DPRINTF(BusBridge, "trySend request: addr 0x%x\n", pkt->getAddr());
 312
 313     if (sendTimingReq(pkt)) {
 314         // send successful
 315         requestQueue.pop_front();
 316
 317         // If there are more packets to send, schedule event to try again.
 318         if (!requestQueue.empty()) {
 319             req = requestQueue.front();
 320             DPRINTF(BusBridge, "Scheduling next send\n");
 321             bridge->schedule(sendEvent,
 322                              std::max(req.ready, curTick() + 1));
 323         }
 324     } else {
 325         inRetry = true;
 326     }
 327
 328     DPRINTF(BusBridge, "trySend: request queue size: %d\n",
 329             requestQueue.size());
 330 }
 331
 332 void
 333 Bridge::BridgeSlavePort::trySend()
 334 {
 335     assert(!responseQueue.empty());
 336
 337     DeferredResponse resp = responseQueue.front();
 338
 339     assert(resp.ready <= curTick());
 340
 341     PacketPtr pkt = resp.pkt;
 342
 343     DPRINTF(BusBridge, "trySend response: dest %d addr 0x%x\n",
 344             pkt->getDest(), pkt->getAddr());
 345
 346     bool was_nacked_here = resp.nackedHere;
 347
 348     if (sendTimingResp(pkt)) {
 349         DPRINTF(BusBridge, "  successful\n");
 350         // send successful
 351         responseQueue.pop_front();
 352
 353         if (!was_nacked_here) {
 354             assert(outstandingResponses != 0);
 355             --outstandingResponses;
 356         }
 357
 358         // If there are more packets to send, schedule event to try again.
 359         if (!responseQueue.empty()) {
 360             resp = responseQueue.front();
 361             DPRINTF(BusBridge, "Scheduling next send\n");
 362             bridge->schedule(sendEvent,
 363                              std::max(resp.ready, curTick() + 1));
 364         }
 365     } else {
 366         DPRINTF(BusBridge, "  unsuccessful\n");
 367         inRetry = true;
 368     }
 369
 370     DPRINTF(BusBridge, "trySend: queue size: %d outstanding resp: %d\n",
 371             responseQueue.size(), outstandingResponses);
 372 }
 373
 374 void
 375 Bridge::BridgeMasterPort::recvRetry()
 376 {
 377     inRetry = false;
 378     Tick nextReady = requestQueue.front().ready;
 379     if (nextReady <= curTick())
 380         trySend();
 381     else
 382         bridge->schedule(sendEvent, nextReady);
 383 }
 384
 385 void
 386 Bridge::BridgeSlavePort::recvRetry()
 387 {
 388     inRetry = false;
 389     Tick nextReady = responseQueue.front().ready;
 390     if (nextReady <= curTick())
 391         trySend();
 392     else
 393         bridge->schedule(sendEvent, nextReady);
 394 }
 395
 396 Tick
 397 Bridge::BridgeSlavePort::recvAtomic(PacketPtr pkt)
 398 {
 399     return delay + masterPort.sendAtomic(pkt);
 400 }
 401
 402 void
 403 Bridge::BridgeSlavePort::recvFunctional(PacketPtr pkt)
 404 {
 405     std::list<DeferredResponse>::iterator i;
 406
 407     pkt->pushLabel(name());
 408
 409     // check the response queue
 410     for (i = responseQueue.begin();  i != responseQueue.end(); ++i) {
 411         if (pkt->checkFunctional((*i).pkt)) {
 412             pkt->makeResponse();
 413             return;
 414         }
 415     }
 416
 417     // also check the master port's request queue
 418     if (masterPort.checkFunctional(pkt)) {
 419         return;
 420     }
 421
 422     pkt->popLabel();
 423
 424     // fall through if pkt still not satisfied
 425     masterPort.sendFunctional(pkt);
 426 }
 427
 428 bool
 429 Bridge::BridgeMasterPort::checkFunctional(PacketPtr pkt)
 430 {
 431     bool found = false;
 432     std::list<DeferredRequest>::iterator i = requestQueue.begin();
 433
 434     while(i != requestQueue.end() && !found) {
 435         if (pkt->checkFunctional((*i).pkt)) {
 436             pkt->makeResponse();
 437             found = true;
 438         }
 439         ++i;
 440     }
 441
 442     return found;
 443 }
 444
 445 AddrRangeList
 446 Bridge::BridgeSlavePort::getAddrRanges() const
 447 {
 448     return ranges;
 449 }
 450
 451 Bridge *
 452 BridgeParams::create()
 453 {
 454     return new Bridge(this);
 455 }