src/mem/bridge.hh

   1 /*
   2  * Copyright (c) 2011-2013 ARM Limited
   3  * All rights reserved
   4  *
   5  * The license below extends only to copyright in the software and shall
   6  * not be construed as granting a license to any other intellectual
   7  * property including but not limited to intellectual property relating
   8  * to a hardware implementation of the functionality of the software
   9  * licensed hereunder.  You may use the software subject to the license
  10  * terms below provided that you ensure that this notice is replicated
  11  * unmodified and in its entirety in all distributions of the software,
  12  * modified or unmodified, in source code or in binary form.
  13  *
  14  * Copyright (c) 2006 The Regents of The University of Michigan
  15  * All rights reserved.
  16  *
  17  * Redistribution and use in source and binary forms, with or without
  18  * modification, are permitted provided that the following conditions are
  19  * met: redistributions of source code must retain the above copyright
  20  * notice, this list of conditions and the following disclaimer;
  21  * redistributions in binary form must reproduce the above copyright
  22  * notice, this list of conditions and the following disclaimer in the
  23  * documentation and/or other materials provided with the distribution;
  24  * neither the name of the copyright holders nor the names of its
  25  * contributors may be used to endorse or promote products derived from
  26  * this software without specific prior written permission.
  27  *
  28  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  29  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  30  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  31  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  32  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  33  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  34  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  35  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  36  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  37  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  38  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  39  */
  40
  41 /**
  42  * @file
  43  * Declaration of a memory-mapped bridge that connects a requestor
  44  * and a responder through a request and response queue.
  45  */
  46
  47 #ifndef __MEM_BRIDGE_HH__
  48 #define __MEM_BRIDGE_HH__
  49
  50 #include <deque>
  51
  52 #include "base/types.hh"
  53 #include "mem/port.hh"
  54 #include "params/Bridge.hh"
  55 #include "sim/clocked_object.hh"
  56
  57 /**
  58  * A bridge is used to interface two different crossbars (or in general a
  59  * memory-mapped requestor and responder), with buffering for requests and
  60  * responses. The bridge has a fixed delay for packets passing through
  61  * it and responds to a fixed set of address ranges.
  62  *
  63  * The bridge comprises a response port and a request port, that buffer
  64  * outgoing responses and requests respectively. Buffer space is
  65  * reserved when a request arrives, also reserving response space
  66  * before forwarding the request. If there is no space present, then
  67  * the bridge will delay accepting the packet until space becomes
  68  * available.
  69  */
  70 class Bridge : public ClockedObject
  71 {
  72   protected:
  73
  74     /**
  75      * A deferred packet stores a packet along with its scheduled
  76      * transmission time
  77      */
  78     class DeferredPacket
  79     {
  80
  81       public:
  82
  83         const Tick tick;
  84         const PacketPtr pkt;
  85
  86         DeferredPacket(PacketPtr _pkt, Tick _tick) : tick(_tick), pkt(_pkt)
  87         { }
  88     };
  89
  90     // Forward declaration to allow the response port to have a pointer
  91     class BridgeRequestPort;
  92
  93     /**
  94      * The port on the side that receives requests and sends
  95      * responses. The response port has a set of address ranges that it
  96      * is responsible for. The response port also has a buffer for the
  97      * responses not yet sent.
  98      */
  99     class BridgeResponsePort : public ResponsePort
 100     {
 101
 102       private:
 103
 104         /** The bridge to which this port belongs. */
 105         Bridge& bridge;
 106
 107         /**
 108          * Request port on the other side of the bridge.
 109          */
 110         BridgeRequestPort& memSidePort;
 111
 112         /** Minimum request delay though this bridge. */
 113         const Cycles delay;
 114
 115         /** Address ranges to pass through the bridge */
 116         const AddrRangeList ranges;
 117
 118         /**
 119          * Response packet queue. Response packets are held in this
 120          * queue for a specified delay to model the processing delay
 121          * of the bridge. We use a deque as we need to iterate over
 122          * the items for functional accesses.
 123          */
 124         std::deque<DeferredPacket> transmitList;
 125
 126         /** Counter to track the outstanding responses. */
 127         unsigned int outstandingResponses;
 128
 129         /** If we should send a retry when space becomes available. */
 130         bool retryReq;
 131
 132         /** Max queue size for reserved responses. */
 133         unsigned int respQueueLimit;
 134
 135         /**
 136          * Upstream caches need this packet until true is returned, so
 137          * hold it for deletion until a subsequent call
 138          */
 139         std::unique_ptr<Packet> pendingDelete;
 140
 141         /**
 142          * Is this side blocked from accepting new response packets.
 143          *
 144          * @return true if the reserved space has reached the set limit
 145          */
 146         bool respQueueFull() const;
 147
 148         /**
 149          * Handle send event, scheduled when the packet at the head of
 150          * the response queue is ready to transmit (for timing
 151          * accesses only).
 152          */
 153         void trySendTiming();
 154
 155         /** Send event for the response queue. */
 156         EventFunctionWrapper sendEvent;
 157
 158       public:
 159
 160         /**
 161          * Constructor for the BridgeResponsePort.
 162          *
 163          * @param _name the port name including the owner
 164          * @param _bridge the structural owner
 165          * @param _memSidePort the request port on the other
 166          *                       side of the bridge
 167          * @param _delay the delay in cycles from receiving to sending
 168          * @param _resp_limit the size of the response queue
 169          * @param _ranges a number of address ranges to forward
 170          */
 171         BridgeResponsePort(const std::string& _name, Bridge& _bridge,
 172                         BridgeRequestPort& _memSidePort, Cycles _delay,
 173                         int _resp_limit, std::vector<AddrRange> _ranges);
 174
 175         /**
 176          * Queue a response packet to be sent out later and also schedule
 177          * a send if necessary.
 178          *
 179          * @param pkt a response to send out after a delay
 180          * @param when tick when response packet should be sent
 181          */
 182         void schedTimingResp(PacketPtr pkt, Tick when);
 183
 184         /**
 185          * Retry any stalled request that we have failed to accept at
 186          * an earlier point in time. This call will do nothing if no
 187          * request is waiting.
 188          */
 189         void retryStalledReq();
 190
 191       protected:
 192
 193         /** When receiving a timing request from the peer port,
 194             pass it to the bridge. */
 195         bool recvTimingReq(PacketPtr pkt);
 196
 197         /** When receiving a retry request from the peer port,
 198             pass it to the bridge. */
 199         void recvRespRetry();
 200
 201         /** When receiving a Atomic requestfrom the peer port,
 202             pass it to the bridge. */
 203         Tick recvAtomic(PacketPtr pkt);
 204
 205         /** When receiving a Functional request from the peer port,
 206             pass it to the bridge. */
 207         void recvFunctional(PacketPtr pkt);
 208
 209         /** When receiving a address range request the peer port,
 210             pass it to the bridge. */
 211         AddrRangeList getAddrRanges() const;
 212     };
 213
 214
 215     /**
 216      * Port on the side that forwards requests and receives
 217      * responses. The request port has a buffer for the requests not
 218      * yet sent.
 219      */
 220     class BridgeRequestPort : public RequestPort
 221     {
 222
 223       private:
 224
 225         /** The bridge to which this port belongs. */
 226         Bridge& bridge;
 227
 228         /**
 229          * The response port on the other side of the bridge.
 230          */
 231         BridgeResponsePort& cpuSidePort;
 232
 233         /** Minimum delay though this bridge. */
 234         const Cycles delay;
 235
 236         /**
 237          * Request packet queue. Request packets are held in this
 238          * queue for a specified delay to model the processing delay
 239          * of the bridge.  We use a deque as we need to iterate over
 240          * the items for functional accesses.
 241          */
 242         std::deque<DeferredPacket> transmitList;
 243
 244         /** Max queue size for request packets */
 245         const unsigned int reqQueueLimit;
 246
 247         /**
 248          * Handle send event, scheduled when the packet at the head of
 249          * the outbound queue is ready to transmit (for timing
 250          * accesses only).
 251          */
 252         void trySendTiming();
 253
 254         /** Send event for the request queue. */
 255         EventFunctionWrapper sendEvent;
 256
 257       public:
 258
 259         /**
 260          * Constructor for the BridgeRequestPort.
 261          *
 262          * @param _name the port name including the owner
 263          * @param _bridge the structural owner
 264          * @param _cpuSidePort the response port on the other side of
 265          * the bridge
 266          * @param _delay the delay in cycles from receiving to sending
 267          * @param _req_limit the size of the request queue
 268          */
 269         BridgeRequestPort(const std::string& _name, Bridge& _bridge,
 270                          BridgeResponsePort& _cpuSidePort, Cycles _delay,
 271                          int _req_limit);
 272
 273         /**
 274          * Is this side blocked from accepting new request packets.
 275          *
 276          * @return true if the occupied space has reached the set limit
 277          */
 278         bool reqQueueFull() const;
 279
 280         /**
 281          * Queue a request packet to be sent out later and also schedule
 282          * a send if necessary.
 283          *
 284          * @param pkt a request to send out after a delay
 285          * @param when tick when response packet should be sent
 286          */
 287         void schedTimingReq(PacketPtr pkt, Tick when);
 288
 289         /**
 290          * Check a functional request against the packets in our
 291          * request queue.
 292          *
 293          * @param pkt packet to check against
 294          *
 295          * @return true if we find a match
 296          */
 297         bool trySatisfyFunctional(PacketPtr pkt);
 298
 299       protected:
 300
 301         /** When receiving a timing request from the peer port,
 302             pass it to the bridge. */
 303         bool recvTimingResp(PacketPtr pkt);
 304
 305         /** When receiving a retry request from the peer port,
 306             pass it to the bridge. */
 307         void recvReqRetry();
 308     };
 309
 310     /** Response port of the bridge. */
 311     BridgeResponsePort cpuSidePort;
 312
 313     /** Request port of the bridge. */
 314     BridgeRequestPort memSidePort;
 315
 316   public:
 317
 318     Port &getPort(const std::string &if_name,
 319                   PortID idx=InvalidPortID) override;
 320
 321     void init() override;
 322
 323     typedef BridgeParams Params;
 324
 325     Bridge(const Params &p);
 326 };
 327
 328 #endif //__MEM_BRIDGE_HH__