mem-cache: Implement BDI sub-compressors
[gem5.git] / src / mem / cache / SConscript
1 # -*- mode:python -*-
2
3 # Copyright (c) 2006 The Regents of The University of Michigan
4 # All rights reserved.
5 #
6 # Redistribution and use in source and binary forms, with or without
7 # modification, are permitted provided that the following conditions are
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9 # notice, this list of conditions and the following disclaimer;
10 # redistributions in binary form must reproduce the above copyright
11 # notice, this list of conditions and the following disclaimer in the
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13 # neither the name of the copyright holders nor the names of its
14 # contributors may be used to endorse or promote products derived from
15 # this software without specific prior written permission.
16 #
17 # THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
18 # "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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24 # DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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28 #
29 # Authors: Nathan Binkert
30
31 Import('*')
32
33 SimObject('Cache.py')
34
35 Source('base.cc')
36 Source('cache.cc')
37 Source('cache_blk.cc')
38 Source('mshr.cc')
39 Source('mshr_queue.cc')
40 Source('noncoherent_cache.cc')
41 Source('write_queue.cc')
42 Source('write_queue_entry.cc')
43
44 DebugFlag('Cache')
45 DebugFlag('CacheComp')
46 DebugFlag('CachePort')
47 DebugFlag('CacheRepl')
48 DebugFlag('CacheTags')
49 DebugFlag('CacheVerbose')
50 DebugFlag('HWPrefetch')
51
52 # CacheTags is so outrageously verbose, printing the cache's entire tag
53 # array on each timing access, that you should probably have to ask for
54 # it explicitly even above and beyond CacheAll.
55 CompoundFlag('CacheAll', ['Cache', 'CacheComp', 'CachePort', 'CacheRepl',
56 'CacheVerbose', 'HWPrefetch'])
57