src/mem/cache/builder.cc

   1 /*
   2  * Copyright (c) 2003-2005 The Regents of The University of Michigan
   3  * All rights reserved.
   4  *
   5  * Redistribution and use in source and binary forms, with or without
   6  * modification, are permitted provided that the following conditions are
   7  * met: redistributions of source code must retain the above copyright
   8  * notice, this list of conditions and the following disclaimer;
   9  * redistributions in binary form must reproduce the above copyright
  10  * notice, this list of conditions and the following disclaimer in the
  11  * documentation and/or other materials provided with the distribution;
  12  * neither the name of the copyright holders nor the names of its
  13  * contributors may be used to endorse or promote products derived from
  14  * this software without specific prior written permission.
  15  *
  16  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  17  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  18  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  19  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  20  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  21  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  22  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  23  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  24  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  25  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  26  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  27  *
  28  * Authors: Erik Hallnor
  29  *          Nathan Binkert
  30  */
  31
  32 /**
  33  * @file
  34  * Simobject instatiation of caches.
  35  */
  36 #include <list>
  37 #include <vector>
  38
  39 #include "config/the_isa.hh"
  40 #include "mem/cache/base.hh"
  41 #include "mem/cache/cache.hh"
  42 #include "mem/config/cache.hh"
  43 #include "params/BaseCache.hh"
  44
  45 // Tag Templates
  46 #if defined(USE_CACHE_LRU)
  47 #include "mem/cache/tags/lru.hh"
  48 #endif
  49
  50 #if defined(USE_CACHE_FALRU)
  51 #include "mem/cache/tags/fa_lru.hh"
  52 #endif
  53
  54 #if defined(USE_CACHE_IIC)
  55 #include "mem/cache/tags/iic.hh"
  56 #endif
  57
  58
  59 using namespace std;
  60
  61 #define BUILD_CACHE(TAGS, tags)                         \
  62     do {                                                \
  63         Cache<TAGS> *retval =                           \
  64             new Cache<TAGS>(this, tags);            \
  65         return retval;                                  \
  66     } while (0)
  67
  68 #define BUILD_CACHE_PANIC(x) do {                       \
  69         panic("%s not compiled into M5", x);            \
  70     } while (0)
  71
  72 #if defined(USE_CACHE_FALRU)
  73 #define BUILD_FALRU_CACHE do {                              \
  74         FALRU *tags = new FALRU(block_size, size, hit_latency); \
  75         BUILD_CACHE(FALRU, tags);                           \
  76     } while (0)
  77 #else
  78 #define BUILD_FALRU_CACHE BUILD_CACHE_PANIC("falru cache")
  79 #endif
  80
  81 #if defined(USE_CACHE_LRU)
  82 #define BUILD_LRU_CACHE do {                                            \
  83         LRU *tags = new LRU(numSets, block_size, assoc, hit_latency);       \
  84         BUILD_CACHE(LRU, tags);                                         \
  85     } while (0)
  86 #else
  87 #define BUILD_LRU_CACHE BUILD_CACHE_PANIC("lru cache")
  88 #endif
  89
  90 #if defined(USE_CACHE_IIC)
  91 #define BUILD_IIC_CACHE do {                            \
  92         IIC *tags = new IIC(iic_params);                \
  93         BUILD_CACHE(IIC, tags);                         \
  94     } while (0)
  95 #else
  96 #define BUILD_IIC_CACHE BUILD_CACHE_PANIC("iic")
  97 #endif
  98
  99 #define BUILD_CACHES do {                               \
 100         if (repl == NULL) {                             \
 101             if (numSets == 1) {                         \
 102                 BUILD_FALRU_CACHE;                      \
 103             } else {                                    \
 104                BUILD_LRU_CACHE;                    \
 105             }                                           \
 106         } else {                                        \
 107             BUILD_IIC_CACHE;                            \
 108         }                                               \
 109     } while (0)
 110
 111 BaseCache *
 112 BaseCacheParams::create()
 113 {
 114     int numSets = size / (assoc * block_size);
 115     if (subblock_size == 0) {
 116         subblock_size = block_size;
 117     }
 118
 119 #if defined(USE_CACHE_IIC)
 120     // Build IIC params
 121     IIC::Params iic_params;
 122     iic_params.size = size;
 123     iic_params.numSets = numSets;
 124     iic_params.blkSize = block_size;
 125     iic_params.assoc = assoc;
 126     iic_params.hashDelay = hash_delay;
 127     iic_params.hitLatency = hit_latency;
 128     iic_params.rp = repl;
 129     iic_params.subblockSize = subblock_size;
 130 #else
 131     const void *repl = NULL;
 132 #endif
 133
 134     BUILD_CACHES;
 135     return NULL;
 136 }