2 * Copyright (c) 2010-2015 ARM Limited
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder. You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated
11 * unmodified and in its entirety in all distributions of the software,
12 * modified or unmodified, in source code or in binary form.
14 * Copyright (c) 2002-2005 The Regents of The University of Michigan
15 * Copyright (c) 2010,2015 Advanced Micro Devices, Inc.
16 * All rights reserved.
18 * Redistribution and use in source and binary forms, with or without
19 * modification, are permitted provided that the following conditions are
20 * met: redistributions of source code must retain the above copyright
21 * notice, this list of conditions and the following disclaimer;
22 * redistributions in binary form must reproduce the above copyright
23 * notice, this list of conditions and the following disclaimer in the
24 * documentation and/or other materials provided with the distribution;
25 * neither the name of the copyright holders nor the names of its
26 * contributors may be used to endorse or promote products derived from
27 * this software without specific prior written permission.
29 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
30 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
31 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
32 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
33 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
34 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
35 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
36 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
37 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
38 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
39 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
41 * Authors: Erik Hallnor
54 #include "mem/cache/cache.hh"
56 #include "base/misc.hh"
57 #include "base/types.hh"
58 #include "debug/Cache.hh"
59 #include "debug/CachePort.hh"
60 #include "debug/CacheTags.hh"
61 #include "mem/cache/blk.hh"
62 #include "mem/cache/mshr.hh"
63 #include "mem/cache/prefetch/base.hh"
64 #include "sim/sim_exit.hh"
66 Cache::Cache(const CacheParams
*p
)
67 : BaseCache(p
, p
->system
->cacheLineSize()),
69 prefetcher(p
->prefetcher
),
71 prefetchOnAccess(p
->prefetch_on_access
),
72 clusivity(p
->clusivity
),
73 writebackClean(p
->writeback_clean
),
74 tempBlockWriteback(nullptr),
75 writebackTempBlockAtomicEvent(this, false,
76 EventBase::Delayed_Writeback_Pri
)
78 tempBlock
= new CacheBlk();
79 tempBlock
->data
= new uint8_t[blkSize
];
81 cpuSidePort
= new CpuSidePort(p
->name
+ ".cpu_side", this,
83 memSidePort
= new MemSidePort(p
->name
+ ".mem_side", this,
88 prefetcher
->setCache(this);
93 delete [] tempBlock
->data
;
103 BaseCache::regStats();
107 Cache::cmpAndSwap(CacheBlk
*blk
, PacketPtr pkt
)
109 assert(pkt
->isRequest());
111 uint64_t overwrite_val
;
113 uint64_t condition_val64
;
114 uint32_t condition_val32
;
116 int offset
= tags
->extractBlkOffset(pkt
->getAddr());
117 uint8_t *blk_data
= blk
->data
+ offset
;
119 assert(sizeof(uint64_t) >= pkt
->getSize());
121 overwrite_mem
= true;
122 // keep a copy of our possible write value, and copy what is at the
123 // memory address into the packet
124 pkt
->writeData((uint8_t *)&overwrite_val
);
125 pkt
->setData(blk_data
);
127 if (pkt
->req
->isCondSwap()) {
128 if (pkt
->getSize() == sizeof(uint64_t)) {
129 condition_val64
= pkt
->req
->getExtraData();
130 overwrite_mem
= !std::memcmp(&condition_val64
, blk_data
,
132 } else if (pkt
->getSize() == sizeof(uint32_t)) {
133 condition_val32
= (uint32_t)pkt
->req
->getExtraData();
134 overwrite_mem
= !std::memcmp(&condition_val32
, blk_data
,
137 panic("Invalid size for conditional read/write\n");
141 std::memcpy(blk_data
, &overwrite_val
, pkt
->getSize());
142 blk
->status
|= BlkDirty
;
148 Cache::satisfyCpuSideRequest(PacketPtr pkt
, CacheBlk
*blk
,
149 bool deferred_response
, bool pending_downgrade
)
151 assert(pkt
->isRequest());
153 assert(blk
&& blk
->isValid());
154 // Occasionally this is not true... if we are a lower-level cache
155 // satisfying a string of Read and ReadEx requests from
156 // upper-level caches, a Read will mark the block as shared but we
157 // can satisfy a following ReadEx anyway since we can rely on the
158 // Read requester(s) to have buffered the ReadEx snoop and to
159 // invalidate their blocks after receiving them.
160 // assert(!pkt->needsWritable() || blk->isWritable());
161 assert(pkt
->getOffset(blkSize
) + pkt
->getSize() <= blkSize
);
163 // Check RMW operations first since both isRead() and
164 // isWrite() will be true for them
165 if (pkt
->cmd
== MemCmd::SwapReq
) {
166 cmpAndSwap(blk
, pkt
);
167 } else if (pkt
->isWrite()) {
168 // we have the block in a writable state and can go ahead,
169 // note that the line may be also be considered writable in
170 // downstream caches along the path to memory, but always
171 // Exclusive, and never Modified
172 assert(blk
->isWritable());
173 // Write or WriteLine at the first cache with block in writable state
174 if (blk
->checkWrite(pkt
)) {
175 pkt
->writeDataToBlock(blk
->data
, blkSize
);
177 // Always mark the line as dirty (and thus transition to the
178 // Modified state) even if we are a failed StoreCond so we
179 // supply data to any snoops that have appended themselves to
180 // this cache before knowing the store will fail.
181 blk
->status
|= BlkDirty
;
182 DPRINTF(Cache
, "%s for %s addr %#llx size %d (write)\n", __func__
,
183 pkt
->cmdString(), pkt
->getAddr(), pkt
->getSize());
184 } else if (pkt
->isRead()) {
186 blk
->trackLoadLocked(pkt
);
188 pkt
->setDataFromBlock(blk
->data
, blkSize
);
189 // determine if this read is from a (coherent) cache, or not
190 // by looking at the command type; we could potentially add a
191 // packet attribute such as 'FromCache' to make this check a
193 if (pkt
->cmd
== MemCmd::ReadExReq
||
194 pkt
->cmd
== MemCmd::ReadSharedReq
||
195 pkt
->cmd
== MemCmd::ReadCleanReq
||
196 pkt
->cmd
== MemCmd::SCUpgradeFailReq
) {
197 assert(pkt
->getSize() == blkSize
);
198 // special handling for coherent block requests from
199 // upper-level caches
200 if (pkt
->needsWritable()) {
202 assert(pkt
->cmd
== MemCmd::ReadExReq
||
203 pkt
->cmd
== MemCmd::SCUpgradeFailReq
);
205 // if we have a dirty copy, make sure the recipient
206 // keeps it marked dirty (in the modified state)
207 if (blk
->isDirty()) {
208 pkt
->setCacheResponding();
210 // on ReadExReq we give up our copy unconditionally,
211 // even if this cache is mostly inclusive, we may want
213 invalidateBlock(blk
);
214 } else if (blk
->isWritable() && !pending_downgrade
&&
215 !pkt
->hasSharers() &&
216 pkt
->cmd
!= MemCmd::ReadCleanReq
) {
217 // we can give the requester a writable copy on a read
219 // - we have a writable copy at this level (& below)
220 // - we don't have a pending snoop from below
221 // signaling another read request
222 // - no other cache above has a copy (otherwise it
223 // would have set hasSharers flag when
224 // snooping the packet)
225 // - the read has explicitly asked for a clean
227 if (blk
->isDirty()) {
228 // special considerations if we're owner:
229 if (!deferred_response
) {
230 // respond with the line in Modified state
231 // (cacheResponding set, hasSharers not set)
232 pkt
->setCacheResponding();
234 if (clusivity
== Enums::mostly_excl
) {
235 // if this cache is mostly exclusive with
236 // respect to the cache above, drop the
237 // block, no need to first unset the dirty
239 invalidateBlock(blk
);
241 // if this cache is mostly inclusive, we
242 // keep the block in the Exclusive state,
243 // and pass it upwards as Modified
244 // (writable and dirty), hence we have
245 // multiple caches, all on the same path
246 // towards memory, all considering the
247 // same block writable, but only one
248 // considering it Modified
250 // we get away with multiple caches (on
251 // the same path to memory) considering
252 // the block writeable as we always enter
253 // the cache hierarchy through a cache,
254 // and first snoop upwards in all other
256 blk
->status
&= ~BlkDirty
;
259 // if we're responding after our own miss,
260 // there's a window where the recipient didn't
261 // know it was getting ownership and may not
262 // have responded to snoops correctly, so we
263 // have to respond with a shared line
264 pkt
->setHasSharers();
268 // otherwise only respond with a shared copy
269 pkt
->setHasSharers();
273 // Upgrade or Invalidate
274 assert(pkt
->isUpgrade() || pkt
->isInvalidate());
276 // for invalidations we could be looking at the temp block
277 // (for upgrades we always allocate)
278 invalidateBlock(blk
);
279 DPRINTF(Cache
, "%s for %s addr %#llx size %d (invalidation)\n",
280 __func__
, pkt
->cmdString(), pkt
->getAddr(), pkt
->getSize());
285 /////////////////////////////////////////////////////
287 // MSHR helper functions
289 /////////////////////////////////////////////////////
293 Cache::markInService(MSHR
*mshr
, bool pending_modified_resp
)
295 markInServiceInternal(mshr
, pending_modified_resp
);
298 /////////////////////////////////////////////////////
300 // Access path: requests coming in from the CPU side
302 /////////////////////////////////////////////////////
305 Cache::access(PacketPtr pkt
, CacheBlk
*&blk
, Cycles
&lat
,
306 PacketList
&writebacks
)
309 assert(pkt
->isRequest());
311 chatty_assert(!(isReadOnly
&& pkt
->isWrite()),
312 "Should never see a write in a read-only cache %s\n",
315 DPRINTF(Cache
, "%s for %s addr %#llx size %d\n", __func__
,
316 pkt
->cmdString(), pkt
->getAddr(), pkt
->getSize());
318 if (pkt
->req
->isUncacheable()) {
319 DPRINTF(Cache
, "%s%s addr %#llx uncacheable\n", pkt
->cmdString(),
320 pkt
->req
->isInstFetch() ? " (ifetch)" : "",
323 // flush and invalidate any existing block
324 CacheBlk
*old_blk(tags
->findBlock(pkt
->getAddr(), pkt
->isSecure()));
325 if (old_blk
&& old_blk
->isValid()) {
326 if (old_blk
->isDirty() || writebackClean
)
327 writebacks
.push_back(writebackBlk(old_blk
));
329 writebacks
.push_back(cleanEvictBlk(old_blk
));
330 tags
->invalidate(old_blk
);
331 old_blk
->invalidate();
335 // lookupLatency is the latency in case the request is uncacheable.
340 ContextID id
= pkt
->req
->hasContextId() ?
341 pkt
->req
->contextId() : InvalidContextID
;
342 // Here lat is the value passed as parameter to accessBlock() function
343 // that can modify its value.
344 blk
= tags
->accessBlock(pkt
->getAddr(), pkt
->isSecure(), lat
, id
);
346 DPRINTF(Cache
, "%s%s addr %#llx size %d (%s) %s\n", pkt
->cmdString(),
347 pkt
->req
->isInstFetch() ? " (ifetch)" : "",
348 pkt
->getAddr(), pkt
->getSize(), pkt
->isSecure() ? "s" : "ns",
349 blk
? "hit " + blk
->print() : "miss");
352 if (pkt
->isEviction()) {
353 // We check for presence of block in above caches before issuing
354 // Writeback or CleanEvict to write buffer. Therefore the only
355 // possible cases can be of a CleanEvict packet coming from above
356 // encountering a Writeback generated in this cache peer cache and
357 // waiting in the write buffer. Cases of upper level peer caches
358 // generating CleanEvict and Writeback or simply CleanEvict and
359 // CleanEvict almost simultaneously will be caught by snoops sent out
361 std::vector
<MSHR
*> outgoing
;
362 if (writeBuffer
.findMatches(pkt
->getAddr(), pkt
->isSecure(),
364 assert(outgoing
.size() == 1);
365 MSHR
*wb_entry
= outgoing
[0];
366 assert(wb_entry
->getNumTargets() == 1);
367 PacketPtr wbPkt
= wb_entry
->getTarget()->pkt
;
368 assert(wbPkt
->isWriteback());
370 if (pkt
->isCleanEviction()) {
371 // The CleanEvict and WritebackClean snoops into other
372 // peer caches of the same level while traversing the
373 // crossbar. If a copy of the block is found, the
374 // packet is deleted in the crossbar. Hence, none of
375 // the other upper level caches connected to this
376 // cache have the block, so we can clear the
377 // BLOCK_CACHED flag in the Writeback if set and
378 // discard the CleanEvict by returning true.
379 wbPkt
->clearBlockCached();
382 assert(pkt
->cmd
== MemCmd::WritebackDirty
);
383 // Dirty writeback from above trumps our clean
384 // writeback... discard here
385 // Note: markInService will remove entry from writeback buffer.
386 markInService(wb_entry
, false);
392 // Writeback handling is special case. We can write the block into
393 // the cache without having a writeable copy (or any copy at all).
394 if (pkt
->isWriteback()) {
395 assert(blkSize
== pkt
->getSize());
397 // we could get a clean writeback while we are having
398 // outstanding accesses to a block, do the simple thing for
399 // now and drop the clean writeback so that we do not upset
400 // any ordering/decisions about ownership already taken
401 if (pkt
->cmd
== MemCmd::WritebackClean
&&
402 mshrQueue
.findMatch(pkt
->getAddr(), pkt
->isSecure())) {
403 DPRINTF(Cache
, "Clean writeback %#llx to block with MSHR, "
404 "dropping\n", pkt
->getAddr());
409 // need to do a replacement
410 blk
= allocateBlock(pkt
->getAddr(), pkt
->isSecure(), writebacks
);
412 // no replaceable block available: give up, fwd to next level.
416 tags
->insertBlock(pkt
, blk
);
418 blk
->status
= (BlkValid
| BlkReadable
);
419 if (pkt
->isSecure()) {
420 blk
->status
|= BlkSecure
;
423 // only mark the block dirty if we got a writeback command,
424 // and leave it as is for a clean writeback
425 if (pkt
->cmd
== MemCmd::WritebackDirty
) {
426 blk
->status
|= BlkDirty
;
428 // if the packet does not have sharers, it is passing
429 // writable, and we got the writeback in Modified or Exclusive
430 // state, if not we are in the Owned or Shared state
431 if (!pkt
->hasSharers()) {
432 blk
->status
|= BlkWritable
;
434 // nothing else to do; writeback doesn't expect response
435 assert(!pkt
->needsResponse());
436 std::memcpy(blk
->data
, pkt
->getConstPtr
<uint8_t>(), blkSize
);
437 DPRINTF(Cache
, "%s new state is %s\n", __func__
, blk
->print());
440 } else if (pkt
->cmd
== MemCmd::CleanEvict
) {
442 // Found the block in the tags, need to stop CleanEvict from
443 // propagating further down the hierarchy. Returning true will
444 // treat the CleanEvict like a satisfied write request and delete
448 // We didn't find the block here, propagate the CleanEvict further
449 // down the memory hierarchy. Returning false will treat the CleanEvict
450 // like a Writeback which could not find a replaceable block so has to
453 } else if ((blk
!= NULL
) &&
454 (pkt
->needsWritable() ? blk
->isWritable() : blk
->isReadable())) {
455 // OK to satisfy access
457 satisfyCpuSideRequest(pkt
, blk
);
461 // Can't satisfy access normally... either no block (blk == NULL)
462 // or have block but need writable
466 if (blk
== NULL
&& pkt
->isLLSC() && pkt
->isWrite()) {
467 // complete miss on store conditional... just give up now
468 pkt
->req
->setExtraData(0);
476 Cache::doWritebacks(PacketList
& writebacks
, Tick forward_time
)
478 while (!writebacks
.empty()) {
479 PacketPtr wbPkt
= writebacks
.front();
480 // We use forwardLatency here because we are copying writebacks to
481 // write buffer. Call isCachedAbove for both Writebacks and
482 // CleanEvicts. If isCachedAbove returns true we set BLOCK_CACHED flag
483 // in Writebacks and discard CleanEvicts.
484 if (isCachedAbove(wbPkt
)) {
485 if (wbPkt
->cmd
== MemCmd::CleanEvict
) {
486 // Delete CleanEvict because cached copies exist above. The
487 // packet destructor will delete the request object because
488 // this is a non-snoop request packet which does not require a
491 } else if (wbPkt
->cmd
== MemCmd::WritebackClean
) {
492 // clean writeback, do not send since the block is
493 // still cached above
494 assert(writebackClean
);
497 assert(wbPkt
->cmd
== MemCmd::WritebackDirty
);
498 // Set BLOCK_CACHED flag in Writeback and send below, so that
499 // the Writeback does not reset the bit corresponding to this
500 // address in the snoop filter below.
501 wbPkt
->setBlockCached();
502 allocateWriteBuffer(wbPkt
, forward_time
);
505 // If the block is not cached above, send packet below. Both
506 // CleanEvict and Writeback with BLOCK_CACHED flag cleared will
507 // reset the bit corresponding to this address in the snoop filter
509 allocateWriteBuffer(wbPkt
, forward_time
);
511 writebacks
.pop_front();
516 Cache::doWritebacksAtomic(PacketList
& writebacks
)
518 while (!writebacks
.empty()) {
519 PacketPtr wbPkt
= writebacks
.front();
520 // Call isCachedAbove for both Writebacks and CleanEvicts. If
521 // isCachedAbove returns true we set BLOCK_CACHED flag in Writebacks
522 // and discard CleanEvicts.
523 if (isCachedAbove(wbPkt
, false)) {
524 if (wbPkt
->cmd
== MemCmd::WritebackDirty
) {
525 // Set BLOCK_CACHED flag in Writeback and send below,
526 // so that the Writeback does not reset the bit
527 // corresponding to this address in the snoop filter
528 // below. We can discard CleanEvicts because cached
529 // copies exist above. Atomic mode isCachedAbove
530 // modifies packet to set BLOCK_CACHED flag
531 memSidePort
->sendAtomic(wbPkt
);
534 // If the block is not cached above, send packet below. Both
535 // CleanEvict and Writeback with BLOCK_CACHED flag cleared will
536 // reset the bit corresponding to this address in the snoop filter
538 memSidePort
->sendAtomic(wbPkt
);
540 writebacks
.pop_front();
541 // In case of CleanEvicts, the packet destructor will delete the
542 // request object because this is a non-snoop request packet which
543 // does not require a response.
550 Cache::recvTimingSnoopResp(PacketPtr pkt
)
552 DPRINTF(Cache
, "%s for %s addr %#llx size %d\n", __func__
,
553 pkt
->cmdString(), pkt
->getAddr(), pkt
->getSize());
555 assert(pkt
->isResponse());
556 assert(!system
->bypassCaches());
558 // determine if the response is from a snoop request we created
559 // (in which case it should be in the outstandingSnoop), or if we
560 // merely forwarded someone else's snoop request
561 const bool forwardAsSnoop
= outstandingSnoop
.find(pkt
->req
) ==
562 outstandingSnoop
.end();
564 if (!forwardAsSnoop
) {
565 // the packet came from this cache, so sink it here and do not
567 assert(pkt
->cmd
== MemCmd::HardPFResp
);
569 outstandingSnoop
.erase(pkt
->req
);
571 DPRINTF(Cache
, "Got prefetch response from above for addr "
572 "%#llx (%s)\n", pkt
->getAddr(), pkt
->isSecure() ? "s" : "ns");
577 // forwardLatency is set here because there is a response from an
578 // upper level cache.
579 // To pay the delay that occurs if the packet comes from the bus,
580 // we charge also headerDelay.
581 Tick snoop_resp_time
= clockEdge(forwardLatency
) + pkt
->headerDelay
;
582 // Reset the timing of the packet.
583 pkt
->headerDelay
= pkt
->payloadDelay
= 0;
584 memSidePort
->schedTimingSnoopResp(pkt
, snoop_resp_time
);
588 Cache::promoteWholeLineWrites(PacketPtr pkt
)
590 // Cache line clearing instructions
591 if (doFastWrites
&& (pkt
->cmd
== MemCmd::WriteReq
) &&
592 (pkt
->getSize() == blkSize
) && (pkt
->getOffset(blkSize
) == 0)) {
593 pkt
->cmd
= MemCmd::WriteLineReq
;
594 DPRINTF(Cache
, "packet promoted from Write to WriteLineReq\n");
599 Cache::recvTimingReq(PacketPtr pkt
)
601 DPRINTF(CacheTags
, "%s tags: %s\n", __func__
, tags
->print());
603 assert(pkt
->isRequest());
605 // Just forward the packet if caches are disabled.
606 if (system
->bypassCaches()) {
607 // @todo This should really enqueue the packet rather
608 bool M5_VAR_USED success
= memSidePort
->sendTimingReq(pkt
);
613 promoteWholeLineWrites(pkt
);
615 if (pkt
->cacheResponding()) {
616 // a cache above us (but not where the packet came from) is
617 // responding to the request, in other words it has the line
618 // in Modified or Owned state
619 DPRINTF(Cache
, "Cache above responding to %#llx (%s): "
621 pkt
->getAddr(), pkt
->isSecure() ? "s" : "ns");
623 // if the packet needs the block to be writable, and the cache
624 // that has promised to respond (setting the cache responding
625 // flag) is not providing writable (it is in Owned rather than
626 // the Modified state), we know that there may be other Shared
627 // copies in the system; go out and invalidate them all
628 if (pkt
->needsWritable() && !pkt
->responderHadWritable()) {
629 // an upstream cache that had the line in Owned state
630 // (dirty, but not writable), is responding and thus
631 // transferring the dirty line from one branch of the
632 // cache hierarchy to another
634 // send out an express snoop and invalidate all other
635 // copies (snooping a packet that needs writable is the
636 // same as an invalidation), thus turning the Owned line
637 // into a Modified line, note that we don't invalidate the
638 // block in the current cache or any other cache on the
641 // create a downstream express snoop with cleared packet
642 // flags, there is no need to allocate any data as the
643 // packet is merely used to co-ordinate state transitions
644 Packet
*snoop_pkt
= new Packet(pkt
, true, false);
646 // also reset the bus time that the original packet has
648 snoop_pkt
->headerDelay
= snoop_pkt
->payloadDelay
= 0;
650 // make this an instantaneous express snoop, and let the
651 // other caches in the system know that the another cache
652 // is responding, because we have found the authorative
653 // copy (Modified or Owned) that will supply the right
655 snoop_pkt
->setExpressSnoop();
656 snoop_pkt
->setCacheResponding();
658 // this express snoop travels towards the memory, and at
659 // every crossbar it is snooped upwards thus reaching
660 // every cache in the system
661 bool M5_VAR_USED success
= memSidePort
->sendTimingReq(snoop_pkt
);
662 // express snoops always succeed
665 // main memory will delete the snoop packet
668 // queue for deletion, as opposed to immediate deletion, as
669 // the sending cache is still relying on the packet
670 pendingDelete
.reset(pkt
);
672 // no need to take any action in this particular cache as an
673 // upstream cache has already committed to responding, and
674 // either the packet does not need writable (and we can let
675 // the cache that set the cache responding flag pass on the
676 // line without any need for intervention), or if the packet
677 // needs writable it is provided, or we have already sent out
678 // any express snoops in the section above
682 // anything that is merely forwarded pays for the forward latency and
683 // the delay provided by the crossbar
684 Tick forward_time
= clockEdge(forwardLatency
) + pkt
->headerDelay
;
686 // We use lookupLatency here because it is used to specify the latency
688 Cycles lat
= lookupLatency
;
689 CacheBlk
*blk
= NULL
;
690 bool satisfied
= false;
692 PacketList writebacks
;
693 // Note that lat is passed by reference here. The function
694 // access() calls accessBlock() which can modify lat value.
695 satisfied
= access(pkt
, blk
, lat
, writebacks
);
697 // copy writebacks to write buffer here to ensure they logically
698 // proceed anything happening below
699 doWritebacks(writebacks
, forward_time
);
702 // Here we charge the headerDelay that takes into account the latencies
703 // of the bus, if the packet comes from it.
704 // The latency charged it is just lat that is the value of lookupLatency
705 // modified by access() function, or if not just lookupLatency.
706 // In case of a hit we are neglecting response latency.
707 // In case of a miss we are neglecting forward latency.
708 Tick request_time
= clockEdge(lat
) + pkt
->headerDelay
;
709 // Here we reset the timing of the packet.
710 pkt
->headerDelay
= pkt
->payloadDelay
= 0;
712 // track time of availability of next prefetch, if any
713 Tick next_pf_time
= MaxTick
;
715 bool needsResponse
= pkt
->needsResponse();
718 // should never be satisfying an uncacheable access as we
719 // flush and invalidate any existing block as part of the
721 assert(!pkt
->req
->isUncacheable());
723 // hit (for all other request types)
725 if (prefetcher
&& (prefetchOnAccess
|| (blk
&& blk
->wasPrefetched()))) {
727 blk
->status
&= ~BlkHWPrefetched
;
729 // Don't notify on SWPrefetch
730 if (!pkt
->cmd
.isSWPrefetch())
731 next_pf_time
= prefetcher
->notify(pkt
);
735 pkt
->makeTimingResponse();
736 // @todo: Make someone pay for this
737 pkt
->headerDelay
= pkt
->payloadDelay
= 0;
739 // In this case we are considering request_time that takes
740 // into account the delay of the xbar, if any, and just
741 // lat, neglecting responseLatency, modelling hit latency
742 // just as lookupLatency or or the value of lat overriden
743 // by access(), that calls accessBlock() function.
744 cpuSidePort
->schedTimingResp(pkt
, request_time
, true);
746 DPRINTF(Cache
, "%s satisfied %s addr %#llx, no response needed\n",
747 __func__
, pkt
->cmdString(), pkt
->getAddr(),
750 // queue the packet for deletion, as the sending cache is
751 // still relying on it; if the block is found in access(),
752 // CleanEvict and Writeback messages will be deleted
754 pendingDelete
.reset(pkt
);
759 Addr blk_addr
= blockAlign(pkt
->getAddr());
761 // ignore any existing MSHR if we are dealing with an
762 // uncacheable request
763 MSHR
*mshr
= pkt
->req
->isUncacheable() ? nullptr :
764 mshrQueue
.findMatch(blk_addr
, pkt
->isSecure());
766 // Software prefetch handling:
767 // To keep the core from waiting on data it won't look at
768 // anyway, send back a response with dummy data. Miss handling
769 // will continue asynchronously. Unfortunately, the core will
770 // insist upon freeing original Packet/Request, so we have to
771 // create a new pair with a different lifecycle. Note that this
772 // processing happens before any MSHR munging on the behalf of
773 // this request because this new Request will be the one stored
774 // into the MSHRs, not the original.
775 if (pkt
->cmd
.isSWPrefetch()) {
776 assert(needsResponse
);
777 assert(pkt
->req
->hasPaddr());
778 assert(!pkt
->req
->isUncacheable());
780 // There's no reason to add a prefetch as an additional target
781 // to an existing MSHR. If an outstanding request is already
782 // in progress, there is nothing for the prefetch to do.
783 // If this is the case, we don't even create a request at all.
784 PacketPtr pf
= nullptr;
787 // copy the request and create a new SoftPFReq packet
788 RequestPtr req
= new Request(pkt
->req
->getPaddr(),
790 pkt
->req
->getFlags(),
791 pkt
->req
->masterId());
792 pf
= new Packet(req
, pkt
->cmd
);
794 assert(pf
->getAddr() == pkt
->getAddr());
795 assert(pf
->getSize() == pkt
->getSize());
798 pkt
->makeTimingResponse();
799 // for debugging, set all the bits in the response data
800 // (also keeps valgrind from complaining when debugging settings
801 // print out instruction results)
802 std::memset(pkt
->getPtr
<uint8_t>(), 0xFF, pkt
->getSize());
803 // request_time is used here, taking into account lat and the delay
804 // charged if the packet comes from the xbar.
805 cpuSidePort
->schedTimingResp(pkt
, request_time
, true);
807 // If an outstanding request is in progress (we found an
808 // MSHR) this is set to null
814 /// @note writebacks will be checked in getNextMSHR()
815 /// for any conflicting requests to the same block
817 //@todo remove hw_pf here
819 // Coalesce unless it was a software prefetch (see above).
821 assert(!pkt
->isWriteback());
822 // CleanEvicts corresponding to blocks which have
823 // outstanding requests in MSHRs are simply sunk here
824 if (pkt
->cmd
== MemCmd::CleanEvict
) {
825 pendingDelete
.reset(pkt
);
827 DPRINTF(Cache
, "%s coalescing MSHR for %s addr %#llx size %d\n",
828 __func__
, pkt
->cmdString(), pkt
->getAddr(),
831 assert(pkt
->req
->masterId() < system
->maxMasters());
832 mshr_hits
[pkt
->cmdToIndex()][pkt
->req
->masterId()]++;
833 // We use forward_time here because it is the same
834 // considering new targets. We have multiple
835 // requests for the same address here. It
836 // specifies the latency to allocate an internal
837 // buffer and to schedule an event to the queued
838 // port and also takes into account the additional
839 // delay of the xbar.
840 mshr
->allocateTarget(pkt
, forward_time
, order
++,
841 allocOnFill(pkt
->cmd
));
842 if (mshr
->getNumTargets() == numTarget
) {
844 setBlocked(Blocked_NoTargets
);
845 // need to be careful with this... if this mshr isn't
846 // ready yet (i.e. time > curTick()), we don't want to
847 // move it ahead of mshrs that are ready
848 // mshrQueue.moveToFront(mshr);
851 // We should call the prefetcher reguardless if the request is
852 // satisfied or not, reguardless if the request is in the MSHR or
853 // not. The request could be a ReadReq hit, but still not
854 // satisfied (potentially because of a prior write to the same
855 // cache line. So, even when not satisfied, tehre is an MSHR
856 // already allocated for this, we need to let the prefetcher know
859 // Don't notify on SWPrefetch
860 if (!pkt
->cmd
.isSWPrefetch())
861 next_pf_time
= prefetcher
->notify(pkt
);
866 assert(pkt
->req
->masterId() < system
->maxMasters());
867 if (pkt
->req
->isUncacheable()) {
868 mshr_uncacheable
[pkt
->cmdToIndex()][pkt
->req
->masterId()]++;
870 mshr_misses
[pkt
->cmdToIndex()][pkt
->req
->masterId()]++;
873 if (pkt
->isEviction() ||
874 (pkt
->req
->isUncacheable() && pkt
->isWrite())) {
875 // We use forward_time here because there is an
876 // uncached memory write, forwarded to WriteBuffer.
877 allocateWriteBuffer(pkt
, forward_time
);
879 if (blk
&& blk
->isValid()) {
880 // should have flushed and have no valid block
881 assert(!pkt
->req
->isUncacheable());
883 // If we have a write miss to a valid block, we
884 // need to mark the block non-readable. Otherwise
885 // if we allow reads while there's an outstanding
886 // write miss, the read could return stale data
887 // out of the cache block... a more aggressive
888 // system could detect the overlap (if any) and
889 // forward data out of the MSHRs, but we don't do
890 // that yet. Note that we do need to leave the
891 // block valid so that it stays in the cache, in
892 // case we get an upgrade response (and hence no
893 // new data) when the write miss completes.
894 // As long as CPUs do proper store/load forwarding
895 // internally, and have a sufficiently weak memory
896 // model, this is probably unnecessary, but at some
897 // point it must have seemed like we needed it...
898 assert(pkt
->needsWritable());
899 assert(!blk
->isWritable());
900 blk
->status
&= ~BlkReadable
;
902 // Here we are using forward_time, modelling the latency of
903 // a miss (outbound) just as forwardLatency, neglecting the
904 // lookupLatency component.
905 allocateMissBuffer(pkt
, forward_time
);
909 // Don't notify on SWPrefetch
910 if (!pkt
->cmd
.isSWPrefetch())
911 next_pf_time
= prefetcher
->notify(pkt
);
916 if (next_pf_time
!= MaxTick
)
917 schedMemSideSendEvent(next_pf_time
);
923 // See comment in cache.hh.
925 Cache::getBusPacket(PacketPtr cpu_pkt
, CacheBlk
*blk
,
926 bool needsWritable
) const
928 bool blkValid
= blk
&& blk
->isValid();
930 if (cpu_pkt
->req
->isUncacheable()) {
931 // note that at the point we see the uncacheable request we
932 // flush any block, but there could be an outstanding MSHR,
933 // and the cache could have filled again before we actually
934 // send out the forwarded uncacheable request (blk could thus
940 (cpu_pkt
->isUpgrade() ||
941 cpu_pkt
->isEviction())) {
942 // Writebacks that weren't allocated in access() and upgrades
943 // from upper-level caches that missed completely just go
948 assert(cpu_pkt
->needsResponse());
951 // @TODO make useUpgrades a parameter.
952 // Note that ownership protocols require upgrade, otherwise a
953 // write miss on a shared owned block will generate a ReadExcl,
954 // which will clobber the owned copy.
955 const bool useUpgrades
= true;
956 if (blkValid
&& useUpgrades
) {
957 // only reason to be here is that blk is read only and we need
959 assert(needsWritable
);
960 assert(!blk
->isWritable());
961 cmd
= cpu_pkt
->isLLSC() ? MemCmd::SCUpgradeReq
: MemCmd::UpgradeReq
;
962 } else if (cpu_pkt
->cmd
== MemCmd::SCUpgradeFailReq
||
963 cpu_pkt
->cmd
== MemCmd::StoreCondFailReq
) {
964 // Even though this SC will fail, we still need to send out the
965 // request and get the data to supply it to other snoopers in the case
966 // where the determination the StoreCond fails is delayed due to
967 // all caches not being on the same local bus.
968 cmd
= MemCmd::SCUpgradeFailReq
;
969 } else if (cpu_pkt
->cmd
== MemCmd::WriteLineReq
) {
970 // forward as invalidate to all other caches, this gives us
971 // the line in Exclusive state, and invalidates all other
973 cmd
= MemCmd::InvalidateReq
;
976 cmd
= needsWritable
? MemCmd::ReadExReq
:
977 (isReadOnly
? MemCmd::ReadCleanReq
: MemCmd::ReadSharedReq
);
979 PacketPtr pkt
= new Packet(cpu_pkt
->req
, cmd
, blkSize
);
981 // if there are upstream caches that have already marked the
982 // packet as having sharers (not passing writable), pass that info
984 if (cpu_pkt
->hasSharers()) {
985 // note that cpu_pkt may have spent a considerable time in the
986 // MSHR queue and that the information could possibly be out
987 // of date, however, there is no harm in conservatively
988 // assuming the block has sharers
989 pkt
->setHasSharers();
990 DPRINTF(Cache
, "%s passing hasSharers from %s to %s addr %#llx "
992 __func__
, cpu_pkt
->cmdString(), pkt
->cmdString(),
993 pkt
->getAddr(), pkt
->getSize());
996 // the packet should be block aligned
997 assert(pkt
->getAddr() == blockAlign(pkt
->getAddr()));
1000 DPRINTF(Cache
, "%s created %s from %s for addr %#llx size %d\n",
1001 __func__
, pkt
->cmdString(), cpu_pkt
->cmdString(), pkt
->getAddr(),
1008 Cache::recvAtomic(PacketPtr pkt
)
1010 // We are in atomic mode so we pay just for lookupLatency here.
1011 Cycles lat
= lookupLatency
;
1012 // @TODO: make this a parameter
1013 bool last_level_cache
= false;
1015 // Forward the request if the system is in cache bypass mode.
1016 if (system
->bypassCaches())
1017 return ticksToCycles(memSidePort
->sendAtomic(pkt
));
1019 promoteWholeLineWrites(pkt
);
1021 if (pkt
->cacheResponding()) {
1022 // have to invalidate ourselves and any lower caches even if
1023 // upper cache will be responding
1024 if (pkt
->isInvalidate()) {
1025 CacheBlk
*blk
= tags
->findBlock(pkt
->getAddr(), pkt
->isSecure());
1026 if (blk
&& blk
->isValid()) {
1027 tags
->invalidate(blk
);
1029 DPRINTF(Cache
, "Other cache responding to %s on %#llx (%s):"
1031 pkt
->cmdString(), pkt
->getAddr(),
1032 pkt
->isSecure() ? "s" : "ns");
1034 if (!last_level_cache
) {
1035 DPRINTF(Cache
, "Other cache responding to %s on %#llx (%s):"
1037 pkt
->cmdString(), pkt
->getAddr(),
1038 pkt
->isSecure() ? "s" : "ns");
1039 lat
+= ticksToCycles(memSidePort
->sendAtomic(pkt
));
1042 DPRINTF(Cache
, "Other cache responding to %s on %#llx: "
1044 pkt
->cmdString(), pkt
->getAddr());
1047 return lat
* clockPeriod();
1050 // should assert here that there are no outstanding MSHRs or
1051 // writebacks... that would mean that someone used an atomic
1052 // access in timing mode
1054 CacheBlk
*blk
= NULL
;
1055 PacketList writebacks
;
1056 bool satisfied
= access(pkt
, blk
, lat
, writebacks
);
1058 // handle writebacks resulting from the access here to ensure they
1059 // logically proceed anything happening below
1060 doWritebacksAtomic(writebacks
);
1065 PacketPtr bus_pkt
= getBusPacket(pkt
, blk
, pkt
->needsWritable());
1067 bool is_forward
= (bus_pkt
== NULL
);
1070 // just forwarding the same request to the next level
1071 // no local cache operation involved
1075 DPRINTF(Cache
, "Sending an atomic %s for %#llx (%s)\n",
1076 bus_pkt
->cmdString(), bus_pkt
->getAddr(),
1077 bus_pkt
->isSecure() ? "s" : "ns");
1080 CacheBlk::State old_state
= blk
? blk
->status
: 0;
1083 lat
+= ticksToCycles(memSidePort
->sendAtomic(bus_pkt
));
1085 // We are now dealing with the response handling
1086 DPRINTF(Cache
, "Receive response: %s for addr %#llx (%s) in state %i\n",
1087 bus_pkt
->cmdString(), bus_pkt
->getAddr(),
1088 bus_pkt
->isSecure() ? "s" : "ns",
1091 // If packet was a forward, the response (if any) is already
1092 // in place in the bus_pkt == pkt structure, so we don't need
1093 // to do anything. Otherwise, use the separate bus_pkt to
1094 // generate response to pkt and then delete it.
1096 if (pkt
->needsResponse()) {
1097 assert(bus_pkt
->isResponse());
1098 if (bus_pkt
->isError()) {
1099 pkt
->makeAtomicResponse();
1100 pkt
->copyError(bus_pkt
);
1101 } else if (pkt
->cmd
== MemCmd::InvalidateReq
) {
1103 // invalidate response to a cache that received
1104 // an invalidate request
1105 satisfyCpuSideRequest(pkt
, blk
);
1107 } else if (pkt
->cmd
== MemCmd::WriteLineReq
) {
1108 // note the use of pkt, not bus_pkt here.
1110 // write-line request to the cache that promoted
1111 // the write to a whole line
1112 blk
= handleFill(pkt
, blk
, writebacks
,
1113 allocOnFill(pkt
->cmd
));
1114 satisfyCpuSideRequest(pkt
, blk
);
1115 } else if (bus_pkt
->isRead() ||
1116 bus_pkt
->cmd
== MemCmd::UpgradeResp
) {
1117 // we're updating cache state to allow us to
1118 // satisfy the upstream request from the cache
1119 blk
= handleFill(bus_pkt
, blk
, writebacks
,
1120 allocOnFill(pkt
->cmd
));
1121 satisfyCpuSideRequest(pkt
, blk
);
1123 // we're satisfying the upstream request without
1124 // modifying cache state, e.g., a write-through
1125 pkt
->makeAtomicResponse();
1132 // Note that we don't invoke the prefetcher at all in atomic mode.
1133 // It's not clear how to do it properly, particularly for
1134 // prefetchers that aggressively generate prefetch candidates and
1135 // rely on bandwidth contention to throttle them; these will tend
1136 // to pollute the cache in atomic mode since there is no bandwidth
1137 // contention. If we ever do want to enable prefetching in atomic
1138 // mode, though, this is the place to do it... see timingAccess()
1139 // for an example (though we'd want to issue the prefetch(es)
1140 // immediately rather than calling requestMemSideBus() as we do
1143 // do any writebacks resulting from the response handling
1144 doWritebacksAtomic(writebacks
);
1146 // if we used temp block, check to see if its valid and if so
1147 // clear it out, but only do so after the call to recvAtomic is
1148 // finished so that any downstream observers (such as a snoop
1149 // filter), first see the fill, and only then see the eviction
1150 if (blk
== tempBlock
&& tempBlock
->isValid()) {
1151 // the atomic CPU calls recvAtomic for fetch and load/store
1152 // sequentuially, and we may already have a tempBlock
1153 // writeback from the fetch that we have not yet sent
1154 if (tempBlockWriteback
) {
1155 // if that is the case, write the prevoius one back, and
1156 // do not schedule any new event
1157 writebackTempBlockAtomic();
1159 // the writeback/clean eviction happens after the call to
1160 // recvAtomic has finished (but before any successive
1161 // calls), so that the response handling from the fill is
1162 // allowed to happen first
1163 schedule(writebackTempBlockAtomicEvent
, curTick());
1166 tempBlockWriteback
= (blk
->isDirty() || writebackClean
) ?
1167 writebackBlk(blk
) : cleanEvictBlk(blk
);
1171 if (pkt
->needsResponse()) {
1172 pkt
->makeAtomicResponse();
1175 return lat
* clockPeriod();
1180 Cache::functionalAccess(PacketPtr pkt
, bool fromCpuSide
)
1182 if (system
->bypassCaches()) {
1183 // Packets from the memory side are snoop request and
1184 // shouldn't happen in bypass mode.
1185 assert(fromCpuSide
);
1187 // The cache should be flushed if we are in cache bypass mode,
1188 // so we don't need to check if we need to update anything.
1189 memSidePort
->sendFunctional(pkt
);
1193 Addr blk_addr
= blockAlign(pkt
->getAddr());
1194 bool is_secure
= pkt
->isSecure();
1195 CacheBlk
*blk
= tags
->findBlock(pkt
->getAddr(), is_secure
);
1196 MSHR
*mshr
= mshrQueue
.findMatch(blk_addr
, is_secure
);
1198 pkt
->pushLabel(name());
1200 CacheBlkPrintWrapper
cbpw(blk
);
1202 // Note that just because an L2/L3 has valid data doesn't mean an
1203 // L1 doesn't have a more up-to-date modified copy that still
1204 // needs to be found. As a result we always update the request if
1205 // we have it, but only declare it satisfied if we are the owner.
1207 // see if we have data at all (owned or otherwise)
1208 bool have_data
= blk
&& blk
->isValid()
1209 && pkt
->checkFunctional(&cbpw
, blk_addr
, is_secure
, blkSize
,
1212 // data we have is dirty if marked as such or if we have an
1213 // in-service MSHR that is pending a modified line
1215 have_data
&& (blk
->isDirty() ||
1216 (mshr
&& mshr
->inService
&& mshr
->isPendingModified()));
1218 bool done
= have_dirty
1219 || cpuSidePort
->checkFunctional(pkt
)
1220 || mshrQueue
.checkFunctional(pkt
, blk_addr
)
1221 || writeBuffer
.checkFunctional(pkt
, blk_addr
)
1222 || memSidePort
->checkFunctional(pkt
);
1224 DPRINTF(Cache
, "functional %s %#llx (%s) %s%s%s\n",
1225 pkt
->cmdString(), pkt
->getAddr(), is_secure
? "s" : "ns",
1226 (blk
&& blk
->isValid()) ? "valid " : "",
1227 have_data
? "data " : "", done
? "done " : "");
1229 // We're leaving the cache, so pop cache->name() label
1233 pkt
->makeResponse();
1235 // if it came as a request from the CPU side then make sure it
1236 // continues towards the memory side
1238 memSidePort
->sendFunctional(pkt
);
1239 } else if (forwardSnoops
&& cpuSidePort
->isSnooping()) {
1240 // if it came from the memory side, it must be a snoop request
1241 // and we should only forward it if we are forwarding snoops
1242 cpuSidePort
->sendFunctionalSnoop(pkt
);
1248 /////////////////////////////////////////////////////
1250 // Response handling: responses from the memory side
1252 /////////////////////////////////////////////////////
1256 Cache::recvTimingResp(PacketPtr pkt
)
1258 assert(pkt
->isResponse());
1260 // all header delay should be paid for by the crossbar, unless
1261 // this is a prefetch response from above
1262 panic_if(pkt
->headerDelay
!= 0 && pkt
->cmd
!= MemCmd::HardPFResp
,
1263 "%s saw a non-zero packet delay\n", name());
1265 MSHR
*mshr
= dynamic_cast<MSHR
*>(pkt
->senderState
);
1266 bool is_error
= pkt
->isError();
1271 DPRINTF(Cache
, "Cache received packet with error for addr %#llx (%s), "
1272 "cmd: %s\n", pkt
->getAddr(), pkt
->isSecure() ? "s" : "ns",
1276 DPRINTF(Cache
, "Handling response %s for addr %#llx size %d (%s)\n",
1277 pkt
->cmdString(), pkt
->getAddr(), pkt
->getSize(),
1278 pkt
->isSecure() ? "s" : "ns");
1280 MSHRQueue
*mq
= mshr
->queue
;
1281 bool wasFull
= mq
->isFull();
1283 if (mshr
== noTargetMSHR
) {
1284 // we always clear at least one target
1285 clearBlocked(Blocked_NoTargets
);
1286 noTargetMSHR
= NULL
;
1289 // Initial target is used just for stats
1290 MSHR::Target
*initial_tgt
= mshr
->getTarget();
1291 int stats_cmd_idx
= initial_tgt
->pkt
->cmdToIndex();
1292 Tick miss_latency
= curTick() - initial_tgt
->recvTime
;
1293 PacketList writebacks
;
1294 // We need forward_time here because we have a call of
1295 // allocateWriteBuffer() that need this parameter to specify the
1296 // time to request the bus. In this case we use forward latency
1297 // because there is a writeback. We pay also here for headerDelay
1298 // that is charged of bus latencies if the packet comes from the
1300 Tick forward_time
= clockEdge(forwardLatency
) + pkt
->headerDelay
;
1302 if (pkt
->req
->isUncacheable()) {
1303 assert(pkt
->req
->masterId() < system
->maxMasters());
1304 mshr_uncacheable_lat
[stats_cmd_idx
][pkt
->req
->masterId()] +=
1307 assert(pkt
->req
->masterId() < system
->maxMasters());
1308 mshr_miss_latency
[stats_cmd_idx
][pkt
->req
->masterId()] +=
1312 // upgrade deferred targets if the response has no sharers, and is
1313 // thus passing writable
1314 if (!pkt
->hasSharers()) {
1315 mshr
->promoteWritable();
1318 bool is_fill
= !mshr
->isForward
&&
1319 (pkt
->isRead() || pkt
->cmd
== MemCmd::UpgradeResp
);
1321 CacheBlk
*blk
= tags
->findBlock(pkt
->getAddr(), pkt
->isSecure());
1323 if (is_fill
&& !is_error
) {
1324 DPRINTF(Cache
, "Block for addr %#llx being updated in Cache\n",
1327 blk
= handleFill(pkt
, blk
, writebacks
, mshr
->allocOnFill
);
1328 assert(blk
!= NULL
);
1331 // allow invalidation responses originating from write-line
1332 // requests to be discarded
1333 bool is_invalidate
= pkt
->isInvalidate();
1335 // First offset for critical word first calculations
1336 int initial_offset
= initial_tgt
->pkt
->getOffset(blkSize
);
1338 while (mshr
->hasTargets()) {
1339 MSHR::Target
*target
= mshr
->getTarget();
1340 Packet
*tgt_pkt
= target
->pkt
;
1342 switch (target
->source
) {
1343 case MSHR::Target::FromCPU
:
1344 Tick completion_time
;
1345 // Here we charge on completion_time the delay of the xbar if the
1346 // packet comes from it, charged on headerDelay.
1347 completion_time
= pkt
->headerDelay
;
1349 // Software prefetch handling for cache closest to core
1350 if (tgt_pkt
->cmd
.isSWPrefetch()) {
1351 // a software prefetch would have already been ack'd immediately
1352 // with dummy data so the core would be able to retire it.
1353 // this request completes right here, so we deallocate it.
1354 delete tgt_pkt
->req
;
1356 break; // skip response
1359 // unlike the other packet flows, where data is found in other
1360 // caches or memory and brought back, write-line requests always
1361 // have the data right away, so the above check for "is fill?"
1362 // cannot actually be determined until examining the stored MSHR
1363 // state. We "catch up" with that logic here, which is duplicated
1365 if (tgt_pkt
->cmd
== MemCmd::WriteLineReq
) {
1367 // we got the block in a writable state, so promote
1368 // any deferred targets if possible
1369 mshr
->promoteWritable();
1370 // NB: we use the original packet here and not the response!
1371 blk
= handleFill(tgt_pkt
, blk
, writebacks
, mshr
->allocOnFill
);
1372 assert(blk
!= NULL
);
1374 // treat as a fill, and discard the invalidation
1377 is_invalidate
= false;
1381 satisfyCpuSideRequest(tgt_pkt
, blk
,
1382 true, mshr
->hasPostDowngrade());
1384 // How many bytes past the first request is this one
1385 int transfer_offset
=
1386 tgt_pkt
->getOffset(blkSize
) - initial_offset
;
1387 if (transfer_offset
< 0) {
1388 transfer_offset
+= blkSize
;
1391 // If not critical word (offset) return payloadDelay.
1392 // responseLatency is the latency of the return path
1393 // from lower level caches/memory to an upper level cache or
1395 completion_time
+= clockEdge(responseLatency
) +
1396 (transfer_offset
? pkt
->payloadDelay
: 0);
1398 assert(!tgt_pkt
->req
->isUncacheable());
1400 assert(tgt_pkt
->req
->masterId() < system
->maxMasters());
1401 missLatency
[tgt_pkt
->cmdToIndex()][tgt_pkt
->req
->masterId()] +=
1402 completion_time
- target
->recvTime
;
1403 } else if (pkt
->cmd
== MemCmd::UpgradeFailResp
) {
1404 // failed StoreCond upgrade
1405 assert(tgt_pkt
->cmd
== MemCmd::StoreCondReq
||
1406 tgt_pkt
->cmd
== MemCmd::StoreCondFailReq
||
1407 tgt_pkt
->cmd
== MemCmd::SCUpgradeFailReq
);
1408 // responseLatency is the latency of the return path
1409 // from lower level caches/memory to an upper level cache or
1411 completion_time
+= clockEdge(responseLatency
) +
1413 tgt_pkt
->req
->setExtraData(0);
1415 // not a cache fill, just forwarding response
1416 // responseLatency is the latency of the return path
1417 // from lower level cahces/memory to the core.
1418 completion_time
+= clockEdge(responseLatency
) +
1420 if (pkt
->isRead() && !is_error
) {
1422 assert(pkt
->getAddr() == tgt_pkt
->getAddr());
1423 assert(pkt
->getSize() >= tgt_pkt
->getSize());
1425 tgt_pkt
->setData(pkt
->getConstPtr
<uint8_t>());
1428 tgt_pkt
->makeTimingResponse();
1429 // if this packet is an error copy that to the new packet
1431 tgt_pkt
->copyError(pkt
);
1432 if (tgt_pkt
->cmd
== MemCmd::ReadResp
&&
1433 (is_invalidate
|| mshr
->hasPostInvalidate())) {
1434 // If intermediate cache got ReadRespWithInvalidate,
1435 // propagate that. Response should not have
1436 // isInvalidate() set otherwise.
1437 tgt_pkt
->cmd
= MemCmd::ReadRespWithInvalidate
;
1438 DPRINTF(Cache
, "%s updated cmd to %s for addr %#llx\n",
1439 __func__
, tgt_pkt
->cmdString(), tgt_pkt
->getAddr());
1441 // Reset the bus additional time as it is now accounted for
1442 tgt_pkt
->headerDelay
= tgt_pkt
->payloadDelay
= 0;
1443 cpuSidePort
->schedTimingResp(tgt_pkt
, completion_time
, true);
1446 case MSHR::Target::FromPrefetcher
:
1447 assert(tgt_pkt
->cmd
== MemCmd::HardPFReq
);
1449 blk
->status
|= BlkHWPrefetched
;
1450 delete tgt_pkt
->req
;
1454 case MSHR::Target::FromSnoop
:
1455 // I don't believe that a snoop can be in an error state
1457 // response to snoop request
1458 DPRINTF(Cache
, "processing deferred snoop...\n");
1459 assert(!(is_invalidate
&& !mshr
->hasPostInvalidate()));
1460 handleSnoop(tgt_pkt
, blk
, true, true, mshr
->hasPostInvalidate());
1464 panic("Illegal target->source enum %d\n", target
->source
);
1470 if (blk
&& blk
->isValid()) {
1471 // an invalidate response stemming from a write line request
1472 // should not invalidate the block, so check if the
1473 // invalidation should be discarded
1474 if (is_invalidate
|| mshr
->hasPostInvalidate()) {
1475 invalidateBlock(blk
);
1476 } else if (mshr
->hasPostDowngrade()) {
1477 blk
->status
&= ~BlkWritable
;
1481 if (mshr
->promoteDeferredTargets()) {
1482 // avoid later read getting stale data while write miss is
1483 // outstanding.. see comment in timingAccess()
1485 blk
->status
&= ~BlkReadable
;
1488 mq
->markPending(mshr
);
1489 schedMemSideSendEvent(clockEdge() + pkt
->payloadDelay
);
1491 mq
->deallocate(mshr
);
1492 if (wasFull
&& !mq
->isFull()) {
1493 clearBlocked((BlockedCause
)mq
->index
);
1496 // Request the bus for a prefetch if this deallocation freed enough
1497 // MSHRs for a prefetch to take place
1498 if (prefetcher
&& mq
== &mshrQueue
&& mshrQueue
.canPrefetch()) {
1499 Tick next_pf_time
= std::max(prefetcher
->nextPrefetchReadyTime(),
1501 if (next_pf_time
!= MaxTick
)
1502 schedMemSideSendEvent(next_pf_time
);
1505 // reset the xbar additional timinig as it is now accounted for
1506 pkt
->headerDelay
= pkt
->payloadDelay
= 0;
1508 // copy writebacks to write buffer
1509 doWritebacks(writebacks
, forward_time
);
1511 // if we used temp block, check to see if its valid and then clear it out
1512 if (blk
== tempBlock
&& tempBlock
->isValid()) {
1513 // We use forwardLatency here because we are copying
1514 // Writebacks/CleanEvicts to write buffer. It specifies the latency to
1515 // allocate an internal buffer and to schedule an event to the
1517 if (blk
->isDirty() || writebackClean
) {
1518 PacketPtr wbPkt
= writebackBlk(blk
);
1519 allocateWriteBuffer(wbPkt
, forward_time
);
1520 // Set BLOCK_CACHED flag if cached above.
1521 if (isCachedAbove(wbPkt
))
1522 wbPkt
->setBlockCached();
1524 PacketPtr wcPkt
= cleanEvictBlk(blk
);
1525 // Check to see if block is cached above. If not allocate
1527 if (isCachedAbove(wcPkt
))
1530 allocateWriteBuffer(wcPkt
, forward_time
);
1535 DPRINTF(Cache
, "Leaving %s with %s for addr %#llx\n", __func__
,
1536 pkt
->cmdString(), pkt
->getAddr());
1541 Cache::writebackBlk(CacheBlk
*blk
)
1543 chatty_assert(!isReadOnly
|| writebackClean
,
1544 "Writeback from read-only cache");
1545 assert(blk
&& blk
->isValid() && (blk
->isDirty() || writebackClean
));
1547 writebacks
[Request::wbMasterId
]++;
1549 Request
*req
= new Request(tags
->regenerateBlkAddr(blk
->tag
, blk
->set
),
1550 blkSize
, 0, Request::wbMasterId
);
1551 if (blk
->isSecure())
1552 req
->setFlags(Request::SECURE
);
1554 req
->taskId(blk
->task_id
);
1555 blk
->task_id
= ContextSwitchTaskId::Unknown
;
1556 blk
->tickInserted
= curTick();
1559 new Packet(req
, blk
->isDirty() ?
1560 MemCmd::WritebackDirty
: MemCmd::WritebackClean
);
1562 DPRINTF(Cache
, "Create Writeback %#llx writable: %d, dirty: %d\n",
1563 pkt
->getAddr(), blk
->isWritable(), blk
->isDirty());
1565 if (blk
->isWritable()) {
1566 // not asserting shared means we pass the block in modified
1567 // state, mark our own block non-writeable
1568 blk
->status
&= ~BlkWritable
;
1570 // we are in the Owned state, tell the receiver
1571 pkt
->setHasSharers();
1574 // make sure the block is not marked dirty
1575 blk
->status
&= ~BlkDirty
;
1578 std::memcpy(pkt
->getPtr
<uint8_t>(), blk
->data
, blkSize
);
1584 Cache::cleanEvictBlk(CacheBlk
*blk
)
1586 assert(!writebackClean
);
1587 assert(blk
&& blk
->isValid() && !blk
->isDirty());
1588 // Creating a zero sized write, a message to the snoop filter
1590 new Request(tags
->regenerateBlkAddr(blk
->tag
, blk
->set
), blkSize
, 0,
1591 Request::wbMasterId
);
1592 if (blk
->isSecure())
1593 req
->setFlags(Request::SECURE
);
1595 req
->taskId(blk
->task_id
);
1596 blk
->task_id
= ContextSwitchTaskId::Unknown
;
1597 blk
->tickInserted
= curTick();
1599 PacketPtr pkt
= new Packet(req
, MemCmd::CleanEvict
);
1601 DPRINTF(Cache
, "%s%s %x Create CleanEvict\n", pkt
->cmdString(),
1602 pkt
->req
->isInstFetch() ? " (ifetch)" : "",
1609 Cache::memWriteback()
1611 CacheBlkVisitorWrapper
visitor(*this, &Cache::writebackVisitor
);
1612 tags
->forEachBlk(visitor
);
1616 Cache::memInvalidate()
1618 CacheBlkVisitorWrapper
visitor(*this, &Cache::invalidateVisitor
);
1619 tags
->forEachBlk(visitor
);
1623 Cache::isDirty() const
1625 CacheBlkIsDirtyVisitor visitor
;
1626 tags
->forEachBlk(visitor
);
1628 return visitor
.isDirty();
1632 Cache::writebackVisitor(CacheBlk
&blk
)
1634 if (blk
.isDirty()) {
1635 assert(blk
.isValid());
1637 Request
request(tags
->regenerateBlkAddr(blk
.tag
, blk
.set
),
1638 blkSize
, 0, Request::funcMasterId
);
1639 request
.taskId(blk
.task_id
);
1641 Packet
packet(&request
, MemCmd::WriteReq
);
1642 packet
.dataStatic(blk
.data
);
1644 memSidePort
->sendFunctional(&packet
);
1646 blk
.status
&= ~BlkDirty
;
1653 Cache::invalidateVisitor(CacheBlk
&blk
)
1657 warn_once("Invalidating dirty cache lines. Expect things to break.\n");
1659 if (blk
.isValid()) {
1660 assert(!blk
.isDirty());
1661 tags
->invalidate(&blk
);
1669 Cache::allocateBlock(Addr addr
, bool is_secure
, PacketList
&writebacks
)
1671 CacheBlk
*blk
= tags
->findVictim(addr
);
1673 // It is valid to return NULL if there is no victim
1677 if (blk
->isValid()) {
1678 Addr repl_addr
= tags
->regenerateBlkAddr(blk
->tag
, blk
->set
);
1679 MSHR
*repl_mshr
= mshrQueue
.findMatch(repl_addr
, blk
->isSecure());
1681 // must be an outstanding upgrade request
1682 // on a block we're about to replace...
1683 assert(!blk
->isWritable() || blk
->isDirty());
1684 assert(repl_mshr
->needsWritable());
1685 // too hard to replace block with transient state
1686 // allocation failed, block not inserted
1689 DPRINTF(Cache
, "replacement: replacing %#llx (%s) with %#llx (%s): %s\n",
1690 repl_addr
, blk
->isSecure() ? "s" : "ns",
1691 addr
, is_secure
? "s" : "ns",
1692 blk
->isDirty() ? "writeback" : "clean");
1694 // Will send up Writeback/CleanEvict snoops via isCachedAbove
1695 // when pushing this writeback list into the write buffer.
1696 if (blk
->isDirty() || writebackClean
) {
1697 // Save writeback packet for handling by caller
1698 writebacks
.push_back(writebackBlk(blk
));
1700 writebacks
.push_back(cleanEvictBlk(blk
));
1709 Cache::invalidateBlock(CacheBlk
*blk
)
1711 if (blk
!= tempBlock
)
1712 tags
->invalidate(blk
);
1716 // Note that the reason we return a list of writebacks rather than
1717 // inserting them directly in the write buffer is that this function
1718 // is called by both atomic and timing-mode accesses, and in atomic
1719 // mode we don't mess with the write buffer (we just perform the
1720 // writebacks atomically once the original request is complete).
1722 Cache::handleFill(PacketPtr pkt
, CacheBlk
*blk
, PacketList
&writebacks
,
1725 assert(pkt
->isResponse() || pkt
->cmd
== MemCmd::WriteLineReq
);
1726 Addr addr
= pkt
->getAddr();
1727 bool is_secure
= pkt
->isSecure();
1729 CacheBlk::State old_state
= blk
? blk
->status
: 0;
1732 // When handling a fill, discard any CleanEvicts for the
1733 // same address in write buffer.
1734 Addr M5_VAR_USED blk_addr
= blockAlign(pkt
->getAddr());
1735 std::vector
<MSHR
*> M5_VAR_USED wbs
;
1736 assert (!writeBuffer
.findMatches(blk_addr
, is_secure
, wbs
));
1739 // better have read new data...
1740 assert(pkt
->hasData());
1742 // only read responses and write-line requests have data;
1743 // note that we don't write the data here for write-line - that
1744 // happens in the subsequent satisfyCpuSideRequest.
1745 assert(pkt
->isRead() || pkt
->cmd
== MemCmd::WriteLineReq
);
1747 // need to do a replacement if allocating, otherwise we stick
1748 // with the temporary storage
1749 blk
= allocate
? allocateBlock(addr
, is_secure
, writebacks
) : NULL
;
1752 // No replaceable block or a mostly exclusive
1753 // cache... just use temporary storage to complete the
1754 // current request and then get rid of it
1755 assert(!tempBlock
->isValid());
1757 tempBlock
->set
= tags
->extractSet(addr
);
1758 tempBlock
->tag
= tags
->extractTag(addr
);
1759 // @todo: set security state as well...
1760 DPRINTF(Cache
, "using temp block for %#llx (%s)\n", addr
,
1761 is_secure
? "s" : "ns");
1763 tags
->insertBlock(pkt
, blk
);
1766 // we should never be overwriting a valid block
1767 assert(!blk
->isValid());
1769 // existing block... probably an upgrade
1770 assert(blk
->tag
== tags
->extractTag(addr
));
1771 // either we're getting new data or the block should already be valid
1772 assert(pkt
->hasData() || blk
->isValid());
1773 // don't clear block status... if block is already dirty we
1774 // don't want to lose that
1778 blk
->status
|= BlkSecure
;
1779 blk
->status
|= BlkValid
| BlkReadable
;
1781 // sanity check for whole-line writes, which should always be
1782 // marked as writable as part of the fill, and then later marked
1783 // dirty as part of satisfyCpuSideRequest
1784 if (pkt
->cmd
== MemCmd::WriteLineReq
) {
1785 assert(!pkt
->hasSharers());
1786 // at the moment other caches do not respond to the
1787 // invalidation requests corresponding to a whole-line write
1788 assert(!pkt
->cacheResponding());
1791 // here we deal with setting the appropriate state of the line,
1792 // and we start by looking at the hasSharers flag, and ignore the
1793 // cacheResponding flag (normally signalling dirty data) if the
1794 // packet has sharers, thus the line is never allocated as Owned
1795 // (dirty but not writable), and always ends up being either
1796 // Shared, Exclusive or Modified, see Packet::setCacheResponding
1798 if (!pkt
->hasSharers()) {
1799 // we could get a writable line from memory (rather than a
1800 // cache) even in a read-only cache, note that we set this bit
1801 // even for a read-only cache, possibly revisit this decision
1802 blk
->status
|= BlkWritable
;
1804 // check if we got this via cache-to-cache transfer (i.e., from a
1805 // cache that had the block in Modified or Owned state)
1806 if (pkt
->cacheResponding()) {
1807 // we got the block in Modified state, and invalidated the
1809 blk
->status
|= BlkDirty
;
1811 chatty_assert(!isReadOnly
, "Should never see dirty snoop response "
1812 "in read-only cache %s\n", name());
1816 DPRINTF(Cache
, "Block addr %#llx (%s) moving from state %x to %s\n",
1817 addr
, is_secure
? "s" : "ns", old_state
, blk
->print());
1819 // if we got new data, copy it in (checking for a read response
1820 // and a response that has data is the same in the end)
1821 if (pkt
->isRead()) {
1823 assert(pkt
->hasData());
1824 assert(pkt
->getSize() == blkSize
);
1826 std::memcpy(blk
->data
, pkt
->getConstPtr
<uint8_t>(), blkSize
);
1828 // We pay for fillLatency here.
1829 blk
->whenReady
= clockEdge() + fillLatency
* clockPeriod() +
1836 /////////////////////////////////////////////////////
1838 // Snoop path: requests coming in from the memory side
1840 /////////////////////////////////////////////////////
1843 Cache::doTimingSupplyResponse(PacketPtr req_pkt
, const uint8_t *blk_data
,
1844 bool already_copied
, bool pending_inval
)
1847 assert(req_pkt
->isRequest());
1848 assert(req_pkt
->needsResponse());
1850 DPRINTF(Cache
, "%s for %s addr %#llx size %d\n", __func__
,
1851 req_pkt
->cmdString(), req_pkt
->getAddr(), req_pkt
->getSize());
1852 // timing-mode snoop responses require a new packet, unless we
1853 // already made a copy...
1854 PacketPtr pkt
= req_pkt
;
1855 if (!already_copied
)
1856 // do not clear flags, and allocate space for data if the
1857 // packet needs it (the only packets that carry data are read
1859 pkt
= new Packet(req_pkt
, false, req_pkt
->isRead());
1861 assert(req_pkt
->req
->isUncacheable() || req_pkt
->isInvalidate() ||
1863 pkt
->makeTimingResponse();
1864 if (pkt
->isRead()) {
1865 pkt
->setDataFromBlock(blk_data
, blkSize
);
1867 if (pkt
->cmd
== MemCmd::ReadResp
&& pending_inval
) {
1868 // Assume we defer a response to a read from a far-away cache
1869 // A, then later defer a ReadExcl from a cache B on the same
1870 // bus as us. We'll assert cacheResponding in both cases, but
1871 // in the latter case cacheResponding will keep the
1872 // invalidation from reaching cache A. This special response
1873 // tells cache A that it gets the block to satisfy its read,
1874 // but must immediately invalidate it.
1875 pkt
->cmd
= MemCmd::ReadRespWithInvalidate
;
1877 // Here we consider forward_time, paying for just forward latency and
1878 // also charging the delay provided by the xbar.
1879 // forward_time is used as send_time in next allocateWriteBuffer().
1880 Tick forward_time
= clockEdge(forwardLatency
) + pkt
->headerDelay
;
1881 // Here we reset the timing of the packet.
1882 pkt
->headerDelay
= pkt
->payloadDelay
= 0;
1883 DPRINTF(Cache
, "%s created response: %s addr %#llx size %d tick: %lu\n",
1884 __func__
, pkt
->cmdString(), pkt
->getAddr(), pkt
->getSize(),
1886 memSidePort
->schedTimingSnoopResp(pkt
, forward_time
, true);
1890 Cache::handleSnoop(PacketPtr pkt
, CacheBlk
*blk
, bool is_timing
,
1891 bool is_deferred
, bool pending_inval
)
1893 DPRINTF(Cache
, "%s for %s addr %#llx size %d\n", __func__
,
1894 pkt
->cmdString(), pkt
->getAddr(), pkt
->getSize());
1895 // deferred snoops can only happen in timing mode
1896 assert(!(is_deferred
&& !is_timing
));
1897 // pending_inval only makes sense on deferred snoops
1898 assert(!(pending_inval
&& !is_deferred
));
1899 assert(pkt
->isRequest());
1901 // the packet may get modified if we or a forwarded snooper
1902 // responds in atomic mode, so remember a few things about the
1903 // original packet up front
1904 bool invalidate
= pkt
->isInvalidate();
1905 bool M5_VAR_USED needs_writable
= pkt
->needsWritable();
1907 uint32_t snoop_delay
= 0;
1909 if (forwardSnoops
) {
1910 // first propagate snoop upward to see if anyone above us wants to
1911 // handle it. save & restore packet src since it will get
1912 // rewritten to be relative to cpu-side bus (if any)
1913 bool alreadyResponded
= pkt
->cacheResponding();
1915 // copy the packet so that we can clear any flags before
1916 // forwarding it upwards, we also allocate data (passing
1917 // the pointer along in case of static data), in case
1918 // there is a snoop hit in upper levels
1919 Packet
snoopPkt(pkt
, true, true);
1920 snoopPkt
.setExpressSnoop();
1921 // the snoop packet does not need to wait any additional
1923 snoopPkt
.headerDelay
= snoopPkt
.payloadDelay
= 0;
1924 cpuSidePort
->sendTimingSnoopReq(&snoopPkt
);
1926 // add the header delay (including crossbar and snoop
1927 // delays) of the upward snoop to the snoop delay for this
1929 snoop_delay
+= snoopPkt
.headerDelay
;
1931 if (snoopPkt
.cacheResponding()) {
1932 // cache-to-cache response from some upper cache
1933 assert(!alreadyResponded
);
1934 pkt
->setCacheResponding();
1936 // upstream cache has the block, or has an outstanding
1937 // MSHR, pass the flag on
1938 if (snoopPkt
.hasSharers()) {
1939 pkt
->setHasSharers();
1941 // If this request is a prefetch or clean evict and an upper level
1942 // signals block present, make sure to propagate the block
1943 // presence to the requester.
1944 if (snoopPkt
.isBlockCached()) {
1945 pkt
->setBlockCached();
1948 cpuSidePort
->sendAtomicSnoop(pkt
);
1949 if (!alreadyResponded
&& pkt
->cacheResponding()) {
1950 // cache-to-cache response from some upper cache:
1951 // forward response to original requester
1952 assert(pkt
->isResponse());
1957 if (!blk
|| !blk
->isValid()) {
1958 DPRINTF(Cache
, "%s snoop miss for %s addr %#llx size %d\n",
1959 __func__
, pkt
->cmdString(), pkt
->getAddr(), pkt
->getSize());
1962 DPRINTF(Cache
, "%s snoop hit for %s for addr %#llx size %d, "
1963 "old state is %s\n", __func__
, pkt
->cmdString(),
1964 pkt
->getAddr(), pkt
->getSize(), blk
->print());
1967 chatty_assert(!(isReadOnly
&& blk
->isDirty()),
1968 "Should never have a dirty block in a read-only cache %s\n",
1971 // We may end up modifying both the block state and the packet (if
1972 // we respond in atomic mode), so just figure out what to do now
1973 // and then do it later. If we find dirty data while snooping for
1974 // an invalidate, we don't need to send a response. The
1975 // invalidation itself is taken care of below.
1976 bool respond
= blk
->isDirty() && pkt
->needsResponse() &&
1977 pkt
->cmd
!= MemCmd::InvalidateReq
;
1978 bool have_writable
= blk
->isWritable();
1980 // Invalidate any prefetch's from below that would strip write permissions
1981 // MemCmd::HardPFReq is only observed by upstream caches. After missing
1982 // above and in it's own cache, a new MemCmd::ReadReq is created that
1983 // downstream caches observe.
1984 if (pkt
->mustCheckAbove()) {
1985 DPRINTF(Cache
, "Found addr %#llx in upper level cache for snoop %s from"
1986 " lower cache\n", pkt
->getAddr(), pkt
->cmdString());
1987 pkt
->setBlockCached();
1991 if (!pkt
->req
->isUncacheable() && pkt
->isRead() && !invalidate
) {
1992 // reading without requiring the line in a writable state,
1993 // note that we retain the block as Owned if it is Modified
1994 // (dirty data), with the response taken care of below, and
1995 // otherwhise simply downgrade from Exclusive to Shared (or
1996 // remain in Shared)
1997 assert(!needs_writable
);
1998 pkt
->setHasSharers();
1999 blk
->status
&= ~BlkWritable
;
2003 // prevent anyone else from responding, cache as well as
2004 // memory, and also prevent any memory from even seeing the
2006 pkt
->setCacheResponding();
2007 if (have_writable
) {
2008 // inform the cache hierarchy that this cache had the line
2009 // in the Modified state so that we avoid unnecessary
2010 // invalidations (see Packet::setResponderHadWritable)
2011 pkt
->setResponderHadWritable();
2013 // in the case of an uncacheable request there is no point
2014 // in setting the responderHadWritable flag, but since the
2015 // recipient does not care there is no harm in doing so
2017 // if the packet has needsWritable set we invalidate our
2018 // copy below and all other copies will be invalidates
2019 // through express snoops, and if needsWritable is not set
2020 // we already called setHasSharers above
2024 doTimingSupplyResponse(pkt
, blk
->data
, is_deferred
, pending_inval
);
2026 pkt
->makeAtomicResponse();
2027 pkt
->setDataFromBlock(blk
->data
, blkSize
);
2031 if (!respond
&& is_timing
&& is_deferred
) {
2032 // if it's a deferred timing snoop to which we are not
2033 // responding, then we've made a copy of both the request and
2034 // the packet, delete them here
2035 assert(pkt
->needsResponse());
2040 // Do this last in case it deallocates block data or something
2043 invalidateBlock(blk
);
2046 DPRINTF(Cache
, "new state is %s\n", blk
->print());
2053 Cache::recvTimingSnoopReq(PacketPtr pkt
)
2055 DPRINTF(Cache
, "%s for %s addr %#llx size %d\n", __func__
,
2056 pkt
->cmdString(), pkt
->getAddr(), pkt
->getSize());
2058 // Snoops shouldn't happen when bypassing caches
2059 assert(!system
->bypassCaches());
2061 // no need to snoop requests that are not in range
2062 if (!inRange(pkt
->getAddr())) {
2066 bool is_secure
= pkt
->isSecure();
2067 CacheBlk
*blk
= tags
->findBlock(pkt
->getAddr(), is_secure
);
2069 Addr blk_addr
= blockAlign(pkt
->getAddr());
2070 MSHR
*mshr
= mshrQueue
.findMatch(blk_addr
, is_secure
);
2072 // Update the latency cost of the snoop so that the crossbar can
2073 // account for it. Do not overwrite what other neighbouring caches
2074 // have already done, rather take the maximum. The update is
2075 // tentative, for cases where we return before an upward snoop
2077 pkt
->snoopDelay
= std::max
<uint32_t>(pkt
->snoopDelay
,
2078 lookupLatency
* clockPeriod());
2080 // Inform request(Prefetch, CleanEvict or Writeback) from below of
2081 // MSHR hit, set setBlockCached.
2082 if (mshr
&& pkt
->mustCheckAbove()) {
2083 DPRINTF(Cache
, "Setting block cached for %s from"
2084 "lower cache on mshr hit %#x\n",
2085 pkt
->cmdString(), pkt
->getAddr());
2086 pkt
->setBlockCached();
2090 // Let the MSHR itself track the snoop and decide whether we want
2091 // to go ahead and do the regular cache snoop
2092 if (mshr
&& mshr
->handleSnoop(pkt
, order
++)) {
2093 DPRINTF(Cache
, "Deferring snoop on in-service MSHR to blk %#llx (%s)."
2094 "mshrs: %s\n", blk_addr
, is_secure
? "s" : "ns",
2097 if (mshr
->getNumTargets() > numTarget
)
2098 warn("allocating bonus target for snoop"); //handle later
2102 //We also need to check the writeback buffers and handle those
2103 std::vector
<MSHR
*> writebacks
;
2104 if (writeBuffer
.findMatches(blk_addr
, is_secure
, writebacks
)) {
2105 DPRINTF(Cache
, "Snoop hit in writeback to addr %#llx (%s)\n",
2106 pkt
->getAddr(), is_secure
? "s" : "ns");
2108 // Look through writebacks for any cachable writes.
2109 // We should only ever find a single match
2110 assert(writebacks
.size() == 1);
2111 MSHR
*wb_entry
= writebacks
[0];
2112 // Expect to see only Writebacks and/or CleanEvicts here, both of
2113 // which should not be generated for uncacheable data.
2114 assert(!wb_entry
->isUncacheable());
2115 // There should only be a single request responsible for generating
2116 // Writebacks/CleanEvicts.
2117 assert(wb_entry
->getNumTargets() == 1);
2118 PacketPtr wb_pkt
= wb_entry
->getTarget()->pkt
;
2119 assert(wb_pkt
->isEviction());
2121 if (pkt
->isEviction()) {
2122 // if the block is found in the write queue, set the BLOCK_CACHED
2123 // flag for Writeback/CleanEvict snoop. On return the snoop will
2124 // propagate the BLOCK_CACHED flag in Writeback packets and prevent
2125 // any CleanEvicts from travelling down the memory hierarchy.
2126 pkt
->setBlockCached();
2127 DPRINTF(Cache
, "Squashing %s from lower cache on writequeue hit"
2128 " %#x\n", pkt
->cmdString(), pkt
->getAddr());
2132 if (wb_pkt
->cmd
== MemCmd::WritebackDirty
) {
2133 // we have dirty data, and so will proceed to respond
2134 pkt
->setCacheResponding();
2135 if (!pkt
->needsWritable()) {
2136 // the packet should end up in the Shared state (non
2137 // writable) on the completion of the fill
2138 pkt
->setHasSharers();
2139 // similarly, the writeback is no longer passing
2140 // writeable (the receiving cache should consider the
2141 // block Owned rather than Modified)
2142 wb_pkt
->setHasSharers();
2144 // we need to invalidate our copy. we do that
2146 assert(pkt
->isInvalidate());
2148 doTimingSupplyResponse(pkt
, wb_pkt
->getConstPtr
<uint8_t>(),
2151 // on hitting a clean writeback we play it safe and do not
2152 // provide a response, the block may be dirty somewhere
2154 assert(wb_pkt
->isCleanEviction());
2155 // The cache technically holds the block until the
2156 // corresponding message reaches the crossbar
2157 // below. Therefore when a snoop encounters a CleanEvict
2158 // or WritebackClean message we must call
2159 // setHasSharers (just like when it encounters a
2160 // Writeback) to avoid the snoop filter prematurely
2161 // clearing the holder bit in the crossbar below
2162 if (!pkt
->needsWritable()) {
2163 pkt
->setHasSharers();
2164 // the writeback is no longer passing writeable (the
2165 // receiving cache should consider the block Owned
2166 // rather than Modified)
2167 wb_pkt
->setHasSharers();
2169 assert(pkt
->isInvalidate());
2173 if (pkt
->isInvalidate()) {
2174 // Invalidation trumps our writeback... discard here
2175 // Note: markInService will remove entry from writeback buffer.
2176 markInService(wb_entry
, false);
2181 // If this was a shared writeback, there may still be
2182 // other shared copies above that require invalidation.
2183 // We could be more selective and return here if the
2184 // request is non-exclusive or if the writeback is
2186 uint32_t snoop_delay
= handleSnoop(pkt
, blk
, true, false, false);
2188 // Override what we did when we first saw the snoop, as we now
2189 // also have the cost of the upwards snoops to account for
2190 pkt
->snoopDelay
= std::max
<uint32_t>(pkt
->snoopDelay
, snoop_delay
+
2191 lookupLatency
* clockPeriod());
2195 Cache::CpuSidePort::recvTimingSnoopResp(PacketPtr pkt
)
2197 // Express snoop responses from master to slave, e.g., from L1 to L2
2198 cache
->recvTimingSnoopResp(pkt
);
2203 Cache::recvAtomicSnoop(PacketPtr pkt
)
2205 // Snoops shouldn't happen when bypassing caches
2206 assert(!system
->bypassCaches());
2208 // no need to snoop requests that are not in range.
2209 if (!inRange(pkt
->getAddr())) {
2213 CacheBlk
*blk
= tags
->findBlock(pkt
->getAddr(), pkt
->isSecure());
2214 uint32_t snoop_delay
= handleSnoop(pkt
, blk
, false, false, false);
2215 return snoop_delay
+ lookupLatency
* clockPeriod();
2220 Cache::getNextMSHR()
2222 // Check both MSHR queue and write buffer for potential requests,
2223 // note that null does not mean there is no request, it could
2224 // simply be that it is not ready
2225 MSHR
*miss_mshr
= mshrQueue
.getNextMSHR();
2226 MSHR
*write_mshr
= writeBuffer
.getNextMSHR();
2228 // If we got a write buffer request ready, first priority is a
2229 // full write buffer, otherwhise we favour the miss requests
2231 ((writeBuffer
.isFull() && writeBuffer
.inServiceEntries
== 0) ||
2233 // need to search MSHR queue for conflicting earlier miss.
2234 MSHR
*conflict_mshr
=
2235 mshrQueue
.findPending(write_mshr
->blkAddr
,
2236 write_mshr
->isSecure
);
2238 if (conflict_mshr
&& conflict_mshr
->order
< write_mshr
->order
) {
2239 // Service misses in order until conflict is cleared.
2240 return conflict_mshr
;
2242 // @todo Note that we ignore the ready time of the conflict here
2245 // No conflicts; issue write
2247 } else if (miss_mshr
) {
2248 // need to check for conflicting earlier writeback
2249 MSHR
*conflict_mshr
=
2250 writeBuffer
.findPending(miss_mshr
->blkAddr
,
2251 miss_mshr
->isSecure
);
2252 if (conflict_mshr
) {
2253 // not sure why we don't check order here... it was in the
2254 // original code but commented out.
2256 // The only way this happens is if we are
2257 // doing a write and we didn't have permissions
2258 // then subsequently saw a writeback (owned got evicted)
2259 // We need to make sure to perform the writeback first
2260 // To preserve the dirty data, then we can issue the write
2262 // should we return write_mshr here instead? I.e. do we
2263 // have to flush writes in order? I don't think so... not
2264 // for Alpha anyway. Maybe for x86?
2265 return conflict_mshr
;
2267 // @todo Note that we ignore the ready time of the conflict here
2270 // No conflicts; issue read
2274 // fall through... no pending requests. Try a prefetch.
2275 assert(!miss_mshr
&& !write_mshr
);
2276 if (prefetcher
&& mshrQueue
.canPrefetch()) {
2277 // If we have a miss queue slot, we can try a prefetch
2278 PacketPtr pkt
= prefetcher
->getPacket();
2280 Addr pf_addr
= blockAlign(pkt
->getAddr());
2281 if (!tags
->findBlock(pf_addr
, pkt
->isSecure()) &&
2282 !mshrQueue
.findMatch(pf_addr
, pkt
->isSecure()) &&
2283 !writeBuffer
.findMatch(pf_addr
, pkt
->isSecure())) {
2284 // Update statistic on number of prefetches issued
2285 // (hwpf_mshr_misses)
2286 assert(pkt
->req
->masterId() < system
->maxMasters());
2287 mshr_misses
[pkt
->cmdToIndex()][pkt
->req
->masterId()]++;
2289 // allocate an MSHR and return it, note
2290 // that we send the packet straight away, so do not
2291 // schedule the send
2292 return allocateMissBuffer(pkt
, curTick(), false);
2294 // free the request and packet
2305 Cache::isCachedAbove(PacketPtr pkt
, bool is_timing
) const
2309 // Mirroring the flow of HardPFReqs, the cache sends CleanEvict and
2310 // Writeback snoops into upper level caches to check for copies of the
2311 // same block. Using the BLOCK_CACHED flag with the Writeback/CleanEvict
2312 // packet, the cache can inform the crossbar below of presence or absence
2315 Packet
snoop_pkt(pkt
, true, false);
2316 snoop_pkt
.setExpressSnoop();
2317 // Assert that packet is either Writeback or CleanEvict and not a
2318 // prefetch request because prefetch requests need an MSHR and may
2319 // generate a snoop response.
2320 assert(pkt
->isEviction());
2321 snoop_pkt
.senderState
= NULL
;
2322 cpuSidePort
->sendTimingSnoopReq(&snoop_pkt
);
2323 // Writeback/CleanEvict snoops do not generate a snoop response.
2324 assert(!(snoop_pkt
.cacheResponding()));
2325 return snoop_pkt
.isBlockCached();
2327 cpuSidePort
->sendAtomicSnoop(pkt
);
2328 return pkt
->isBlockCached();
2333 Cache::getTimingPacket()
2335 MSHR
*mshr
= getNextMSHR();
2341 // use request from 1st target
2342 PacketPtr tgt_pkt
= mshr
->getTarget()->pkt
;
2343 PacketPtr pkt
= NULL
;
2345 DPRINTF(CachePort
, "%s %s for addr %#llx size %d\n", __func__
,
2346 tgt_pkt
->cmdString(), tgt_pkt
->getAddr(), tgt_pkt
->getSize());
2348 CacheBlk
*blk
= tags
->findBlock(mshr
->blkAddr
, mshr
->isSecure
);
2350 if (tgt_pkt
->cmd
== MemCmd::HardPFReq
&& forwardSnoops
) {
2351 // We need to check the caches above us to verify that
2352 // they don't have a copy of this block in the dirty state
2353 // at the moment. Without this check we could get a stale
2354 // copy from memory that might get used in place of the
2356 Packet
snoop_pkt(tgt_pkt
, true, false);
2357 snoop_pkt
.setExpressSnoop();
2358 // We are sending this packet upwards, but if it hits we will
2359 // get a snoop response that we end up treating just like a
2360 // normal response, hence it needs the MSHR as its sender
2362 snoop_pkt
.senderState
= mshr
;
2363 cpuSidePort
->sendTimingSnoopReq(&snoop_pkt
);
2365 // Check to see if the prefetch was squashed by an upper cache (to
2366 // prevent us from grabbing the line) or if a Check to see if a
2367 // writeback arrived between the time the prefetch was placed in
2368 // the MSHRs and when it was selected to be sent or if the
2369 // prefetch was squashed by an upper cache.
2371 // It is important to check cacheResponding before
2372 // prefetchSquashed. If another cache has committed to
2373 // responding, it will be sending a dirty response which will
2374 // arrive at the MSHR allocated for this request. Checking the
2375 // prefetchSquash first may result in the MSHR being
2376 // prematurely deallocated.
2377 if (snoop_pkt
.cacheResponding()) {
2378 auto M5_VAR_USED r
= outstandingSnoop
.insert(snoop_pkt
.req
);
2381 // if we are getting a snoop response with no sharers it
2382 // will be allocated as Modified
2383 bool pending_modified_resp
= !snoop_pkt
.hasSharers();
2384 markInService(mshr
, pending_modified_resp
);
2386 DPRINTF(Cache
, "Upward snoop of prefetch for addr"
2388 tgt_pkt
->getAddr(), tgt_pkt
->isSecure()? "s": "ns");
2392 if (snoop_pkt
.isBlockCached() || blk
!= NULL
) {
2393 DPRINTF(Cache
, "Block present, prefetch squashed by cache. "
2394 "Deallocating mshr target %#x.\n",
2396 // Deallocate the mshr target
2397 if (mshr
->queue
->forceDeallocateTarget(mshr
)) {
2398 // Clear block if this deallocation resulted freed an
2399 // mshr when all had previously been utilized
2400 clearBlocked((BlockedCause
)(mshr
->queue
->index
));
2406 if (mshr
->isForwardNoResponse()) {
2407 // no response expected, just forward packet as it is
2408 assert(tags
->findBlock(mshr
->blkAddr
, mshr
->isSecure
) == NULL
);
2411 pkt
= getBusPacket(tgt_pkt
, blk
, mshr
->needsWritable());
2413 mshr
->isForward
= (pkt
== NULL
);
2415 if (mshr
->isForward
) {
2416 // not a cache block request, but a response is expected
2417 // make copy of current packet to forward, keep current
2418 // copy for response handling
2419 pkt
= new Packet(tgt_pkt
, false, true);
2420 if (pkt
->isWrite()) {
2421 pkt
->setData(tgt_pkt
->getConstPtr
<uint8_t>());
2426 assert(pkt
!= NULL
);
2427 // play it safe and append (rather than set) the sender state, as
2428 // forwarded packets may already have existing state
2429 pkt
->pushSenderState(mshr
);
2435 Cache::nextMSHRReadyTime() const
2437 Tick nextReady
= std::min(mshrQueue
.nextMSHRReadyTime(),
2438 writeBuffer
.nextMSHRReadyTime());
2440 // Don't signal prefetch ready time if no MSHRs available
2441 // Will signal once enoguh MSHRs are deallocated
2442 if (prefetcher
&& mshrQueue
.canPrefetch()) {
2443 nextReady
= std::min(nextReady
,
2444 prefetcher
->nextPrefetchReadyTime());
2451 Cache::serialize(CheckpointOut
&cp
) const
2453 bool dirty(isDirty());
2456 warn("*** The cache still contains dirty data. ***\n");
2457 warn(" Make sure to drain the system using the correct flags.\n");
2458 warn(" This checkpoint will not restore correctly and dirty data in "
2459 "the cache will be lost!\n");
2462 // Since we don't checkpoint the data in the cache, any dirty data
2463 // will be lost when restoring from a checkpoint of a system that
2464 // wasn't drained properly. Flag the checkpoint as invalid if the
2465 // cache contains dirty data.
2466 bool bad_checkpoint(dirty
);
2467 SERIALIZE_SCALAR(bad_checkpoint
);
2471 Cache::unserialize(CheckpointIn
&cp
)
2473 bool bad_checkpoint
;
2474 UNSERIALIZE_SCALAR(bad_checkpoint
);
2475 if (bad_checkpoint
) {
2476 fatal("Restoring from checkpoints with dirty caches is not supported "
2477 "in the classic memory system. Please remove any caches or "
2478 " drain them properly before taking checkpoints.\n");
2489 Cache::CpuSidePort::getAddrRanges() const
2491 return cache
->getAddrRanges();
2495 Cache::CpuSidePort::recvTimingReq(PacketPtr pkt
)
2497 assert(!cache
->system
->bypassCaches());
2499 bool success
= false;
2501 // always let packets through if an upstream cache has committed
2502 // to responding, even if blocked (we should technically look at
2503 // the isExpressSnoop flag, but it is set by the cache itself, and
2504 // consequently we have to rely on the cacheResponding flag)
2505 if (pkt
->cacheResponding()) {
2506 // do not change the current retry state
2507 bool M5_VAR_USED bypass_success
= cache
->recvTimingReq(pkt
);
2508 assert(bypass_success
);
2510 } else if (blocked
|| mustSendRetry
) {
2511 // either already committed to send a retry, or blocked
2514 // pass it on to the cache, and let the cache decide if we
2515 // have to retry or not
2516 success
= cache
->recvTimingReq(pkt
);
2519 // remember if we have to retry
2520 mustSendRetry
= !success
;
2525 Cache::CpuSidePort::recvAtomic(PacketPtr pkt
)
2527 return cache
->recvAtomic(pkt
);
2531 Cache::CpuSidePort::recvFunctional(PacketPtr pkt
)
2533 // functional request
2534 cache
->functionalAccess(pkt
, true);
2538 CpuSidePort::CpuSidePort(const std::string
&_name
, Cache
*_cache
,
2539 const std::string
&_label
)
2540 : BaseCache::CacheSlavePort(_name
, _cache
, _label
), cache(_cache
)
2545 CacheParams::create()
2549 return new Cache(this);
2558 Cache::MemSidePort::recvTimingResp(PacketPtr pkt
)
2560 cache
->recvTimingResp(pkt
);
2564 // Express snooping requests to memside port
2566 Cache::MemSidePort::recvTimingSnoopReq(PacketPtr pkt
)
2568 // handle snooping requests
2569 cache
->recvTimingSnoopReq(pkt
);
2573 Cache::MemSidePort::recvAtomicSnoop(PacketPtr pkt
)
2575 return cache
->recvAtomicSnoop(pkt
);
2579 Cache::MemSidePort::recvFunctionalSnoop(PacketPtr pkt
)
2581 // functional snoop (note that in contrast to atomic we don't have
2582 // a specific functionalSnoop method, as they have the same
2583 // behaviour regardless)
2584 cache
->functionalAccess(pkt
, false);
2588 Cache::CacheReqPacketQueue::sendDeferredPacket()
2591 assert(!waitingOnRetry
);
2593 // there should never be any deferred request packets in the
2594 // queue, instead we resly on the cache to provide the packets
2595 // from the MSHR queue or write queue
2596 assert(deferredPacketReadyTime() == MaxTick
);
2598 // check for request packets (requests & writebacks)
2599 PacketPtr pkt
= cache
.getTimingPacket();
2601 // can happen if e.g. we attempt a writeback and fail, but
2602 // before the retry, the writeback is eliminated because
2603 // we snoop another cache's ReadEx.
2605 MSHR
*mshr
= dynamic_cast<MSHR
*>(pkt
->senderState
);
2606 // in most cases getTimingPacket allocates a new packet, and
2607 // we must delete it unless it is successfully sent
2608 bool delete_pkt
= !mshr
->isForwardNoResponse();
2610 // let our snoop responses go first if there are responses to
2611 // the same addresses we are about to writeback, note that
2612 // this creates a dependency between requests and snoop
2613 // responses, but that should not be a problem since there is
2614 // a chain already and the key is that the snoop responses can
2615 // sink unconditionally
2616 if (snoopRespQueue
.hasAddr(pkt
->getAddr())) {
2617 DPRINTF(CachePort
, "Waiting for snoop response to be sent\n");
2618 Tick when
= snoopRespQueue
.deferredPacketReadyTime();
2619 schedSendEvent(when
);
2628 waitingOnRetry
= !masterPort
.sendTimingReq(pkt
);
2630 if (waitingOnRetry
) {
2631 DPRINTF(CachePort
, "now waiting on a retry\n");
2633 // we are awaiting a retry, but we
2634 // delete the packet and will be creating a new packet
2635 // when we get the opportunity
2638 // note that we have now masked any requestBus and
2639 // schedSendEvent (we will wait for a retry before
2640 // doing anything), and this is so even if we do not
2641 // care about this packet and might override it before
2644 // As part of the call to sendTimingReq the packet is
2645 // forwarded to all neighbouring caches (and any caches
2646 // above them) as a snoop. Thus at this point we know if
2647 // any of the neighbouring caches are responding, and if
2648 // so, we know it is dirty, and we can determine if it is
2649 // being passed as Modified, making our MSHR the ordering
2651 bool pending_modified_resp
= !pkt
->hasSharers() &&
2652 pkt
->cacheResponding();
2654 cache
.markInService(mshr
, pending_modified_resp
);
2658 // if we succeeded and are not waiting for a retry, schedule the
2659 // next send considering when the next MSHR is ready, note that
2660 // snoop responses have their own packet queue and thus schedule
2662 if (!waitingOnRetry
) {
2663 schedSendEvent(cache
.nextMSHRReadyTime());
2668 MemSidePort::MemSidePort(const std::string
&_name
, Cache
*_cache
,
2669 const std::string
&_label
)
2670 : BaseCache::CacheMasterPort(_name
, _cache
, _reqQueue
, _snoopRespQueue
),
2671 _reqQueue(*_cache
, *this, _snoopRespQueue
, _label
),
2672 _snoopRespQueue(*_cache
, *this, _label
), cache(_cache
)