2 * Copyright (c) 2010-2016 ARM Limited
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder. You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated
11 * unmodified and in its entirety in all distributions of the software,
12 * modified or unmodified, in source code or in binary form.
14 * Copyright (c) 2002-2005 The Regents of The University of Michigan
15 * Copyright (c) 2010,2015 Advanced Micro Devices, Inc.
16 * All rights reserved.
18 * Redistribution and use in source and binary forms, with or without
19 * modification, are permitted provided that the following conditions are
20 * met: redistributions of source code must retain the above copyright
21 * notice, this list of conditions and the following disclaimer;
22 * redistributions in binary form must reproduce the above copyright
23 * notice, this list of conditions and the following disclaimer in the
24 * documentation and/or other materials provided with the distribution;
25 * neither the name of the copyright holders nor the names of its
26 * contributors may be used to endorse or promote products derived from
27 * this software without specific prior written permission.
29 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
30 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
31 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
32 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
33 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
34 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
35 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
36 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
37 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
38 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
39 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
41 * Authors: Erik Hallnor
54 #include "mem/cache/cache.hh"
56 #include "base/misc.hh"
57 #include "base/types.hh"
58 #include "debug/Cache.hh"
59 #include "debug/CachePort.hh"
60 #include "debug/CacheTags.hh"
61 #include "debug/CacheVerbose.hh"
62 #include "mem/cache/blk.hh"
63 #include "mem/cache/mshr.hh"
64 #include "mem/cache/prefetch/base.hh"
65 #include "sim/sim_exit.hh"
67 Cache::Cache(const CacheParams
*p
)
68 : BaseCache(p
, p
->system
->cacheLineSize()),
70 prefetcher(p
->prefetcher
),
72 prefetchOnAccess(p
->prefetch_on_access
),
73 clusivity(p
->clusivity
),
74 writebackClean(p
->writeback_clean
),
75 tempBlockWriteback(nullptr),
76 writebackTempBlockAtomicEvent(this, false,
77 EventBase::Delayed_Writeback_Pri
)
79 tempBlock
= new CacheBlk();
80 tempBlock
->data
= new uint8_t[blkSize
];
82 cpuSidePort
= new CpuSidePort(p
->name
+ ".cpu_side", this,
84 memSidePort
= new MemSidePort(p
->name
+ ".mem_side", this,
89 prefetcher
->setCache(this);
94 delete [] tempBlock
->data
;
104 BaseCache::regStats();
108 Cache::cmpAndSwap(CacheBlk
*blk
, PacketPtr pkt
)
110 assert(pkt
->isRequest());
112 uint64_t overwrite_val
;
114 uint64_t condition_val64
;
115 uint32_t condition_val32
;
117 int offset
= tags
->extractBlkOffset(pkt
->getAddr());
118 uint8_t *blk_data
= blk
->data
+ offset
;
120 assert(sizeof(uint64_t) >= pkt
->getSize());
122 overwrite_mem
= true;
123 // keep a copy of our possible write value, and copy what is at the
124 // memory address into the packet
125 pkt
->writeData((uint8_t *)&overwrite_val
);
126 pkt
->setData(blk_data
);
128 if (pkt
->req
->isCondSwap()) {
129 if (pkt
->getSize() == sizeof(uint64_t)) {
130 condition_val64
= pkt
->req
->getExtraData();
131 overwrite_mem
= !std::memcmp(&condition_val64
, blk_data
,
133 } else if (pkt
->getSize() == sizeof(uint32_t)) {
134 condition_val32
= (uint32_t)pkt
->req
->getExtraData();
135 overwrite_mem
= !std::memcmp(&condition_val32
, blk_data
,
138 panic("Invalid size for conditional read/write\n");
142 std::memcpy(blk_data
, &overwrite_val
, pkt
->getSize());
143 blk
->status
|= BlkDirty
;
149 Cache::satisfyCpuSideRequest(PacketPtr pkt
, CacheBlk
*blk
,
150 bool deferred_response
, bool pending_downgrade
)
152 assert(pkt
->isRequest());
154 assert(blk
&& blk
->isValid());
155 // Occasionally this is not true... if we are a lower-level cache
156 // satisfying a string of Read and ReadEx requests from
157 // upper-level caches, a Read will mark the block as shared but we
158 // can satisfy a following ReadEx anyway since we can rely on the
159 // Read requester(s) to have buffered the ReadEx snoop and to
160 // invalidate their blocks after receiving them.
161 // assert(!pkt->needsWritable() || blk->isWritable());
162 assert(pkt
->getOffset(blkSize
) + pkt
->getSize() <= blkSize
);
164 // Check RMW operations first since both isRead() and
165 // isWrite() will be true for them
166 if (pkt
->cmd
== MemCmd::SwapReq
) {
167 cmpAndSwap(blk
, pkt
);
168 } else if (pkt
->isWrite()) {
169 // we have the block in a writable state and can go ahead,
170 // note that the line may be also be considered writable in
171 // downstream caches along the path to memory, but always
172 // Exclusive, and never Modified
173 assert(blk
->isWritable());
174 // Write or WriteLine at the first cache with block in writable state
175 if (blk
->checkWrite(pkt
)) {
176 pkt
->writeDataToBlock(blk
->data
, blkSize
);
178 // Always mark the line as dirty (and thus transition to the
179 // Modified state) even if we are a failed StoreCond so we
180 // supply data to any snoops that have appended themselves to
181 // this cache before knowing the store will fail.
182 blk
->status
|= BlkDirty
;
183 DPRINTF(CacheVerbose
, "%s for %s addr %#llx size %d (write)\n",
184 __func__
, pkt
->cmdString(), pkt
->getAddr(), pkt
->getSize());
185 } else if (pkt
->isRead()) {
187 blk
->trackLoadLocked(pkt
);
190 // all read responses have a data payload
191 assert(pkt
->hasRespData());
192 pkt
->setDataFromBlock(blk
->data
, blkSize
);
194 // determine if this read is from a (coherent) cache, or not
195 // by looking at the command type; we could potentially add a
196 // packet attribute such as 'FromCache' to make this check a
198 if (pkt
->cmd
== MemCmd::ReadExReq
||
199 pkt
->cmd
== MemCmd::ReadSharedReq
||
200 pkt
->cmd
== MemCmd::ReadCleanReq
||
201 pkt
->cmd
== MemCmd::SCUpgradeFailReq
) {
202 assert(pkt
->getSize() == blkSize
);
203 // special handling for coherent block requests from
204 // upper-level caches
205 if (pkt
->needsWritable()) {
207 assert(pkt
->cmd
== MemCmd::ReadExReq
||
208 pkt
->cmd
== MemCmd::SCUpgradeFailReq
);
210 // if we have a dirty copy, make sure the recipient
211 // keeps it marked dirty (in the modified state)
212 if (blk
->isDirty()) {
213 pkt
->setCacheResponding();
215 // on ReadExReq we give up our copy unconditionally,
216 // even if this cache is mostly inclusive, we may want
218 invalidateBlock(blk
);
219 } else if (blk
->isWritable() && !pending_downgrade
&&
220 !pkt
->hasSharers() &&
221 pkt
->cmd
!= MemCmd::ReadCleanReq
) {
222 // we can give the requester a writable copy on a read
224 // - we have a writable copy at this level (& below)
225 // - we don't have a pending snoop from below
226 // signaling another read request
227 // - no other cache above has a copy (otherwise it
228 // would have set hasSharers flag when
229 // snooping the packet)
230 // - the read has explicitly asked for a clean
232 if (blk
->isDirty()) {
233 // special considerations if we're owner:
234 if (!deferred_response
) {
235 // respond with the line in Modified state
236 // (cacheResponding set, hasSharers not set)
237 pkt
->setCacheResponding();
239 if (clusivity
== Enums::mostly_excl
) {
240 // if this cache is mostly exclusive with
241 // respect to the cache above, drop the
242 // block, no need to first unset the dirty
244 invalidateBlock(blk
);
246 // if this cache is mostly inclusive, we
247 // keep the block in the Exclusive state,
248 // and pass it upwards as Modified
249 // (writable and dirty), hence we have
250 // multiple caches, all on the same path
251 // towards memory, all considering the
252 // same block writable, but only one
253 // considering it Modified
255 // we get away with multiple caches (on
256 // the same path to memory) considering
257 // the block writeable as we always enter
258 // the cache hierarchy through a cache,
259 // and first snoop upwards in all other
261 blk
->status
&= ~BlkDirty
;
264 // if we're responding after our own miss,
265 // there's a window where the recipient didn't
266 // know it was getting ownership and may not
267 // have responded to snoops correctly, so we
268 // have to respond with a shared line
269 pkt
->setHasSharers();
273 // otherwise only respond with a shared copy
274 pkt
->setHasSharers();
278 // Upgrade or Invalidate
279 assert(pkt
->isUpgrade() || pkt
->isInvalidate());
281 // for invalidations we could be looking at the temp block
282 // (for upgrades we always allocate)
283 invalidateBlock(blk
);
284 DPRINTF(CacheVerbose
, "%s for %s addr %#llx size %d (invalidation)\n",
285 __func__
, pkt
->cmdString(), pkt
->getAddr(), pkt
->getSize());
289 /////////////////////////////////////////////////////
291 // Access path: requests coming in from the CPU side
293 /////////////////////////////////////////////////////
296 Cache::access(PacketPtr pkt
, CacheBlk
*&blk
, Cycles
&lat
,
297 PacketList
&writebacks
)
300 assert(pkt
->isRequest());
302 chatty_assert(!(isReadOnly
&& pkt
->isWrite()),
303 "Should never see a write in a read-only cache %s\n",
306 DPRINTF(CacheVerbose
, "%s for %s addr %#llx size %d\n", __func__
,
307 pkt
->cmdString(), pkt
->getAddr(), pkt
->getSize());
309 if (pkt
->req
->isUncacheable()) {
310 DPRINTF(Cache
, "%s%s addr %#llx uncacheable\n", pkt
->cmdString(),
311 pkt
->req
->isInstFetch() ? " (ifetch)" : "",
314 // flush and invalidate any existing block
315 CacheBlk
*old_blk(tags
->findBlock(pkt
->getAddr(), pkt
->isSecure()));
316 if (old_blk
&& old_blk
->isValid()) {
317 if (old_blk
->isDirty() || writebackClean
)
318 writebacks
.push_back(writebackBlk(old_blk
));
320 writebacks
.push_back(cleanEvictBlk(old_blk
));
321 tags
->invalidate(old_blk
);
322 old_blk
->invalidate();
326 // lookupLatency is the latency in case the request is uncacheable.
331 ContextID id
= pkt
->req
->hasContextId() ?
332 pkt
->req
->contextId() : InvalidContextID
;
333 // Here lat is the value passed as parameter to accessBlock() function
334 // that can modify its value.
335 blk
= tags
->accessBlock(pkt
->getAddr(), pkt
->isSecure(), lat
, id
);
337 DPRINTF(Cache
, "%s%s addr %#llx size %d (%s) %s\n", pkt
->cmdString(),
338 pkt
->req
->isInstFetch() ? " (ifetch)" : "",
339 pkt
->getAddr(), pkt
->getSize(), pkt
->isSecure() ? "s" : "ns",
340 blk
? "hit " + blk
->print() : "miss");
343 if (pkt
->isEviction()) {
344 // We check for presence of block in above caches before issuing
345 // Writeback or CleanEvict to write buffer. Therefore the only
346 // possible cases can be of a CleanEvict packet coming from above
347 // encountering a Writeback generated in this cache peer cache and
348 // waiting in the write buffer. Cases of upper level peer caches
349 // generating CleanEvict and Writeback or simply CleanEvict and
350 // CleanEvict almost simultaneously will be caught by snoops sent out
352 WriteQueueEntry
*wb_entry
= writeBuffer
.findMatch(pkt
->getAddr(),
355 assert(wb_entry
->getNumTargets() == 1);
356 PacketPtr wbPkt
= wb_entry
->getTarget()->pkt
;
357 assert(wbPkt
->isWriteback());
359 if (pkt
->isCleanEviction()) {
360 // The CleanEvict and WritebackClean snoops into other
361 // peer caches of the same level while traversing the
362 // crossbar. If a copy of the block is found, the
363 // packet is deleted in the crossbar. Hence, none of
364 // the other upper level caches connected to this
365 // cache have the block, so we can clear the
366 // BLOCK_CACHED flag in the Writeback if set and
367 // discard the CleanEvict by returning true.
368 wbPkt
->clearBlockCached();
371 assert(pkt
->cmd
== MemCmd::WritebackDirty
);
372 // Dirty writeback from above trumps our clean
373 // writeback... discard here
374 // Note: markInService will remove entry from writeback buffer.
375 markInService(wb_entry
);
381 // Writeback handling is special case. We can write the block into
382 // the cache without having a writeable copy (or any copy at all).
383 if (pkt
->isWriteback()) {
384 assert(blkSize
== pkt
->getSize());
386 // we could get a clean writeback while we are having
387 // outstanding accesses to a block, do the simple thing for
388 // now and drop the clean writeback so that we do not upset
389 // any ordering/decisions about ownership already taken
390 if (pkt
->cmd
== MemCmd::WritebackClean
&&
391 mshrQueue
.findMatch(pkt
->getAddr(), pkt
->isSecure())) {
392 DPRINTF(Cache
, "Clean writeback %#llx to block with MSHR, "
393 "dropping\n", pkt
->getAddr());
398 // need to do a replacement
399 blk
= allocateBlock(pkt
->getAddr(), pkt
->isSecure(), writebacks
);
401 // no replaceable block available: give up, fwd to next level.
405 tags
->insertBlock(pkt
, blk
);
407 blk
->status
= (BlkValid
| BlkReadable
);
408 if (pkt
->isSecure()) {
409 blk
->status
|= BlkSecure
;
412 // only mark the block dirty if we got a writeback command,
413 // and leave it as is for a clean writeback
414 if (pkt
->cmd
== MemCmd::WritebackDirty
) {
415 blk
->status
|= BlkDirty
;
417 // if the packet does not have sharers, it is passing
418 // writable, and we got the writeback in Modified or Exclusive
419 // state, if not we are in the Owned or Shared state
420 if (!pkt
->hasSharers()) {
421 blk
->status
|= BlkWritable
;
423 // nothing else to do; writeback doesn't expect response
424 assert(!pkt
->needsResponse());
425 std::memcpy(blk
->data
, pkt
->getConstPtr
<uint8_t>(), blkSize
);
426 DPRINTF(Cache
, "%s new state is %s\n", __func__
, blk
->print());
429 } else if (pkt
->cmd
== MemCmd::CleanEvict
) {
431 // Found the block in the tags, need to stop CleanEvict from
432 // propagating further down the hierarchy. Returning true will
433 // treat the CleanEvict like a satisfied write request and delete
437 // We didn't find the block here, propagate the CleanEvict further
438 // down the memory hierarchy. Returning false will treat the CleanEvict
439 // like a Writeback which could not find a replaceable block so has to
442 } else if ((blk
!= NULL
) &&
443 (pkt
->needsWritable() ? blk
->isWritable() : blk
->isReadable())) {
444 // OK to satisfy access
446 satisfyCpuSideRequest(pkt
, blk
);
450 // Can't satisfy access normally... either no block (blk == NULL)
451 // or have block but need writable
455 if (blk
== NULL
&& pkt
->isLLSC() && pkt
->isWrite()) {
456 // complete miss on store conditional... just give up now
457 pkt
->req
->setExtraData(0);
465 Cache::doWritebacks(PacketList
& writebacks
, Tick forward_time
)
467 while (!writebacks
.empty()) {
468 PacketPtr wbPkt
= writebacks
.front();
469 // We use forwardLatency here because we are copying writebacks to
470 // write buffer. Call isCachedAbove for both Writebacks and
471 // CleanEvicts. If isCachedAbove returns true we set BLOCK_CACHED flag
472 // in Writebacks and discard CleanEvicts.
473 if (isCachedAbove(wbPkt
)) {
474 if (wbPkt
->cmd
== MemCmd::CleanEvict
) {
475 // Delete CleanEvict because cached copies exist above. The
476 // packet destructor will delete the request object because
477 // this is a non-snoop request packet which does not require a
480 } else if (wbPkt
->cmd
== MemCmd::WritebackClean
) {
481 // clean writeback, do not send since the block is
482 // still cached above
483 assert(writebackClean
);
486 assert(wbPkt
->cmd
== MemCmd::WritebackDirty
);
487 // Set BLOCK_CACHED flag in Writeback and send below, so that
488 // the Writeback does not reset the bit corresponding to this
489 // address in the snoop filter below.
490 wbPkt
->setBlockCached();
491 allocateWriteBuffer(wbPkt
, forward_time
);
494 // If the block is not cached above, send packet below. Both
495 // CleanEvict and Writeback with BLOCK_CACHED flag cleared will
496 // reset the bit corresponding to this address in the snoop filter
498 allocateWriteBuffer(wbPkt
, forward_time
);
500 writebacks
.pop_front();
505 Cache::doWritebacksAtomic(PacketList
& writebacks
)
507 while (!writebacks
.empty()) {
508 PacketPtr wbPkt
= writebacks
.front();
509 // Call isCachedAbove for both Writebacks and CleanEvicts. If
510 // isCachedAbove returns true we set BLOCK_CACHED flag in Writebacks
511 // and discard CleanEvicts.
512 if (isCachedAbove(wbPkt
, false)) {
513 if (wbPkt
->cmd
== MemCmd::WritebackDirty
) {
514 // Set BLOCK_CACHED flag in Writeback and send below,
515 // so that the Writeback does not reset the bit
516 // corresponding to this address in the snoop filter
517 // below. We can discard CleanEvicts because cached
518 // copies exist above. Atomic mode isCachedAbove
519 // modifies packet to set BLOCK_CACHED flag
520 memSidePort
->sendAtomic(wbPkt
);
523 // If the block is not cached above, send packet below. Both
524 // CleanEvict and Writeback with BLOCK_CACHED flag cleared will
525 // reset the bit corresponding to this address in the snoop filter
527 memSidePort
->sendAtomic(wbPkt
);
529 writebacks
.pop_front();
530 // In case of CleanEvicts, the packet destructor will delete the
531 // request object because this is a non-snoop request packet which
532 // does not require a response.
539 Cache::recvTimingSnoopResp(PacketPtr pkt
)
541 DPRINTF(Cache
, "%s for %s addr %#llx size %d\n", __func__
,
542 pkt
->cmdString(), pkt
->getAddr(), pkt
->getSize());
544 assert(pkt
->isResponse());
545 assert(!system
->bypassCaches());
547 // determine if the response is from a snoop request we created
548 // (in which case it should be in the outstandingSnoop), or if we
549 // merely forwarded someone else's snoop request
550 const bool forwardAsSnoop
= outstandingSnoop
.find(pkt
->req
) ==
551 outstandingSnoop
.end();
553 if (!forwardAsSnoop
) {
554 // the packet came from this cache, so sink it here and do not
556 assert(pkt
->cmd
== MemCmd::HardPFResp
);
558 outstandingSnoop
.erase(pkt
->req
);
560 DPRINTF(Cache
, "Got prefetch response from above for addr "
561 "%#llx (%s)\n", pkt
->getAddr(), pkt
->isSecure() ? "s" : "ns");
566 // forwardLatency is set here because there is a response from an
567 // upper level cache.
568 // To pay the delay that occurs if the packet comes from the bus,
569 // we charge also headerDelay.
570 Tick snoop_resp_time
= clockEdge(forwardLatency
) + pkt
->headerDelay
;
571 // Reset the timing of the packet.
572 pkt
->headerDelay
= pkt
->payloadDelay
= 0;
573 memSidePort
->schedTimingSnoopResp(pkt
, snoop_resp_time
);
577 Cache::promoteWholeLineWrites(PacketPtr pkt
)
579 // Cache line clearing instructions
580 if (doFastWrites
&& (pkt
->cmd
== MemCmd::WriteReq
) &&
581 (pkt
->getSize() == blkSize
) && (pkt
->getOffset(blkSize
) == 0)) {
582 pkt
->cmd
= MemCmd::WriteLineReq
;
583 DPRINTF(Cache
, "packet promoted from Write to WriteLineReq\n");
588 Cache::recvTimingReq(PacketPtr pkt
)
590 DPRINTF(CacheTags
, "%s tags: %s\n", __func__
, tags
->print());
592 assert(pkt
->isRequest());
594 // Just forward the packet if caches are disabled.
595 if (system
->bypassCaches()) {
596 // @todo This should really enqueue the packet rather
597 bool M5_VAR_USED success
= memSidePort
->sendTimingReq(pkt
);
602 promoteWholeLineWrites(pkt
);
604 if (pkt
->cacheResponding()) {
605 // a cache above us (but not where the packet came from) is
606 // responding to the request, in other words it has the line
607 // in Modified or Owned state
608 DPRINTF(Cache
, "Cache above responding to %#llx (%s): "
610 pkt
->getAddr(), pkt
->isSecure() ? "s" : "ns");
612 // if the packet needs the block to be writable, and the cache
613 // that has promised to respond (setting the cache responding
614 // flag) is not providing writable (it is in Owned rather than
615 // the Modified state), we know that there may be other Shared
616 // copies in the system; go out and invalidate them all
617 assert(pkt
->needsWritable() && !pkt
->responderHadWritable());
619 // an upstream cache that had the line in Owned state
620 // (dirty, but not writable), is responding and thus
621 // transferring the dirty line from one branch of the
622 // cache hierarchy to another
624 // send out an express snoop and invalidate all other
625 // copies (snooping a packet that needs writable is the
626 // same as an invalidation), thus turning the Owned line
627 // into a Modified line, note that we don't invalidate the
628 // block in the current cache or any other cache on the
631 // create a downstream express snoop with cleared packet
632 // flags, there is no need to allocate any data as the
633 // packet is merely used to co-ordinate state transitions
634 Packet
*snoop_pkt
= new Packet(pkt
, true, false);
636 // also reset the bus time that the original packet has
638 snoop_pkt
->headerDelay
= snoop_pkt
->payloadDelay
= 0;
640 // make this an instantaneous express snoop, and let the
641 // other caches in the system know that the another cache
642 // is responding, because we have found the authorative
643 // copy (Modified or Owned) that will supply the right
645 snoop_pkt
->setExpressSnoop();
646 snoop_pkt
->setCacheResponding();
648 // this express snoop travels towards the memory, and at
649 // every crossbar it is snooped upwards thus reaching
650 // every cache in the system
651 bool M5_VAR_USED success
= memSidePort
->sendTimingReq(snoop_pkt
);
652 // express snoops always succeed
655 // main memory will delete the snoop packet
657 // queue for deletion, as opposed to immediate deletion, as
658 // the sending cache is still relying on the packet
659 pendingDelete
.reset(pkt
);
661 // no need to take any further action in this particular cache
662 // as an upstram cache has already committed to responding,
663 // and we have already sent out any express snoops in the
664 // section above to ensure all other copies in the system are
669 // anything that is merely forwarded pays for the forward latency and
670 // the delay provided by the crossbar
671 Tick forward_time
= clockEdge(forwardLatency
) + pkt
->headerDelay
;
673 // We use lookupLatency here because it is used to specify the latency
675 Cycles lat
= lookupLatency
;
676 CacheBlk
*blk
= NULL
;
677 bool satisfied
= false;
679 PacketList writebacks
;
680 // Note that lat is passed by reference here. The function
681 // access() calls accessBlock() which can modify lat value.
682 satisfied
= access(pkt
, blk
, lat
, writebacks
);
684 // copy writebacks to write buffer here to ensure they logically
685 // proceed anything happening below
686 doWritebacks(writebacks
, forward_time
);
689 // Here we charge the headerDelay that takes into account the latencies
690 // of the bus, if the packet comes from it.
691 // The latency charged it is just lat that is the value of lookupLatency
692 // modified by access() function, or if not just lookupLatency.
693 // In case of a hit we are neglecting response latency.
694 // In case of a miss we are neglecting forward latency.
695 Tick request_time
= clockEdge(lat
) + pkt
->headerDelay
;
696 // Here we reset the timing of the packet.
697 pkt
->headerDelay
= pkt
->payloadDelay
= 0;
699 // track time of availability of next prefetch, if any
700 Tick next_pf_time
= MaxTick
;
702 bool needsResponse
= pkt
->needsResponse();
705 // should never be satisfying an uncacheable access as we
706 // flush and invalidate any existing block as part of the
708 assert(!pkt
->req
->isUncacheable());
710 // hit (for all other request types)
712 if (prefetcher
&& (prefetchOnAccess
|| (blk
&& blk
->wasPrefetched()))) {
714 blk
->status
&= ~BlkHWPrefetched
;
716 // Don't notify on SWPrefetch
717 if (!pkt
->cmd
.isSWPrefetch())
718 next_pf_time
= prefetcher
->notify(pkt
);
722 pkt
->makeTimingResponse();
723 // @todo: Make someone pay for this
724 pkt
->headerDelay
= pkt
->payloadDelay
= 0;
726 // In this case we are considering request_time that takes
727 // into account the delay of the xbar, if any, and just
728 // lat, neglecting responseLatency, modelling hit latency
729 // just as lookupLatency or or the value of lat overriden
730 // by access(), that calls accessBlock() function.
731 cpuSidePort
->schedTimingResp(pkt
, request_time
, true);
733 DPRINTF(Cache
, "%s satisfied %s addr %#llx, no response needed\n",
734 __func__
, pkt
->cmdString(), pkt
->getAddr(),
737 // queue the packet for deletion, as the sending cache is
738 // still relying on it; if the block is found in access(),
739 // CleanEvict and Writeback messages will be deleted
741 pendingDelete
.reset(pkt
);
746 Addr blk_addr
= blockAlign(pkt
->getAddr());
748 // ignore any existing MSHR if we are dealing with an
749 // uncacheable request
750 MSHR
*mshr
= pkt
->req
->isUncacheable() ? nullptr :
751 mshrQueue
.findMatch(blk_addr
, pkt
->isSecure());
753 // Software prefetch handling:
754 // To keep the core from waiting on data it won't look at
755 // anyway, send back a response with dummy data. Miss handling
756 // will continue asynchronously. Unfortunately, the core will
757 // insist upon freeing original Packet/Request, so we have to
758 // create a new pair with a different lifecycle. Note that this
759 // processing happens before any MSHR munging on the behalf of
760 // this request because this new Request will be the one stored
761 // into the MSHRs, not the original.
762 if (pkt
->cmd
.isSWPrefetch()) {
763 assert(needsResponse
);
764 assert(pkt
->req
->hasPaddr());
765 assert(!pkt
->req
->isUncacheable());
767 // There's no reason to add a prefetch as an additional target
768 // to an existing MSHR. If an outstanding request is already
769 // in progress, there is nothing for the prefetch to do.
770 // If this is the case, we don't even create a request at all.
771 PacketPtr pf
= nullptr;
774 // copy the request and create a new SoftPFReq packet
775 RequestPtr req
= new Request(pkt
->req
->getPaddr(),
777 pkt
->req
->getFlags(),
778 pkt
->req
->masterId());
779 pf
= new Packet(req
, pkt
->cmd
);
781 assert(pf
->getAddr() == pkt
->getAddr());
782 assert(pf
->getSize() == pkt
->getSize());
785 pkt
->makeTimingResponse();
787 // request_time is used here, taking into account lat and the delay
788 // charged if the packet comes from the xbar.
789 cpuSidePort
->schedTimingResp(pkt
, request_time
, true);
791 // If an outstanding request is in progress (we found an
792 // MSHR) this is set to null
798 /// @note writebacks will be checked in getNextMSHR()
799 /// for any conflicting requests to the same block
801 //@todo remove hw_pf here
803 // Coalesce unless it was a software prefetch (see above).
805 assert(!pkt
->isWriteback());
806 // CleanEvicts corresponding to blocks which have
807 // outstanding requests in MSHRs are simply sunk here
808 if (pkt
->cmd
== MemCmd::CleanEvict
) {
809 pendingDelete
.reset(pkt
);
811 DPRINTF(Cache
, "%s coalescing MSHR for %s addr %#llx size %d\n",
812 __func__
, pkt
->cmdString(), pkt
->getAddr(),
815 assert(pkt
->req
->masterId() < system
->maxMasters());
816 mshr_hits
[pkt
->cmdToIndex()][pkt
->req
->masterId()]++;
817 // We use forward_time here because it is the same
818 // considering new targets. We have multiple
819 // requests for the same address here. It
820 // specifies the latency to allocate an internal
821 // buffer and to schedule an event to the queued
822 // port and also takes into account the additional
823 // delay of the xbar.
824 mshr
->allocateTarget(pkt
, forward_time
, order
++,
825 allocOnFill(pkt
->cmd
));
826 if (mshr
->getNumTargets() == numTarget
) {
828 setBlocked(Blocked_NoTargets
);
829 // need to be careful with this... if this mshr isn't
830 // ready yet (i.e. time > curTick()), we don't want to
831 // move it ahead of mshrs that are ready
832 // mshrQueue.moveToFront(mshr);
835 // We should call the prefetcher reguardless if the request is
836 // satisfied or not, reguardless if the request is in the MSHR or
837 // not. The request could be a ReadReq hit, but still not
838 // satisfied (potentially because of a prior write to the same
839 // cache line. So, even when not satisfied, tehre is an MSHR
840 // already allocated for this, we need to let the prefetcher know
843 // Don't notify on SWPrefetch
844 if (!pkt
->cmd
.isSWPrefetch())
845 next_pf_time
= prefetcher
->notify(pkt
);
850 assert(pkt
->req
->masterId() < system
->maxMasters());
851 if (pkt
->req
->isUncacheable()) {
852 mshr_uncacheable
[pkt
->cmdToIndex()][pkt
->req
->masterId()]++;
854 mshr_misses
[pkt
->cmdToIndex()][pkt
->req
->masterId()]++;
857 if (pkt
->isEviction() ||
858 (pkt
->req
->isUncacheable() && pkt
->isWrite())) {
859 // We use forward_time here because there is an
860 // uncached memory write, forwarded to WriteBuffer.
861 allocateWriteBuffer(pkt
, forward_time
);
863 if (blk
&& blk
->isValid()) {
864 // should have flushed and have no valid block
865 assert(!pkt
->req
->isUncacheable());
867 // If we have a write miss to a valid block, we
868 // need to mark the block non-readable. Otherwise
869 // if we allow reads while there's an outstanding
870 // write miss, the read could return stale data
871 // out of the cache block... a more aggressive
872 // system could detect the overlap (if any) and
873 // forward data out of the MSHRs, but we don't do
874 // that yet. Note that we do need to leave the
875 // block valid so that it stays in the cache, in
876 // case we get an upgrade response (and hence no
877 // new data) when the write miss completes.
878 // As long as CPUs do proper store/load forwarding
879 // internally, and have a sufficiently weak memory
880 // model, this is probably unnecessary, but at some
881 // point it must have seemed like we needed it...
882 assert(pkt
->needsWritable());
883 assert(!blk
->isWritable());
884 blk
->status
&= ~BlkReadable
;
886 // Here we are using forward_time, modelling the latency of
887 // a miss (outbound) just as forwardLatency, neglecting the
888 // lookupLatency component.
889 allocateMissBuffer(pkt
, forward_time
);
893 // Don't notify on SWPrefetch
894 if (!pkt
->cmd
.isSWPrefetch())
895 next_pf_time
= prefetcher
->notify(pkt
);
900 if (next_pf_time
!= MaxTick
)
901 schedMemSideSendEvent(next_pf_time
);
907 Cache::createMissPacket(PacketPtr cpu_pkt
, CacheBlk
*blk
,
908 bool needsWritable
) const
910 // should never see evictions here
911 assert(!cpu_pkt
->isEviction());
913 bool blkValid
= blk
&& blk
->isValid();
915 if (cpu_pkt
->req
->isUncacheable() ||
916 (!blkValid
&& cpu_pkt
->isUpgrade())) {
917 // uncacheable requests and upgrades from upper-level caches
918 // that missed completely just go through as is
922 assert(cpu_pkt
->needsResponse());
925 // @TODO make useUpgrades a parameter.
926 // Note that ownership protocols require upgrade, otherwise a
927 // write miss on a shared owned block will generate a ReadExcl,
928 // which will clobber the owned copy.
929 const bool useUpgrades
= true;
930 if (blkValid
&& useUpgrades
) {
931 // only reason to be here is that blk is read only and we need
933 assert(needsWritable
);
934 assert(!blk
->isWritable());
935 cmd
= cpu_pkt
->isLLSC() ? MemCmd::SCUpgradeReq
: MemCmd::UpgradeReq
;
936 } else if (cpu_pkt
->cmd
== MemCmd::SCUpgradeFailReq
||
937 cpu_pkt
->cmd
== MemCmd::StoreCondFailReq
) {
938 // Even though this SC will fail, we still need to send out the
939 // request and get the data to supply it to other snoopers in the case
940 // where the determination the StoreCond fails is delayed due to
941 // all caches not being on the same local bus.
942 cmd
= MemCmd::SCUpgradeFailReq
;
943 } else if (cpu_pkt
->cmd
== MemCmd::WriteLineReq
||
944 cpu_pkt
->cmd
== MemCmd::InvalidateReq
) {
945 // forward as invalidate to all other caches, this gives us
946 // the line in Exclusive state, and invalidates all other
948 cmd
= MemCmd::InvalidateReq
;
951 cmd
= needsWritable
? MemCmd::ReadExReq
:
952 (isReadOnly
? MemCmd::ReadCleanReq
: MemCmd::ReadSharedReq
);
954 PacketPtr pkt
= new Packet(cpu_pkt
->req
, cmd
, blkSize
);
956 // if there are upstream caches that have already marked the
957 // packet as having sharers (not passing writable), pass that info
959 if (cpu_pkt
->hasSharers()) {
960 // note that cpu_pkt may have spent a considerable time in the
961 // MSHR queue and that the information could possibly be out
962 // of date, however, there is no harm in conservatively
963 // assuming the block has sharers
964 pkt
->setHasSharers();
965 DPRINTF(Cache
, "%s passing hasSharers from %s to %s addr %#llx "
967 __func__
, cpu_pkt
->cmdString(), pkt
->cmdString(),
968 pkt
->getAddr(), pkt
->getSize());
971 // the packet should be block aligned
972 assert(pkt
->getAddr() == blockAlign(pkt
->getAddr()));
975 DPRINTF(Cache
, "%s created %s from %s for addr %#llx size %d\n",
976 __func__
, pkt
->cmdString(), cpu_pkt
->cmdString(), pkt
->getAddr(),
983 Cache::recvAtomic(PacketPtr pkt
)
985 // We are in atomic mode so we pay just for lookupLatency here.
986 Cycles lat
= lookupLatency
;
988 // Forward the request if the system is in cache bypass mode.
989 if (system
->bypassCaches())
990 return ticksToCycles(memSidePort
->sendAtomic(pkt
));
992 promoteWholeLineWrites(pkt
);
994 // follow the same flow as in recvTimingReq, and check if a cache
995 // above us is responding
996 if (pkt
->cacheResponding()) {
997 DPRINTF(Cache
, "Cache above responding to %#llx (%s): "
999 pkt
->getAddr(), pkt
->isSecure() ? "s" : "ns");
1001 // if a cache is responding, and it had the line in Owned
1002 // rather than Modified state, we need to invalidate any
1003 // copies that are not on the same path to memory
1004 assert(pkt
->needsWritable() && !pkt
->responderHadWritable());
1005 lat
+= ticksToCycles(memSidePort
->sendAtomic(pkt
));
1007 return lat
* clockPeriod();
1010 // should assert here that there are no outstanding MSHRs or
1011 // writebacks... that would mean that someone used an atomic
1012 // access in timing mode
1014 CacheBlk
*blk
= NULL
;
1015 PacketList writebacks
;
1016 bool satisfied
= access(pkt
, blk
, lat
, writebacks
);
1018 // handle writebacks resulting from the access here to ensure they
1019 // logically proceed anything happening below
1020 doWritebacksAtomic(writebacks
);
1025 // deal with the packets that go through the write path of
1026 // the cache, i.e. any evictions and uncacheable writes
1027 if (pkt
->isEviction() ||
1028 (pkt
->req
->isUncacheable() && pkt
->isWrite())) {
1029 lat
+= ticksToCycles(memSidePort
->sendAtomic(pkt
));
1030 return lat
* clockPeriod();
1034 PacketPtr bus_pkt
= createMissPacket(pkt
, blk
, pkt
->needsWritable());
1036 bool is_forward
= (bus_pkt
== NULL
);
1039 // just forwarding the same request to the next level
1040 // no local cache operation involved
1044 DPRINTF(Cache
, "Sending an atomic %s for %#llx (%s)\n",
1045 bus_pkt
->cmdString(), bus_pkt
->getAddr(),
1046 bus_pkt
->isSecure() ? "s" : "ns");
1049 CacheBlk::State old_state
= blk
? blk
->status
: 0;
1052 lat
+= ticksToCycles(memSidePort
->sendAtomic(bus_pkt
));
1054 bool is_invalidate
= bus_pkt
->isInvalidate();
1056 // We are now dealing with the response handling
1057 DPRINTF(Cache
, "Receive response: %s for addr %#llx (%s) in state %i\n",
1058 bus_pkt
->cmdString(), bus_pkt
->getAddr(),
1059 bus_pkt
->isSecure() ? "s" : "ns",
1062 // If packet was a forward, the response (if any) is already
1063 // in place in the bus_pkt == pkt structure, so we don't need
1064 // to do anything. Otherwise, use the separate bus_pkt to
1065 // generate response to pkt and then delete it.
1067 if (pkt
->needsResponse()) {
1068 assert(bus_pkt
->isResponse());
1069 if (bus_pkt
->isError()) {
1070 pkt
->makeAtomicResponse();
1071 pkt
->copyError(bus_pkt
);
1072 } else if (pkt
->cmd
== MemCmd::WriteLineReq
) {
1073 // note the use of pkt, not bus_pkt here.
1075 // write-line request to the cache that promoted
1076 // the write to a whole line
1077 blk
= handleFill(pkt
, blk
, writebacks
,
1078 allocOnFill(pkt
->cmd
));
1079 assert(blk
!= NULL
);
1080 is_invalidate
= false;
1081 satisfyCpuSideRequest(pkt
, blk
);
1082 } else if (bus_pkt
->isRead() ||
1083 bus_pkt
->cmd
== MemCmd::UpgradeResp
) {
1084 // we're updating cache state to allow us to
1085 // satisfy the upstream request from the cache
1086 blk
= handleFill(bus_pkt
, blk
, writebacks
,
1087 allocOnFill(pkt
->cmd
));
1088 satisfyCpuSideRequest(pkt
, blk
);
1090 // we're satisfying the upstream request without
1091 // modifying cache state, e.g., a write-through
1092 pkt
->makeAtomicResponse();
1098 if (is_invalidate
&& blk
&& blk
->isValid()) {
1099 invalidateBlock(blk
);
1103 // Note that we don't invoke the prefetcher at all in atomic mode.
1104 // It's not clear how to do it properly, particularly for
1105 // prefetchers that aggressively generate prefetch candidates and
1106 // rely on bandwidth contention to throttle them; these will tend
1107 // to pollute the cache in atomic mode since there is no bandwidth
1108 // contention. If we ever do want to enable prefetching in atomic
1109 // mode, though, this is the place to do it... see timingAccess()
1110 // for an example (though we'd want to issue the prefetch(es)
1111 // immediately rather than calling requestMemSideBus() as we do
1114 // do any writebacks resulting from the response handling
1115 doWritebacksAtomic(writebacks
);
1117 // if we used temp block, check to see if its valid and if so
1118 // clear it out, but only do so after the call to recvAtomic is
1119 // finished so that any downstream observers (such as a snoop
1120 // filter), first see the fill, and only then see the eviction
1121 if (blk
== tempBlock
&& tempBlock
->isValid()) {
1122 // the atomic CPU calls recvAtomic for fetch and load/store
1123 // sequentuially, and we may already have a tempBlock
1124 // writeback from the fetch that we have not yet sent
1125 if (tempBlockWriteback
) {
1126 // if that is the case, write the prevoius one back, and
1127 // do not schedule any new event
1128 writebackTempBlockAtomic();
1130 // the writeback/clean eviction happens after the call to
1131 // recvAtomic has finished (but before any successive
1132 // calls), so that the response handling from the fill is
1133 // allowed to happen first
1134 schedule(writebackTempBlockAtomicEvent
, curTick());
1137 tempBlockWriteback
= (blk
->isDirty() || writebackClean
) ?
1138 writebackBlk(blk
) : cleanEvictBlk(blk
);
1142 if (pkt
->needsResponse()) {
1143 pkt
->makeAtomicResponse();
1146 return lat
* clockPeriod();
1151 Cache::functionalAccess(PacketPtr pkt
, bool fromCpuSide
)
1153 if (system
->bypassCaches()) {
1154 // Packets from the memory side are snoop request and
1155 // shouldn't happen in bypass mode.
1156 assert(fromCpuSide
);
1158 // The cache should be flushed if we are in cache bypass mode,
1159 // so we don't need to check if we need to update anything.
1160 memSidePort
->sendFunctional(pkt
);
1164 Addr blk_addr
= blockAlign(pkt
->getAddr());
1165 bool is_secure
= pkt
->isSecure();
1166 CacheBlk
*blk
= tags
->findBlock(pkt
->getAddr(), is_secure
);
1167 MSHR
*mshr
= mshrQueue
.findMatch(blk_addr
, is_secure
);
1169 pkt
->pushLabel(name());
1171 CacheBlkPrintWrapper
cbpw(blk
);
1173 // Note that just because an L2/L3 has valid data doesn't mean an
1174 // L1 doesn't have a more up-to-date modified copy that still
1175 // needs to be found. As a result we always update the request if
1176 // we have it, but only declare it satisfied if we are the owner.
1178 // see if we have data at all (owned or otherwise)
1179 bool have_data
= blk
&& blk
->isValid()
1180 && pkt
->checkFunctional(&cbpw
, blk_addr
, is_secure
, blkSize
,
1183 // data we have is dirty if marked as such or if we have an
1184 // in-service MSHR that is pending a modified line
1186 have_data
&& (blk
->isDirty() ||
1187 (mshr
&& mshr
->inService
&& mshr
->isPendingModified()));
1189 bool done
= have_dirty
1190 || cpuSidePort
->checkFunctional(pkt
)
1191 || mshrQueue
.checkFunctional(pkt
, blk_addr
)
1192 || writeBuffer
.checkFunctional(pkt
, blk_addr
)
1193 || memSidePort
->checkFunctional(pkt
);
1195 DPRINTF(CacheVerbose
, "functional %s %#llx (%s) %s%s%s\n",
1196 pkt
->cmdString(), pkt
->getAddr(), is_secure
? "s" : "ns",
1197 (blk
&& blk
->isValid()) ? "valid " : "",
1198 have_data
? "data " : "", done
? "done " : "");
1200 // We're leaving the cache, so pop cache->name() label
1204 pkt
->makeResponse();
1206 // if it came as a request from the CPU side then make sure it
1207 // continues towards the memory side
1209 memSidePort
->sendFunctional(pkt
);
1210 } else if (forwardSnoops
&& cpuSidePort
->isSnooping()) {
1211 // if it came from the memory side, it must be a snoop request
1212 // and we should only forward it if we are forwarding snoops
1213 cpuSidePort
->sendFunctionalSnoop(pkt
);
1219 /////////////////////////////////////////////////////
1221 // Response handling: responses from the memory side
1223 /////////////////////////////////////////////////////
1227 Cache::handleUncacheableWriteResp(PacketPtr pkt
)
1229 Tick completion_time
= clockEdge(responseLatency
) +
1230 pkt
->headerDelay
+ pkt
->payloadDelay
;
1232 // Reset the bus additional time as it is now accounted for
1233 pkt
->headerDelay
= pkt
->payloadDelay
= 0;
1235 cpuSidePort
->schedTimingResp(pkt
, completion_time
, true);
1239 Cache::recvTimingResp(PacketPtr pkt
)
1241 assert(pkt
->isResponse());
1243 // all header delay should be paid for by the crossbar, unless
1244 // this is a prefetch response from above
1245 panic_if(pkt
->headerDelay
!= 0 && pkt
->cmd
!= MemCmd::HardPFResp
,
1246 "%s saw a non-zero packet delay\n", name());
1248 bool is_error
= pkt
->isError();
1251 DPRINTF(Cache
, "Cache received packet with error for addr %#llx (%s), "
1252 "cmd: %s\n", pkt
->getAddr(), pkt
->isSecure() ? "s" : "ns",
1256 DPRINTF(Cache
, "Handling response %s for addr %#llx size %d (%s)\n",
1257 pkt
->cmdString(), pkt
->getAddr(), pkt
->getSize(),
1258 pkt
->isSecure() ? "s" : "ns");
1260 // if this is a write, we should be looking at an uncacheable
1262 if (pkt
->isWrite()) {
1263 assert(pkt
->req
->isUncacheable());
1264 handleUncacheableWriteResp(pkt
);
1268 // we have dealt with any (uncacheable) writes above, from here on
1269 // we know we are dealing with an MSHR due to a miss or a prefetch
1270 MSHR
*mshr
= dynamic_cast<MSHR
*>(pkt
->popSenderState());
1273 if (mshr
== noTargetMSHR
) {
1274 // we always clear at least one target
1275 clearBlocked(Blocked_NoTargets
);
1276 noTargetMSHR
= NULL
;
1279 // Initial target is used just for stats
1280 MSHR::Target
*initial_tgt
= mshr
->getTarget();
1281 int stats_cmd_idx
= initial_tgt
->pkt
->cmdToIndex();
1282 Tick miss_latency
= curTick() - initial_tgt
->recvTime
;
1284 if (pkt
->req
->isUncacheable()) {
1285 assert(pkt
->req
->masterId() < system
->maxMasters());
1286 mshr_uncacheable_lat
[stats_cmd_idx
][pkt
->req
->masterId()] +=
1289 assert(pkt
->req
->masterId() < system
->maxMasters());
1290 mshr_miss_latency
[stats_cmd_idx
][pkt
->req
->masterId()] +=
1294 bool wasFull
= mshrQueue
.isFull();
1296 PacketList writebacks
;
1298 Tick forward_time
= clockEdge(forwardLatency
) + pkt
->headerDelay
;
1300 // upgrade deferred targets if the response has no sharers, and is
1301 // thus passing writable
1302 if (!pkt
->hasSharers()) {
1303 mshr
->promoteWritable();
1306 bool is_fill
= !mshr
->isForward
&&
1307 (pkt
->isRead() || pkt
->cmd
== MemCmd::UpgradeResp
);
1309 CacheBlk
*blk
= tags
->findBlock(pkt
->getAddr(), pkt
->isSecure());
1311 if (is_fill
&& !is_error
) {
1312 DPRINTF(Cache
, "Block for addr %#llx being updated in Cache\n",
1315 blk
= handleFill(pkt
, blk
, writebacks
, mshr
->allocOnFill
);
1316 assert(blk
!= NULL
);
1319 // allow invalidation responses originating from write-line
1320 // requests to be discarded
1321 bool is_invalidate
= pkt
->isInvalidate();
1323 // First offset for critical word first calculations
1324 int initial_offset
= initial_tgt
->pkt
->getOffset(blkSize
);
1326 while (mshr
->hasTargets()) {
1327 MSHR::Target
*target
= mshr
->getTarget();
1328 Packet
*tgt_pkt
= target
->pkt
;
1330 switch (target
->source
) {
1331 case MSHR::Target::FromCPU
:
1332 Tick completion_time
;
1333 // Here we charge on completion_time the delay of the xbar if the
1334 // packet comes from it, charged on headerDelay.
1335 completion_time
= pkt
->headerDelay
;
1337 // Software prefetch handling for cache closest to core
1338 if (tgt_pkt
->cmd
.isSWPrefetch()) {
1339 // a software prefetch would have already been ack'd immediately
1340 // with dummy data so the core would be able to retire it.
1341 // this request completes right here, so we deallocate it.
1342 delete tgt_pkt
->req
;
1344 break; // skip response
1347 // unlike the other packet flows, where data is found in other
1348 // caches or memory and brought back, write-line requests always
1349 // have the data right away, so the above check for "is fill?"
1350 // cannot actually be determined until examining the stored MSHR
1351 // state. We "catch up" with that logic here, which is duplicated
1353 if (tgt_pkt
->cmd
== MemCmd::WriteLineReq
) {
1355 // we got the block in a writable state, so promote
1356 // any deferred targets if possible
1357 mshr
->promoteWritable();
1358 // NB: we use the original packet here and not the response!
1359 blk
= handleFill(tgt_pkt
, blk
, writebacks
, mshr
->allocOnFill
);
1360 assert(blk
!= NULL
);
1362 // treat as a fill, and discard the invalidation
1365 is_invalidate
= false;
1369 satisfyCpuSideRequest(tgt_pkt
, blk
,
1370 true, mshr
->hasPostDowngrade());
1372 // How many bytes past the first request is this one
1373 int transfer_offset
=
1374 tgt_pkt
->getOffset(blkSize
) - initial_offset
;
1375 if (transfer_offset
< 0) {
1376 transfer_offset
+= blkSize
;
1379 // If not critical word (offset) return payloadDelay.
1380 // responseLatency is the latency of the return path
1381 // from lower level caches/memory to an upper level cache or
1383 completion_time
+= clockEdge(responseLatency
) +
1384 (transfer_offset
? pkt
->payloadDelay
: 0);
1386 assert(!tgt_pkt
->req
->isUncacheable());
1388 assert(tgt_pkt
->req
->masterId() < system
->maxMasters());
1389 missLatency
[tgt_pkt
->cmdToIndex()][tgt_pkt
->req
->masterId()] +=
1390 completion_time
- target
->recvTime
;
1391 } else if (pkt
->cmd
== MemCmd::UpgradeFailResp
) {
1392 // failed StoreCond upgrade
1393 assert(tgt_pkt
->cmd
== MemCmd::StoreCondReq
||
1394 tgt_pkt
->cmd
== MemCmd::StoreCondFailReq
||
1395 tgt_pkt
->cmd
== MemCmd::SCUpgradeFailReq
);
1396 // responseLatency is the latency of the return path
1397 // from lower level caches/memory to an upper level cache or
1399 completion_time
+= clockEdge(responseLatency
) +
1401 tgt_pkt
->req
->setExtraData(0);
1403 // not a cache fill, just forwarding response
1404 // responseLatency is the latency of the return path
1405 // from lower level cahces/memory to the core.
1406 completion_time
+= clockEdge(responseLatency
) +
1408 if (pkt
->isRead() && !is_error
) {
1410 assert(pkt
->getAddr() == tgt_pkt
->getAddr());
1411 assert(pkt
->getSize() >= tgt_pkt
->getSize());
1413 tgt_pkt
->setData(pkt
->getConstPtr
<uint8_t>());
1416 tgt_pkt
->makeTimingResponse();
1417 // if this packet is an error copy that to the new packet
1419 tgt_pkt
->copyError(pkt
);
1420 if (tgt_pkt
->cmd
== MemCmd::ReadResp
&&
1421 (is_invalidate
|| mshr
->hasPostInvalidate())) {
1422 // If intermediate cache got ReadRespWithInvalidate,
1423 // propagate that. Response should not have
1424 // isInvalidate() set otherwise.
1425 tgt_pkt
->cmd
= MemCmd::ReadRespWithInvalidate
;
1426 DPRINTF(Cache
, "%s updated cmd to %s for addr %#llx\n",
1427 __func__
, tgt_pkt
->cmdString(), tgt_pkt
->getAddr());
1429 // Reset the bus additional time as it is now accounted for
1430 tgt_pkt
->headerDelay
= tgt_pkt
->payloadDelay
= 0;
1431 cpuSidePort
->schedTimingResp(tgt_pkt
, completion_time
, true);
1434 case MSHR::Target::FromPrefetcher
:
1435 assert(tgt_pkt
->cmd
== MemCmd::HardPFReq
);
1437 blk
->status
|= BlkHWPrefetched
;
1438 delete tgt_pkt
->req
;
1442 case MSHR::Target::FromSnoop
:
1443 // I don't believe that a snoop can be in an error state
1445 // response to snoop request
1446 DPRINTF(Cache
, "processing deferred snoop...\n");
1447 assert(!(is_invalidate
&& !mshr
->hasPostInvalidate()));
1448 handleSnoop(tgt_pkt
, blk
, true, true, mshr
->hasPostInvalidate());
1452 panic("Illegal target->source enum %d\n", target
->source
);
1458 if (blk
&& blk
->isValid()) {
1459 // an invalidate response stemming from a write line request
1460 // should not invalidate the block, so check if the
1461 // invalidation should be discarded
1462 if (is_invalidate
|| mshr
->hasPostInvalidate()) {
1463 invalidateBlock(blk
);
1464 } else if (mshr
->hasPostDowngrade()) {
1465 blk
->status
&= ~BlkWritable
;
1469 if (mshr
->promoteDeferredTargets()) {
1470 // avoid later read getting stale data while write miss is
1471 // outstanding.. see comment in timingAccess()
1473 blk
->status
&= ~BlkReadable
;
1475 mshrQueue
.markPending(mshr
);
1476 schedMemSideSendEvent(clockEdge() + pkt
->payloadDelay
);
1478 mshrQueue
.deallocate(mshr
);
1479 if (wasFull
&& !mshrQueue
.isFull()) {
1480 clearBlocked(Blocked_NoMSHRs
);
1483 // Request the bus for a prefetch if this deallocation freed enough
1484 // MSHRs for a prefetch to take place
1485 if (prefetcher
&& mshrQueue
.canPrefetch()) {
1486 Tick next_pf_time
= std::max(prefetcher
->nextPrefetchReadyTime(),
1488 if (next_pf_time
!= MaxTick
)
1489 schedMemSideSendEvent(next_pf_time
);
1492 // reset the xbar additional timinig as it is now accounted for
1493 pkt
->headerDelay
= pkt
->payloadDelay
= 0;
1495 // copy writebacks to write buffer
1496 doWritebacks(writebacks
, forward_time
);
1498 // if we used temp block, check to see if its valid and then clear it out
1499 if (blk
== tempBlock
&& tempBlock
->isValid()) {
1500 // We use forwardLatency here because we are copying
1501 // Writebacks/CleanEvicts to write buffer. It specifies the latency to
1502 // allocate an internal buffer and to schedule an event to the
1504 if (blk
->isDirty() || writebackClean
) {
1505 PacketPtr wbPkt
= writebackBlk(blk
);
1506 allocateWriteBuffer(wbPkt
, forward_time
);
1507 // Set BLOCK_CACHED flag if cached above.
1508 if (isCachedAbove(wbPkt
))
1509 wbPkt
->setBlockCached();
1511 PacketPtr wcPkt
= cleanEvictBlk(blk
);
1512 // Check to see if block is cached above. If not allocate
1514 if (isCachedAbove(wcPkt
))
1517 allocateWriteBuffer(wcPkt
, forward_time
);
1522 DPRINTF(CacheVerbose
, "Leaving %s with %s for addr %#llx\n", __func__
,
1523 pkt
->cmdString(), pkt
->getAddr());
1528 Cache::writebackBlk(CacheBlk
*blk
)
1530 chatty_assert(!isReadOnly
|| writebackClean
,
1531 "Writeback from read-only cache");
1532 assert(blk
&& blk
->isValid() && (blk
->isDirty() || writebackClean
));
1534 writebacks
[Request::wbMasterId
]++;
1536 Request
*req
= new Request(tags
->regenerateBlkAddr(blk
->tag
, blk
->set
),
1537 blkSize
, 0, Request::wbMasterId
);
1538 if (blk
->isSecure())
1539 req
->setFlags(Request::SECURE
);
1541 req
->taskId(blk
->task_id
);
1542 blk
->task_id
= ContextSwitchTaskId::Unknown
;
1543 blk
->tickInserted
= curTick();
1546 new Packet(req
, blk
->isDirty() ?
1547 MemCmd::WritebackDirty
: MemCmd::WritebackClean
);
1549 DPRINTF(Cache
, "Create Writeback %#llx writable: %d, dirty: %d\n",
1550 pkt
->getAddr(), blk
->isWritable(), blk
->isDirty());
1552 if (blk
->isWritable()) {
1553 // not asserting shared means we pass the block in modified
1554 // state, mark our own block non-writeable
1555 blk
->status
&= ~BlkWritable
;
1557 // we are in the Owned state, tell the receiver
1558 pkt
->setHasSharers();
1561 // make sure the block is not marked dirty
1562 blk
->status
&= ~BlkDirty
;
1565 std::memcpy(pkt
->getPtr
<uint8_t>(), blk
->data
, blkSize
);
1571 Cache::cleanEvictBlk(CacheBlk
*blk
)
1573 assert(!writebackClean
);
1574 assert(blk
&& blk
->isValid() && !blk
->isDirty());
1575 // Creating a zero sized write, a message to the snoop filter
1577 new Request(tags
->regenerateBlkAddr(blk
->tag
, blk
->set
), blkSize
, 0,
1578 Request::wbMasterId
);
1579 if (blk
->isSecure())
1580 req
->setFlags(Request::SECURE
);
1582 req
->taskId(blk
->task_id
);
1583 blk
->task_id
= ContextSwitchTaskId::Unknown
;
1584 blk
->tickInserted
= curTick();
1586 PacketPtr pkt
= new Packet(req
, MemCmd::CleanEvict
);
1588 DPRINTF(Cache
, "%s%s %x Create CleanEvict\n", pkt
->cmdString(),
1589 pkt
->req
->isInstFetch() ? " (ifetch)" : "",
1596 Cache::memWriteback()
1598 CacheBlkVisitorWrapper
visitor(*this, &Cache::writebackVisitor
);
1599 tags
->forEachBlk(visitor
);
1603 Cache::memInvalidate()
1605 CacheBlkVisitorWrapper
visitor(*this, &Cache::invalidateVisitor
);
1606 tags
->forEachBlk(visitor
);
1610 Cache::isDirty() const
1612 CacheBlkIsDirtyVisitor visitor
;
1613 tags
->forEachBlk(visitor
);
1615 return visitor
.isDirty();
1619 Cache::writebackVisitor(CacheBlk
&blk
)
1621 if (blk
.isDirty()) {
1622 assert(blk
.isValid());
1624 Request
request(tags
->regenerateBlkAddr(blk
.tag
, blk
.set
),
1625 blkSize
, 0, Request::funcMasterId
);
1626 request
.taskId(blk
.task_id
);
1628 Packet
packet(&request
, MemCmd::WriteReq
);
1629 packet
.dataStatic(blk
.data
);
1631 memSidePort
->sendFunctional(&packet
);
1633 blk
.status
&= ~BlkDirty
;
1640 Cache::invalidateVisitor(CacheBlk
&blk
)
1644 warn_once("Invalidating dirty cache lines. Expect things to break.\n");
1646 if (blk
.isValid()) {
1647 assert(!blk
.isDirty());
1648 tags
->invalidate(&blk
);
1656 Cache::allocateBlock(Addr addr
, bool is_secure
, PacketList
&writebacks
)
1658 CacheBlk
*blk
= tags
->findVictim(addr
);
1660 // It is valid to return NULL if there is no victim
1664 if (blk
->isValid()) {
1665 Addr repl_addr
= tags
->regenerateBlkAddr(blk
->tag
, blk
->set
);
1666 MSHR
*repl_mshr
= mshrQueue
.findMatch(repl_addr
, blk
->isSecure());
1668 // must be an outstanding upgrade request
1669 // on a block we're about to replace...
1670 assert(!blk
->isWritable() || blk
->isDirty());
1671 assert(repl_mshr
->needsWritable());
1672 // too hard to replace block with transient state
1673 // allocation failed, block not inserted
1676 DPRINTF(Cache
, "replacement: replacing %#llx (%s) with %#llx (%s): %s\n",
1677 repl_addr
, blk
->isSecure() ? "s" : "ns",
1678 addr
, is_secure
? "s" : "ns",
1679 blk
->isDirty() ? "writeback" : "clean");
1681 if (blk
->wasPrefetched()) {
1684 // Will send up Writeback/CleanEvict snoops via isCachedAbove
1685 // when pushing this writeback list into the write buffer.
1686 if (blk
->isDirty() || writebackClean
) {
1687 // Save writeback packet for handling by caller
1688 writebacks
.push_back(writebackBlk(blk
));
1690 writebacks
.push_back(cleanEvictBlk(blk
));
1699 Cache::invalidateBlock(CacheBlk
*blk
)
1701 if (blk
!= tempBlock
)
1702 tags
->invalidate(blk
);
1706 // Note that the reason we return a list of writebacks rather than
1707 // inserting them directly in the write buffer is that this function
1708 // is called by both atomic and timing-mode accesses, and in atomic
1709 // mode we don't mess with the write buffer (we just perform the
1710 // writebacks atomically once the original request is complete).
1712 Cache::handleFill(PacketPtr pkt
, CacheBlk
*blk
, PacketList
&writebacks
,
1715 assert(pkt
->isResponse() || pkt
->cmd
== MemCmd::WriteLineReq
);
1716 Addr addr
= pkt
->getAddr();
1717 bool is_secure
= pkt
->isSecure();
1719 CacheBlk::State old_state
= blk
? blk
->status
: 0;
1722 // When handling a fill, we should have no writes to this line.
1723 assert(addr
== blockAlign(addr
));
1724 assert(!writeBuffer
.findMatch(addr
, is_secure
));
1727 // better have read new data...
1728 assert(pkt
->hasData());
1730 // only read responses and write-line requests have data;
1731 // note that we don't write the data here for write-line - that
1732 // happens in the subsequent satisfyCpuSideRequest.
1733 assert(pkt
->isRead() || pkt
->cmd
== MemCmd::WriteLineReq
);
1735 // need to do a replacement if allocating, otherwise we stick
1736 // with the temporary storage
1737 blk
= allocate
? allocateBlock(addr
, is_secure
, writebacks
) : NULL
;
1740 // No replaceable block or a mostly exclusive
1741 // cache... just use temporary storage to complete the
1742 // current request and then get rid of it
1743 assert(!tempBlock
->isValid());
1745 tempBlock
->set
= tags
->extractSet(addr
);
1746 tempBlock
->tag
= tags
->extractTag(addr
);
1747 // @todo: set security state as well...
1748 DPRINTF(Cache
, "using temp block for %#llx (%s)\n", addr
,
1749 is_secure
? "s" : "ns");
1751 tags
->insertBlock(pkt
, blk
);
1754 // we should never be overwriting a valid block
1755 assert(!blk
->isValid());
1757 // existing block... probably an upgrade
1758 assert(blk
->tag
== tags
->extractTag(addr
));
1759 // either we're getting new data or the block should already be valid
1760 assert(pkt
->hasData() || blk
->isValid());
1761 // don't clear block status... if block is already dirty we
1762 // don't want to lose that
1766 blk
->status
|= BlkSecure
;
1767 blk
->status
|= BlkValid
| BlkReadable
;
1769 // sanity check for whole-line writes, which should always be
1770 // marked as writable as part of the fill, and then later marked
1771 // dirty as part of satisfyCpuSideRequest
1772 if (pkt
->cmd
== MemCmd::WriteLineReq
) {
1773 assert(!pkt
->hasSharers());
1774 // at the moment other caches do not respond to the
1775 // invalidation requests corresponding to a whole-line write
1776 assert(!pkt
->cacheResponding());
1779 // here we deal with setting the appropriate state of the line,
1780 // and we start by looking at the hasSharers flag, and ignore the
1781 // cacheResponding flag (normally signalling dirty data) if the
1782 // packet has sharers, thus the line is never allocated as Owned
1783 // (dirty but not writable), and always ends up being either
1784 // Shared, Exclusive or Modified, see Packet::setCacheResponding
1786 if (!pkt
->hasSharers()) {
1787 // we could get a writable line from memory (rather than a
1788 // cache) even in a read-only cache, note that we set this bit
1789 // even for a read-only cache, possibly revisit this decision
1790 blk
->status
|= BlkWritable
;
1792 // check if we got this via cache-to-cache transfer (i.e., from a
1793 // cache that had the block in Modified or Owned state)
1794 if (pkt
->cacheResponding()) {
1795 // we got the block in Modified state, and invalidated the
1797 blk
->status
|= BlkDirty
;
1799 chatty_assert(!isReadOnly
, "Should never see dirty snoop response "
1800 "in read-only cache %s\n", name());
1804 DPRINTF(Cache
, "Block addr %#llx (%s) moving from state %x to %s\n",
1805 addr
, is_secure
? "s" : "ns", old_state
, blk
->print());
1807 // if we got new data, copy it in (checking for a read response
1808 // and a response that has data is the same in the end)
1809 if (pkt
->isRead()) {
1811 assert(pkt
->hasData());
1812 assert(pkt
->getSize() == blkSize
);
1814 std::memcpy(blk
->data
, pkt
->getConstPtr
<uint8_t>(), blkSize
);
1816 // We pay for fillLatency here.
1817 blk
->whenReady
= clockEdge() + fillLatency
* clockPeriod() +
1824 /////////////////////////////////////////////////////
1826 // Snoop path: requests coming in from the memory side
1828 /////////////////////////////////////////////////////
1831 Cache::doTimingSupplyResponse(PacketPtr req_pkt
, const uint8_t *blk_data
,
1832 bool already_copied
, bool pending_inval
)
1835 assert(req_pkt
->isRequest());
1836 assert(req_pkt
->needsResponse());
1838 DPRINTF(Cache
, "%s for %s addr %#llx size %d\n", __func__
,
1839 req_pkt
->cmdString(), req_pkt
->getAddr(), req_pkt
->getSize());
1840 // timing-mode snoop responses require a new packet, unless we
1841 // already made a copy...
1842 PacketPtr pkt
= req_pkt
;
1843 if (!already_copied
)
1844 // do not clear flags, and allocate space for data if the
1845 // packet needs it (the only packets that carry data are read
1847 pkt
= new Packet(req_pkt
, false, req_pkt
->isRead());
1849 assert(req_pkt
->req
->isUncacheable() || req_pkt
->isInvalidate() ||
1851 pkt
->makeTimingResponse();
1852 if (pkt
->isRead()) {
1853 pkt
->setDataFromBlock(blk_data
, blkSize
);
1855 if (pkt
->cmd
== MemCmd::ReadResp
&& pending_inval
) {
1856 // Assume we defer a response to a read from a far-away cache
1857 // A, then later defer a ReadExcl from a cache B on the same
1858 // bus as us. We'll assert cacheResponding in both cases, but
1859 // in the latter case cacheResponding will keep the
1860 // invalidation from reaching cache A. This special response
1861 // tells cache A that it gets the block to satisfy its read,
1862 // but must immediately invalidate it.
1863 pkt
->cmd
= MemCmd::ReadRespWithInvalidate
;
1865 // Here we consider forward_time, paying for just forward latency and
1866 // also charging the delay provided by the xbar.
1867 // forward_time is used as send_time in next allocateWriteBuffer().
1868 Tick forward_time
= clockEdge(forwardLatency
) + pkt
->headerDelay
;
1869 // Here we reset the timing of the packet.
1870 pkt
->headerDelay
= pkt
->payloadDelay
= 0;
1871 DPRINTF(CacheVerbose
,
1872 "%s created response: %s addr %#llx size %d tick: %lu\n",
1873 __func__
, pkt
->cmdString(), pkt
->getAddr(), pkt
->getSize(),
1875 memSidePort
->schedTimingSnoopResp(pkt
, forward_time
, true);
1879 Cache::handleSnoop(PacketPtr pkt
, CacheBlk
*blk
, bool is_timing
,
1880 bool is_deferred
, bool pending_inval
)
1882 DPRINTF(CacheVerbose
, "%s for %s addr %#llx size %d\n", __func__
,
1883 pkt
->cmdString(), pkt
->getAddr(), pkt
->getSize());
1884 // deferred snoops can only happen in timing mode
1885 assert(!(is_deferred
&& !is_timing
));
1886 // pending_inval only makes sense on deferred snoops
1887 assert(!(pending_inval
&& !is_deferred
));
1888 assert(pkt
->isRequest());
1890 // the packet may get modified if we or a forwarded snooper
1891 // responds in atomic mode, so remember a few things about the
1892 // original packet up front
1893 bool invalidate
= pkt
->isInvalidate();
1894 bool M5_VAR_USED needs_writable
= pkt
->needsWritable();
1896 // at the moment we could get an uncacheable write which does not
1897 // have the invalidate flag, and we need a suitable way of dealing
1899 panic_if(invalidate
&& pkt
->req
->isUncacheable(),
1900 "%s got an invalidating uncacheable snoop request %s to %#llx",
1901 name(), pkt
->cmdString(), pkt
->getAddr());
1903 uint32_t snoop_delay
= 0;
1905 if (forwardSnoops
) {
1906 // first propagate snoop upward to see if anyone above us wants to
1907 // handle it. save & restore packet src since it will get
1908 // rewritten to be relative to cpu-side bus (if any)
1909 bool alreadyResponded
= pkt
->cacheResponding();
1911 // copy the packet so that we can clear any flags before
1912 // forwarding it upwards, we also allocate data (passing
1913 // the pointer along in case of static data), in case
1914 // there is a snoop hit in upper levels
1915 Packet
snoopPkt(pkt
, true, true);
1916 snoopPkt
.setExpressSnoop();
1917 // the snoop packet does not need to wait any additional
1919 snoopPkt
.headerDelay
= snoopPkt
.payloadDelay
= 0;
1920 cpuSidePort
->sendTimingSnoopReq(&snoopPkt
);
1922 // add the header delay (including crossbar and snoop
1923 // delays) of the upward snoop to the snoop delay for this
1925 snoop_delay
+= snoopPkt
.headerDelay
;
1927 if (snoopPkt
.cacheResponding()) {
1928 // cache-to-cache response from some upper cache
1929 assert(!alreadyResponded
);
1930 pkt
->setCacheResponding();
1932 // upstream cache has the block, or has an outstanding
1933 // MSHR, pass the flag on
1934 if (snoopPkt
.hasSharers()) {
1935 pkt
->setHasSharers();
1937 // If this request is a prefetch or clean evict and an upper level
1938 // signals block present, make sure to propagate the block
1939 // presence to the requester.
1940 if (snoopPkt
.isBlockCached()) {
1941 pkt
->setBlockCached();
1944 cpuSidePort
->sendAtomicSnoop(pkt
);
1945 if (!alreadyResponded
&& pkt
->cacheResponding()) {
1946 // cache-to-cache response from some upper cache:
1947 // forward response to original requester
1948 assert(pkt
->isResponse());
1953 if (!blk
|| !blk
->isValid()) {
1954 DPRINTF(CacheVerbose
, "%s snoop miss for %s addr %#llx size %d\n",
1955 __func__
, pkt
->cmdString(), pkt
->getAddr(), pkt
->getSize());
1958 DPRINTF(Cache
, "%s snoop hit for %s addr %#llx size %d, "
1959 "old state is %s\n", __func__
, pkt
->cmdString(),
1960 pkt
->getAddr(), pkt
->getSize(), blk
->print());
1963 chatty_assert(!(isReadOnly
&& blk
->isDirty()),
1964 "Should never have a dirty block in a read-only cache %s\n",
1967 // We may end up modifying both the block state and the packet (if
1968 // we respond in atomic mode), so just figure out what to do now
1969 // and then do it later. If we find dirty data while snooping for
1970 // an invalidate, we don't need to send a response. The
1971 // invalidation itself is taken care of below.
1972 bool respond
= blk
->isDirty() && pkt
->needsResponse() &&
1973 pkt
->cmd
!= MemCmd::InvalidateReq
;
1974 bool have_writable
= blk
->isWritable();
1976 // Invalidate any prefetch's from below that would strip write permissions
1977 // MemCmd::HardPFReq is only observed by upstream caches. After missing
1978 // above and in it's own cache, a new MemCmd::ReadReq is created that
1979 // downstream caches observe.
1980 if (pkt
->mustCheckAbove()) {
1981 DPRINTF(Cache
, "Found addr %#llx in upper level cache for snoop %s from"
1982 " lower cache\n", pkt
->getAddr(), pkt
->cmdString());
1983 pkt
->setBlockCached();
1987 if (pkt
->isRead() && !invalidate
) {
1988 // reading without requiring the line in a writable state
1989 assert(!needs_writable
);
1990 pkt
->setHasSharers();
1992 // if the requesting packet is uncacheable, retain the line in
1993 // the current state, otherwhise unset the writable flag,
1994 // which means we go from Modified to Owned (and will respond
1995 // below), remain in Owned (and will respond below), from
1996 // Exclusive to Shared, or remain in Shared
1997 if (!pkt
->req
->isUncacheable())
1998 blk
->status
&= ~BlkWritable
;
2002 // prevent anyone else from responding, cache as well as
2003 // memory, and also prevent any memory from even seeing the
2005 pkt
->setCacheResponding();
2006 if (have_writable
) {
2007 // inform the cache hierarchy that this cache had the line
2008 // in the Modified state so that we avoid unnecessary
2009 // invalidations (see Packet::setResponderHadWritable)
2010 pkt
->setResponderHadWritable();
2012 // in the case of an uncacheable request there is no point
2013 // in setting the responderHadWritable flag, but since the
2014 // recipient does not care there is no harm in doing so
2016 // if the packet has needsWritable set we invalidate our
2017 // copy below and all other copies will be invalidates
2018 // through express snoops, and if needsWritable is not set
2019 // we already called setHasSharers above
2022 // if we are returning a writable and dirty (Modified) line,
2023 // we should be invalidating the line
2024 panic_if(!invalidate
&& !pkt
->hasSharers(),
2025 "%s is passing a Modified line through %s to %#llx, "
2026 "but keeping the block",
2027 name(), pkt
->cmdString(), pkt
->getAddr());
2030 doTimingSupplyResponse(pkt
, blk
->data
, is_deferred
, pending_inval
);
2032 pkt
->makeAtomicResponse();
2033 // packets such as upgrades do not actually have any data
2036 pkt
->setDataFromBlock(blk
->data
, blkSize
);
2040 if (!respond
&& is_timing
&& is_deferred
) {
2041 // if it's a deferred timing snoop to which we are not
2042 // responding, then we've made a copy of both the request and
2043 // the packet, delete them here
2044 assert(pkt
->needsResponse());
2049 // Do this last in case it deallocates block data or something
2052 invalidateBlock(blk
);
2055 DPRINTF(Cache
, "new state is %s\n", blk
->print());
2062 Cache::recvTimingSnoopReq(PacketPtr pkt
)
2064 DPRINTF(CacheVerbose
, "%s for %s addr %#llx size %d\n", __func__
,
2065 pkt
->cmdString(), pkt
->getAddr(), pkt
->getSize());
2067 // Snoops shouldn't happen when bypassing caches
2068 assert(!system
->bypassCaches());
2070 // no need to snoop requests that are not in range
2071 if (!inRange(pkt
->getAddr())) {
2075 bool is_secure
= pkt
->isSecure();
2076 CacheBlk
*blk
= tags
->findBlock(pkt
->getAddr(), is_secure
);
2078 Addr blk_addr
= blockAlign(pkt
->getAddr());
2079 MSHR
*mshr
= mshrQueue
.findMatch(blk_addr
, is_secure
);
2081 // Update the latency cost of the snoop so that the crossbar can
2082 // account for it. Do not overwrite what other neighbouring caches
2083 // have already done, rather take the maximum. The update is
2084 // tentative, for cases where we return before an upward snoop
2086 pkt
->snoopDelay
= std::max
<uint32_t>(pkt
->snoopDelay
,
2087 lookupLatency
* clockPeriod());
2089 // Inform request(Prefetch, CleanEvict or Writeback) from below of
2090 // MSHR hit, set setBlockCached.
2091 if (mshr
&& pkt
->mustCheckAbove()) {
2092 DPRINTF(Cache
, "Setting block cached for %s from"
2093 "lower cache on mshr hit %#x\n",
2094 pkt
->cmdString(), pkt
->getAddr());
2095 pkt
->setBlockCached();
2099 // Let the MSHR itself track the snoop and decide whether we want
2100 // to go ahead and do the regular cache snoop
2101 if (mshr
&& mshr
->handleSnoop(pkt
, order
++)) {
2102 DPRINTF(Cache
, "Deferring snoop on in-service MSHR to blk %#llx (%s)."
2103 "mshrs: %s\n", blk_addr
, is_secure
? "s" : "ns",
2106 if (mshr
->getNumTargets() > numTarget
)
2107 warn("allocating bonus target for snoop"); //handle later
2111 //We also need to check the writeback buffers and handle those
2112 WriteQueueEntry
*wb_entry
= writeBuffer
.findMatch(blk_addr
, is_secure
);
2114 DPRINTF(Cache
, "Snoop hit in writeback to addr %#llx (%s)\n",
2115 pkt
->getAddr(), is_secure
? "s" : "ns");
2116 // Expect to see only Writebacks and/or CleanEvicts here, both of
2117 // which should not be generated for uncacheable data.
2118 assert(!wb_entry
->isUncacheable());
2119 // There should only be a single request responsible for generating
2120 // Writebacks/CleanEvicts.
2121 assert(wb_entry
->getNumTargets() == 1);
2122 PacketPtr wb_pkt
= wb_entry
->getTarget()->pkt
;
2123 assert(wb_pkt
->isEviction());
2125 if (pkt
->isEviction()) {
2126 // if the block is found in the write queue, set the BLOCK_CACHED
2127 // flag for Writeback/CleanEvict snoop. On return the snoop will
2128 // propagate the BLOCK_CACHED flag in Writeback packets and prevent
2129 // any CleanEvicts from travelling down the memory hierarchy.
2130 pkt
->setBlockCached();
2131 DPRINTF(Cache
, "Squashing %s from lower cache on writequeue hit"
2132 " %#x\n", pkt
->cmdString(), pkt
->getAddr());
2136 // conceptually writebacks are no different to other blocks in
2137 // this cache, so the behaviour is modelled after handleSnoop,
2138 // the difference being that instead of querying the block
2139 // state to determine if it is dirty and writable, we use the
2140 // command and fields of the writeback packet
2141 bool respond
= wb_pkt
->cmd
== MemCmd::WritebackDirty
&&
2142 pkt
->needsResponse() && pkt
->cmd
!= MemCmd::InvalidateReq
;
2143 bool have_writable
= !wb_pkt
->hasSharers();
2144 bool invalidate
= pkt
->isInvalidate();
2146 if (!pkt
->req
->isUncacheable() && pkt
->isRead() && !invalidate
) {
2147 assert(!pkt
->needsWritable());
2148 pkt
->setHasSharers();
2149 wb_pkt
->setHasSharers();
2153 pkt
->setCacheResponding();
2155 if (have_writable
) {
2156 pkt
->setResponderHadWritable();
2159 doTimingSupplyResponse(pkt
, wb_pkt
->getConstPtr
<uint8_t>(),
2164 // Invalidation trumps our writeback... discard here
2165 // Note: markInService will remove entry from writeback buffer.
2166 markInService(wb_entry
);
2171 // If this was a shared writeback, there may still be
2172 // other shared copies above that require invalidation.
2173 // We could be more selective and return here if the
2174 // request is non-exclusive or if the writeback is
2176 uint32_t snoop_delay
= handleSnoop(pkt
, blk
, true, false, false);
2178 // Override what we did when we first saw the snoop, as we now
2179 // also have the cost of the upwards snoops to account for
2180 pkt
->snoopDelay
= std::max
<uint32_t>(pkt
->snoopDelay
, snoop_delay
+
2181 lookupLatency
* clockPeriod());
2185 Cache::CpuSidePort::recvTimingSnoopResp(PacketPtr pkt
)
2187 // Express snoop responses from master to slave, e.g., from L1 to L2
2188 cache
->recvTimingSnoopResp(pkt
);
2193 Cache::recvAtomicSnoop(PacketPtr pkt
)
2195 // Snoops shouldn't happen when bypassing caches
2196 assert(!system
->bypassCaches());
2198 // no need to snoop requests that are not in range.
2199 if (!inRange(pkt
->getAddr())) {
2203 CacheBlk
*blk
= tags
->findBlock(pkt
->getAddr(), pkt
->isSecure());
2204 uint32_t snoop_delay
= handleSnoop(pkt
, blk
, false, false, false);
2205 return snoop_delay
+ lookupLatency
* clockPeriod();
2210 Cache::getNextQueueEntry()
2212 // Check both MSHR queue and write buffer for potential requests,
2213 // note that null does not mean there is no request, it could
2214 // simply be that it is not ready
2215 MSHR
*miss_mshr
= mshrQueue
.getNext();
2216 WriteQueueEntry
*wq_entry
= writeBuffer
.getNext();
2218 // If we got a write buffer request ready, first priority is a
2219 // full write buffer, otherwise we favour the miss requests
2220 if (wq_entry
&& (writeBuffer
.isFull() || !miss_mshr
)) {
2221 // need to search MSHR queue for conflicting earlier miss.
2222 MSHR
*conflict_mshr
=
2223 mshrQueue
.findPending(wq_entry
->blkAddr
,
2224 wq_entry
->isSecure
);
2226 if (conflict_mshr
&& conflict_mshr
->order
< wq_entry
->order
) {
2227 // Service misses in order until conflict is cleared.
2228 return conflict_mshr
;
2230 // @todo Note that we ignore the ready time of the conflict here
2233 // No conflicts; issue write
2235 } else if (miss_mshr
) {
2236 // need to check for conflicting earlier writeback
2237 WriteQueueEntry
*conflict_mshr
=
2238 writeBuffer
.findPending(miss_mshr
->blkAddr
,
2239 miss_mshr
->isSecure
);
2240 if (conflict_mshr
) {
2241 // not sure why we don't check order here... it was in the
2242 // original code but commented out.
2244 // The only way this happens is if we are
2245 // doing a write and we didn't have permissions
2246 // then subsequently saw a writeback (owned got evicted)
2247 // We need to make sure to perform the writeback first
2248 // To preserve the dirty data, then we can issue the write
2250 // should we return wq_entry here instead? I.e. do we
2251 // have to flush writes in order? I don't think so... not
2252 // for Alpha anyway. Maybe for x86?
2253 return conflict_mshr
;
2255 // @todo Note that we ignore the ready time of the conflict here
2258 // No conflicts; issue read
2262 // fall through... no pending requests. Try a prefetch.
2263 assert(!miss_mshr
&& !wq_entry
);
2264 if (prefetcher
&& mshrQueue
.canPrefetch()) {
2265 // If we have a miss queue slot, we can try a prefetch
2266 PacketPtr pkt
= prefetcher
->getPacket();
2268 Addr pf_addr
= blockAlign(pkt
->getAddr());
2269 if (!tags
->findBlock(pf_addr
, pkt
->isSecure()) &&
2270 !mshrQueue
.findMatch(pf_addr
, pkt
->isSecure()) &&
2271 !writeBuffer
.findMatch(pf_addr
, pkt
->isSecure())) {
2272 // Update statistic on number of prefetches issued
2273 // (hwpf_mshr_misses)
2274 assert(pkt
->req
->masterId() < system
->maxMasters());
2275 mshr_misses
[pkt
->cmdToIndex()][pkt
->req
->masterId()]++;
2277 // allocate an MSHR and return it, note
2278 // that we send the packet straight away, so do not
2279 // schedule the send
2280 return allocateMissBuffer(pkt
, curTick(), false);
2282 // free the request and packet
2293 Cache::isCachedAbove(PacketPtr pkt
, bool is_timing
) const
2297 // Mirroring the flow of HardPFReqs, the cache sends CleanEvict and
2298 // Writeback snoops into upper level caches to check for copies of the
2299 // same block. Using the BLOCK_CACHED flag with the Writeback/CleanEvict
2300 // packet, the cache can inform the crossbar below of presence or absence
2303 Packet
snoop_pkt(pkt
, true, false);
2304 snoop_pkt
.setExpressSnoop();
2305 // Assert that packet is either Writeback or CleanEvict and not a
2306 // prefetch request because prefetch requests need an MSHR and may
2307 // generate a snoop response.
2308 assert(pkt
->isEviction());
2309 snoop_pkt
.senderState
= NULL
;
2310 cpuSidePort
->sendTimingSnoopReq(&snoop_pkt
);
2311 // Writeback/CleanEvict snoops do not generate a snoop response.
2312 assert(!(snoop_pkt
.cacheResponding()));
2313 return snoop_pkt
.isBlockCached();
2315 cpuSidePort
->sendAtomicSnoop(pkt
);
2316 return pkt
->isBlockCached();
2321 Cache::nextQueueReadyTime() const
2323 Tick nextReady
= std::min(mshrQueue
.nextReadyTime(),
2324 writeBuffer
.nextReadyTime());
2326 // Don't signal prefetch ready time if no MSHRs available
2327 // Will signal once enoguh MSHRs are deallocated
2328 if (prefetcher
&& mshrQueue
.canPrefetch()) {
2329 nextReady
= std::min(nextReady
,
2330 prefetcher
->nextPrefetchReadyTime());
2337 Cache::sendMSHRQueuePacket(MSHR
* mshr
)
2341 // use request from 1st target
2342 PacketPtr tgt_pkt
= mshr
->getTarget()->pkt
;
2344 DPRINTF(Cache
, "%s MSHR %s for addr %#llx size %d\n", __func__
,
2345 tgt_pkt
->cmdString(), tgt_pkt
->getAddr(),
2346 tgt_pkt
->getSize());
2348 CacheBlk
*blk
= tags
->findBlock(mshr
->blkAddr
, mshr
->isSecure
);
2350 if (tgt_pkt
->cmd
== MemCmd::HardPFReq
&& forwardSnoops
) {
2351 // we should never have hardware prefetches to allocated
2353 assert(blk
== NULL
);
2355 // We need to check the caches above us to verify that
2356 // they don't have a copy of this block in the dirty state
2357 // at the moment. Without this check we could get a stale
2358 // copy from memory that might get used in place of the
2360 Packet
snoop_pkt(tgt_pkt
, true, false);
2361 snoop_pkt
.setExpressSnoop();
2362 // We are sending this packet upwards, but if it hits we will
2363 // get a snoop response that we end up treating just like a
2364 // normal response, hence it needs the MSHR as its sender
2366 snoop_pkt
.senderState
= mshr
;
2367 cpuSidePort
->sendTimingSnoopReq(&snoop_pkt
);
2369 // Check to see if the prefetch was squashed by an upper cache (to
2370 // prevent us from grabbing the line) or if a Check to see if a
2371 // writeback arrived between the time the prefetch was placed in
2372 // the MSHRs and when it was selected to be sent or if the
2373 // prefetch was squashed by an upper cache.
2375 // It is important to check cacheResponding before
2376 // prefetchSquashed. If another cache has committed to
2377 // responding, it will be sending a dirty response which will
2378 // arrive at the MSHR allocated for this request. Checking the
2379 // prefetchSquash first may result in the MSHR being
2380 // prematurely deallocated.
2381 if (snoop_pkt
.cacheResponding()) {
2382 auto M5_VAR_USED r
= outstandingSnoop
.insert(snoop_pkt
.req
);
2385 // if we are getting a snoop response with no sharers it
2386 // will be allocated as Modified
2387 bool pending_modified_resp
= !snoop_pkt
.hasSharers();
2388 markInService(mshr
, pending_modified_resp
);
2390 DPRINTF(Cache
, "Upward snoop of prefetch for addr"
2392 tgt_pkt
->getAddr(), tgt_pkt
->isSecure()? "s": "ns");
2396 if (snoop_pkt
.isBlockCached()) {
2397 DPRINTF(Cache
, "Block present, prefetch squashed by cache. "
2398 "Deallocating mshr target %#x.\n",
2401 // Deallocate the mshr target
2402 if (mshrQueue
.forceDeallocateTarget(mshr
)) {
2403 // Clear block if this deallocation resulted freed an
2404 // mshr when all had previously been utilized
2405 clearBlocked(Blocked_NoMSHRs
);
2411 // either a prefetch that is not present upstream, or a normal
2412 // MSHR request, proceed to get the packet to send downstream
2413 PacketPtr pkt
= createMissPacket(tgt_pkt
, blk
, mshr
->needsWritable());
2415 mshr
->isForward
= (pkt
== NULL
);
2417 if (mshr
->isForward
) {
2418 // not a cache block request, but a response is expected
2419 // make copy of current packet to forward, keep current
2420 // copy for response handling
2421 pkt
= new Packet(tgt_pkt
, false, true);
2422 assert(!pkt
->isWrite());
2425 // play it safe and append (rather than set) the sender state,
2426 // as forwarded packets may already have existing state
2427 pkt
->pushSenderState(mshr
);
2429 if (!memSidePort
->sendTimingReq(pkt
)) {
2430 // we are awaiting a retry, but we
2431 // delete the packet and will be creating a new packet
2432 // when we get the opportunity
2435 // note that we have now masked any requestBus and
2436 // schedSendEvent (we will wait for a retry before
2437 // doing anything), and this is so even if we do not
2438 // care about this packet and might override it before
2442 // As part of the call to sendTimingReq the packet is
2443 // forwarded to all neighbouring caches (and any caches
2444 // above them) as a snoop. Thus at this point we know if
2445 // any of the neighbouring caches are responding, and if
2446 // so, we know it is dirty, and we can determine if it is
2447 // being passed as Modified, making our MSHR the ordering
2449 bool pending_modified_resp
= !pkt
->hasSharers() &&
2450 pkt
->cacheResponding();
2451 markInService(mshr
, pending_modified_resp
);
2457 Cache::sendWriteQueuePacket(WriteQueueEntry
* wq_entry
)
2461 // always a single target for write queue entries
2462 PacketPtr tgt_pkt
= wq_entry
->getTarget()->pkt
;
2464 DPRINTF(Cache
, "%s write %s for addr %#llx size %d\n", __func__
,
2465 tgt_pkt
->cmdString(), tgt_pkt
->getAddr(),
2466 tgt_pkt
->getSize());
2468 // forward as is, both for evictions and uncacheable writes
2469 if (!memSidePort
->sendTimingReq(tgt_pkt
)) {
2470 // note that we have now masked any requestBus and
2471 // schedSendEvent (we will wait for a retry before
2472 // doing anything), and this is so even if we do not
2473 // care about this packet and might override it before
2477 markInService(wq_entry
);
2483 Cache::serialize(CheckpointOut
&cp
) const
2485 bool dirty(isDirty());
2488 warn("*** The cache still contains dirty data. ***\n");
2489 warn(" Make sure to drain the system using the correct flags.\n");
2490 warn(" This checkpoint will not restore correctly and dirty data in "
2491 "the cache will be lost!\n");
2494 // Since we don't checkpoint the data in the cache, any dirty data
2495 // will be lost when restoring from a checkpoint of a system that
2496 // wasn't drained properly. Flag the checkpoint as invalid if the
2497 // cache contains dirty data.
2498 bool bad_checkpoint(dirty
);
2499 SERIALIZE_SCALAR(bad_checkpoint
);
2503 Cache::unserialize(CheckpointIn
&cp
)
2505 bool bad_checkpoint
;
2506 UNSERIALIZE_SCALAR(bad_checkpoint
);
2507 if (bad_checkpoint
) {
2508 fatal("Restoring from checkpoints with dirty caches is not supported "
2509 "in the classic memory system. Please remove any caches or "
2510 " drain them properly before taking checkpoints.\n");
2521 Cache::CpuSidePort::getAddrRanges() const
2523 return cache
->getAddrRanges();
2527 Cache::CpuSidePort::recvTimingReq(PacketPtr pkt
)
2529 assert(!cache
->system
->bypassCaches());
2531 bool success
= false;
2533 // always let express snoop packets through if even if blocked
2534 if (pkt
->isExpressSnoop()) {
2535 // do not change the current retry state
2536 bool M5_VAR_USED bypass_success
= cache
->recvTimingReq(pkt
);
2537 assert(bypass_success
);
2539 } else if (blocked
|| mustSendRetry
) {
2540 // either already committed to send a retry, or blocked
2543 // pass it on to the cache, and let the cache decide if we
2544 // have to retry or not
2545 success
= cache
->recvTimingReq(pkt
);
2548 // remember if we have to retry
2549 mustSendRetry
= !success
;
2554 Cache::CpuSidePort::recvAtomic(PacketPtr pkt
)
2556 return cache
->recvAtomic(pkt
);
2560 Cache::CpuSidePort::recvFunctional(PacketPtr pkt
)
2562 // functional request
2563 cache
->functionalAccess(pkt
, true);
2567 CpuSidePort::CpuSidePort(const std::string
&_name
, Cache
*_cache
,
2568 const std::string
&_label
)
2569 : BaseCache::CacheSlavePort(_name
, _cache
, _label
), cache(_cache
)
2574 CacheParams::create()
2578 return new Cache(this);
2587 Cache::MemSidePort::recvTimingResp(PacketPtr pkt
)
2589 cache
->recvTimingResp(pkt
);
2593 // Express snooping requests to memside port
2595 Cache::MemSidePort::recvTimingSnoopReq(PacketPtr pkt
)
2597 // handle snooping requests
2598 cache
->recvTimingSnoopReq(pkt
);
2602 Cache::MemSidePort::recvAtomicSnoop(PacketPtr pkt
)
2604 return cache
->recvAtomicSnoop(pkt
);
2608 Cache::MemSidePort::recvFunctionalSnoop(PacketPtr pkt
)
2610 // functional snoop (note that in contrast to atomic we don't have
2611 // a specific functionalSnoop method, as they have the same
2612 // behaviour regardless)
2613 cache
->functionalAccess(pkt
, false);
2617 Cache::CacheReqPacketQueue::sendDeferredPacket()
2620 assert(!waitingOnRetry
);
2622 // there should never be any deferred request packets in the
2623 // queue, instead we resly on the cache to provide the packets
2624 // from the MSHR queue or write queue
2625 assert(deferredPacketReadyTime() == MaxTick
);
2627 // check for request packets (requests & writebacks)
2628 QueueEntry
* entry
= cache
.getNextQueueEntry();
2631 // can happen if e.g. we attempt a writeback and fail, but
2632 // before the retry, the writeback is eliminated because
2633 // we snoop another cache's ReadEx.
2635 // let our snoop responses go first if there are responses to
2636 // the same addresses
2637 if (checkConflictingSnoop(entry
->blkAddr
)) {
2640 waitingOnRetry
= entry
->sendPacket(cache
);
2643 // if we succeeded and are not waiting for a retry, schedule the
2644 // next send considering when the next queue is ready, note that
2645 // snoop responses have their own packet queue and thus schedule
2647 if (!waitingOnRetry
) {
2648 schedSendEvent(cache
.nextQueueReadyTime());
2653 MemSidePort::MemSidePort(const std::string
&_name
, Cache
*_cache
,
2654 const std::string
&_label
)
2655 : BaseCache::CacheMasterPort(_name
, _cache
, _reqQueue
, _snoopRespQueue
),
2656 _reqQueue(*_cache
, *this, _snoopRespQueue
, _label
),
2657 _snoopRespQueue(*_cache
, *this, _label
), cache(_cache
)