2 * Copyright (c) 2010-2015 ARM Limited
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder. You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated
11 * unmodified and in its entirety in all distributions of the software,
12 * modified or unmodified, in source code or in binary form.
14 * Copyright (c) 2002-2005 The Regents of The University of Michigan
15 * Copyright (c) 2010,2015 Advanced Micro Devices, Inc.
16 * All rights reserved.
18 * Redistribution and use in source and binary forms, with or without
19 * modification, are permitted provided that the following conditions are
20 * met: redistributions of source code must retain the above copyright
21 * notice, this list of conditions and the following disclaimer;
22 * redistributions in binary form must reproduce the above copyright
23 * notice, this list of conditions and the following disclaimer in the
24 * documentation and/or other materials provided with the distribution;
25 * neither the name of the copyright holders nor the names of its
26 * contributors may be used to endorse or promote products derived from
27 * this software without specific prior written permission.
29 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
30 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
31 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
32 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
33 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
34 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
35 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
36 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
37 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
38 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
39 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
41 * Authors: Erik Hallnor
54 #include "mem/cache/cache.hh"
56 #include "base/misc.hh"
57 #include "base/types.hh"
58 #include "debug/Cache.hh"
59 #include "debug/CachePort.hh"
60 #include "debug/CacheTags.hh"
61 #include "debug/CacheVerbose.hh"
62 #include "mem/cache/blk.hh"
63 #include "mem/cache/mshr.hh"
64 #include "mem/cache/prefetch/base.hh"
65 #include "sim/sim_exit.hh"
67 Cache::Cache(const CacheParams
*p
)
68 : BaseCache(p
, p
->system
->cacheLineSize()),
70 prefetcher(p
->prefetcher
),
72 prefetchOnAccess(p
->prefetch_on_access
),
73 clusivity(p
->clusivity
),
74 writebackClean(p
->writeback_clean
),
75 tempBlockWriteback(nullptr),
76 writebackTempBlockAtomicEvent(this, false,
77 EventBase::Delayed_Writeback_Pri
)
79 tempBlock
= new CacheBlk();
80 tempBlock
->data
= new uint8_t[blkSize
];
82 cpuSidePort
= new CpuSidePort(p
->name
+ ".cpu_side", this,
84 memSidePort
= new MemSidePort(p
->name
+ ".mem_side", this,
89 prefetcher
->setCache(this);
94 delete [] tempBlock
->data
;
104 BaseCache::regStats();
108 Cache::cmpAndSwap(CacheBlk
*blk
, PacketPtr pkt
)
110 assert(pkt
->isRequest());
112 uint64_t overwrite_val
;
114 uint64_t condition_val64
;
115 uint32_t condition_val32
;
117 int offset
= tags
->extractBlkOffset(pkt
->getAddr());
118 uint8_t *blk_data
= blk
->data
+ offset
;
120 assert(sizeof(uint64_t) >= pkt
->getSize());
122 overwrite_mem
= true;
123 // keep a copy of our possible write value, and copy what is at the
124 // memory address into the packet
125 pkt
->writeData((uint8_t *)&overwrite_val
);
126 pkt
->setData(blk_data
);
128 if (pkt
->req
->isCondSwap()) {
129 if (pkt
->getSize() == sizeof(uint64_t)) {
130 condition_val64
= pkt
->req
->getExtraData();
131 overwrite_mem
= !std::memcmp(&condition_val64
, blk_data
,
133 } else if (pkt
->getSize() == sizeof(uint32_t)) {
134 condition_val32
= (uint32_t)pkt
->req
->getExtraData();
135 overwrite_mem
= !std::memcmp(&condition_val32
, blk_data
,
138 panic("Invalid size for conditional read/write\n");
142 std::memcpy(blk_data
, &overwrite_val
, pkt
->getSize());
143 blk
->status
|= BlkDirty
;
149 Cache::satisfyCpuSideRequest(PacketPtr pkt
, CacheBlk
*blk
,
150 bool deferred_response
, bool pending_downgrade
)
152 assert(pkt
->isRequest());
154 assert(blk
&& blk
->isValid());
155 // Occasionally this is not true... if we are a lower-level cache
156 // satisfying a string of Read and ReadEx requests from
157 // upper-level caches, a Read will mark the block as shared but we
158 // can satisfy a following ReadEx anyway since we can rely on the
159 // Read requester(s) to have buffered the ReadEx snoop and to
160 // invalidate their blocks after receiving them.
161 // assert(!pkt->needsWritable() || blk->isWritable());
162 assert(pkt
->getOffset(blkSize
) + pkt
->getSize() <= blkSize
);
164 // Check RMW operations first since both isRead() and
165 // isWrite() will be true for them
166 if (pkt
->cmd
== MemCmd::SwapReq
) {
167 cmpAndSwap(blk
, pkt
);
168 } else if (pkt
->isWrite()) {
169 // we have the block in a writable state and can go ahead,
170 // note that the line may be also be considered writable in
171 // downstream caches along the path to memory, but always
172 // Exclusive, and never Modified
173 assert(blk
->isWritable());
174 // Write or WriteLine at the first cache with block in writable state
175 if (blk
->checkWrite(pkt
)) {
176 pkt
->writeDataToBlock(blk
->data
, blkSize
);
178 // Always mark the line as dirty (and thus transition to the
179 // Modified state) even if we are a failed StoreCond so we
180 // supply data to any snoops that have appended themselves to
181 // this cache before knowing the store will fail.
182 blk
->status
|= BlkDirty
;
183 DPRINTF(CacheVerbose
, "%s for %s addr %#llx size %d (write)\n",
184 __func__
, pkt
->cmdString(), pkt
->getAddr(), pkt
->getSize());
185 } else if (pkt
->isRead()) {
187 blk
->trackLoadLocked(pkt
);
190 // all read responses have a data payload
191 assert(pkt
->hasRespData());
192 pkt
->setDataFromBlock(blk
->data
, blkSize
);
194 // determine if this read is from a (coherent) cache, or not
195 // by looking at the command type; we could potentially add a
196 // packet attribute such as 'FromCache' to make this check a
198 if (pkt
->cmd
== MemCmd::ReadExReq
||
199 pkt
->cmd
== MemCmd::ReadSharedReq
||
200 pkt
->cmd
== MemCmd::ReadCleanReq
||
201 pkt
->cmd
== MemCmd::SCUpgradeFailReq
) {
202 assert(pkt
->getSize() == blkSize
);
203 // special handling for coherent block requests from
204 // upper-level caches
205 if (pkt
->needsWritable()) {
207 assert(pkt
->cmd
== MemCmd::ReadExReq
||
208 pkt
->cmd
== MemCmd::SCUpgradeFailReq
);
210 // if we have a dirty copy, make sure the recipient
211 // keeps it marked dirty (in the modified state)
212 if (blk
->isDirty()) {
213 pkt
->setCacheResponding();
215 // on ReadExReq we give up our copy unconditionally,
216 // even if this cache is mostly inclusive, we may want
218 invalidateBlock(blk
);
219 } else if (blk
->isWritable() && !pending_downgrade
&&
220 !pkt
->hasSharers() &&
221 pkt
->cmd
!= MemCmd::ReadCleanReq
) {
222 // we can give the requester a writable copy on a read
224 // - we have a writable copy at this level (& below)
225 // - we don't have a pending snoop from below
226 // signaling another read request
227 // - no other cache above has a copy (otherwise it
228 // would have set hasSharers flag when
229 // snooping the packet)
230 // - the read has explicitly asked for a clean
232 if (blk
->isDirty()) {
233 // special considerations if we're owner:
234 if (!deferred_response
) {
235 // respond with the line in Modified state
236 // (cacheResponding set, hasSharers not set)
237 pkt
->setCacheResponding();
239 if (clusivity
== Enums::mostly_excl
) {
240 // if this cache is mostly exclusive with
241 // respect to the cache above, drop the
242 // block, no need to first unset the dirty
244 invalidateBlock(blk
);
246 // if this cache is mostly inclusive, we
247 // keep the block in the Exclusive state,
248 // and pass it upwards as Modified
249 // (writable and dirty), hence we have
250 // multiple caches, all on the same path
251 // towards memory, all considering the
252 // same block writable, but only one
253 // considering it Modified
255 // we get away with multiple caches (on
256 // the same path to memory) considering
257 // the block writeable as we always enter
258 // the cache hierarchy through a cache,
259 // and first snoop upwards in all other
261 blk
->status
&= ~BlkDirty
;
264 // if we're responding after our own miss,
265 // there's a window where the recipient didn't
266 // know it was getting ownership and may not
267 // have responded to snoops correctly, so we
268 // have to respond with a shared line
269 pkt
->setHasSharers();
273 // otherwise only respond with a shared copy
274 pkt
->setHasSharers();
278 // Upgrade or Invalidate
279 assert(pkt
->isUpgrade() || pkt
->isInvalidate());
281 // for invalidations we could be looking at the temp block
282 // (for upgrades we always allocate)
283 invalidateBlock(blk
);
284 DPRINTF(CacheVerbose
, "%s for %s addr %#llx size %d (invalidation)\n",
285 __func__
, pkt
->cmdString(), pkt
->getAddr(), pkt
->getSize());
290 /////////////////////////////////////////////////////
292 // MSHR helper functions
294 /////////////////////////////////////////////////////
298 Cache::markInService(MSHR
*mshr
, bool pending_modified_resp
)
300 markInServiceInternal(mshr
, pending_modified_resp
);
303 /////////////////////////////////////////////////////
305 // Access path: requests coming in from the CPU side
307 /////////////////////////////////////////////////////
310 Cache::access(PacketPtr pkt
, CacheBlk
*&blk
, Cycles
&lat
,
311 PacketList
&writebacks
)
314 assert(pkt
->isRequest());
316 chatty_assert(!(isReadOnly
&& pkt
->isWrite()),
317 "Should never see a write in a read-only cache %s\n",
320 DPRINTF(CacheVerbose
, "%s for %s addr %#llx size %d\n", __func__
,
321 pkt
->cmdString(), pkt
->getAddr(), pkt
->getSize());
323 if (pkt
->req
->isUncacheable()) {
324 DPRINTF(Cache
, "%s%s addr %#llx uncacheable\n", pkt
->cmdString(),
325 pkt
->req
->isInstFetch() ? " (ifetch)" : "",
328 // flush and invalidate any existing block
329 CacheBlk
*old_blk(tags
->findBlock(pkt
->getAddr(), pkt
->isSecure()));
330 if (old_blk
&& old_blk
->isValid()) {
331 if (old_blk
->isDirty() || writebackClean
)
332 writebacks
.push_back(writebackBlk(old_blk
));
334 writebacks
.push_back(cleanEvictBlk(old_blk
));
335 tags
->invalidate(old_blk
);
336 old_blk
->invalidate();
340 // lookupLatency is the latency in case the request is uncacheable.
345 ContextID id
= pkt
->req
->hasContextId() ?
346 pkt
->req
->contextId() : InvalidContextID
;
347 // Here lat is the value passed as parameter to accessBlock() function
348 // that can modify its value.
349 blk
= tags
->accessBlock(pkt
->getAddr(), pkt
->isSecure(), lat
, id
);
351 DPRINTF(Cache
, "%s%s addr %#llx size %d (%s) %s\n", pkt
->cmdString(),
352 pkt
->req
->isInstFetch() ? " (ifetch)" : "",
353 pkt
->getAddr(), pkt
->getSize(), pkt
->isSecure() ? "s" : "ns",
354 blk
? "hit " + blk
->print() : "miss");
357 if (pkt
->isEviction()) {
358 // We check for presence of block in above caches before issuing
359 // Writeback or CleanEvict to write buffer. Therefore the only
360 // possible cases can be of a CleanEvict packet coming from above
361 // encountering a Writeback generated in this cache peer cache and
362 // waiting in the write buffer. Cases of upper level peer caches
363 // generating CleanEvict and Writeback or simply CleanEvict and
364 // CleanEvict almost simultaneously will be caught by snoops sent out
366 std::vector
<MSHR
*> outgoing
;
367 if (writeBuffer
.findMatches(pkt
->getAddr(), pkt
->isSecure(),
369 assert(outgoing
.size() == 1);
370 MSHR
*wb_entry
= outgoing
[0];
371 assert(wb_entry
->getNumTargets() == 1);
372 PacketPtr wbPkt
= wb_entry
->getTarget()->pkt
;
373 assert(wbPkt
->isWriteback());
375 if (pkt
->isCleanEviction()) {
376 // The CleanEvict and WritebackClean snoops into other
377 // peer caches of the same level while traversing the
378 // crossbar. If a copy of the block is found, the
379 // packet is deleted in the crossbar. Hence, none of
380 // the other upper level caches connected to this
381 // cache have the block, so we can clear the
382 // BLOCK_CACHED flag in the Writeback if set and
383 // discard the CleanEvict by returning true.
384 wbPkt
->clearBlockCached();
387 assert(pkt
->cmd
== MemCmd::WritebackDirty
);
388 // Dirty writeback from above trumps our clean
389 // writeback... discard here
390 // Note: markInService will remove entry from writeback buffer.
391 markInService(wb_entry
, false);
397 // Writeback handling is special case. We can write the block into
398 // the cache without having a writeable copy (or any copy at all).
399 if (pkt
->isWriteback()) {
400 assert(blkSize
== pkt
->getSize());
402 // we could get a clean writeback while we are having
403 // outstanding accesses to a block, do the simple thing for
404 // now and drop the clean writeback so that we do not upset
405 // any ordering/decisions about ownership already taken
406 if (pkt
->cmd
== MemCmd::WritebackClean
&&
407 mshrQueue
.findMatch(pkt
->getAddr(), pkt
->isSecure())) {
408 DPRINTF(Cache
, "Clean writeback %#llx to block with MSHR, "
409 "dropping\n", pkt
->getAddr());
414 // need to do a replacement
415 blk
= allocateBlock(pkt
->getAddr(), pkt
->isSecure(), writebacks
);
417 // no replaceable block available: give up, fwd to next level.
421 tags
->insertBlock(pkt
, blk
);
423 blk
->status
= (BlkValid
| BlkReadable
);
424 if (pkt
->isSecure()) {
425 blk
->status
|= BlkSecure
;
428 // only mark the block dirty if we got a writeback command,
429 // and leave it as is for a clean writeback
430 if (pkt
->cmd
== MemCmd::WritebackDirty
) {
431 blk
->status
|= BlkDirty
;
433 // if the packet does not have sharers, it is passing
434 // writable, and we got the writeback in Modified or Exclusive
435 // state, if not we are in the Owned or Shared state
436 if (!pkt
->hasSharers()) {
437 blk
->status
|= BlkWritable
;
439 // nothing else to do; writeback doesn't expect response
440 assert(!pkt
->needsResponse());
441 std::memcpy(blk
->data
, pkt
->getConstPtr
<uint8_t>(), blkSize
);
442 DPRINTF(Cache
, "%s new state is %s\n", __func__
, blk
->print());
445 } else if (pkt
->cmd
== MemCmd::CleanEvict
) {
447 // Found the block in the tags, need to stop CleanEvict from
448 // propagating further down the hierarchy. Returning true will
449 // treat the CleanEvict like a satisfied write request and delete
453 // We didn't find the block here, propagate the CleanEvict further
454 // down the memory hierarchy. Returning false will treat the CleanEvict
455 // like a Writeback which could not find a replaceable block so has to
458 } else if ((blk
!= NULL
) &&
459 (pkt
->needsWritable() ? blk
->isWritable() : blk
->isReadable())) {
460 // OK to satisfy access
462 satisfyCpuSideRequest(pkt
, blk
);
466 // Can't satisfy access normally... either no block (blk == NULL)
467 // or have block but need writable
471 if (blk
== NULL
&& pkt
->isLLSC() && pkt
->isWrite()) {
472 // complete miss on store conditional... just give up now
473 pkt
->req
->setExtraData(0);
481 Cache::doWritebacks(PacketList
& writebacks
, Tick forward_time
)
483 while (!writebacks
.empty()) {
484 PacketPtr wbPkt
= writebacks
.front();
485 // We use forwardLatency here because we are copying writebacks to
486 // write buffer. Call isCachedAbove for both Writebacks and
487 // CleanEvicts. If isCachedAbove returns true we set BLOCK_CACHED flag
488 // in Writebacks and discard CleanEvicts.
489 if (isCachedAbove(wbPkt
)) {
490 if (wbPkt
->cmd
== MemCmd::CleanEvict
) {
491 // Delete CleanEvict because cached copies exist above. The
492 // packet destructor will delete the request object because
493 // this is a non-snoop request packet which does not require a
496 } else if (wbPkt
->cmd
== MemCmd::WritebackClean
) {
497 // clean writeback, do not send since the block is
498 // still cached above
499 assert(writebackClean
);
502 assert(wbPkt
->cmd
== MemCmd::WritebackDirty
);
503 // Set BLOCK_CACHED flag in Writeback and send below, so that
504 // the Writeback does not reset the bit corresponding to this
505 // address in the snoop filter below.
506 wbPkt
->setBlockCached();
507 allocateWriteBuffer(wbPkt
, forward_time
);
510 // If the block is not cached above, send packet below. Both
511 // CleanEvict and Writeback with BLOCK_CACHED flag cleared will
512 // reset the bit corresponding to this address in the snoop filter
514 allocateWriteBuffer(wbPkt
, forward_time
);
516 writebacks
.pop_front();
521 Cache::doWritebacksAtomic(PacketList
& writebacks
)
523 while (!writebacks
.empty()) {
524 PacketPtr wbPkt
= writebacks
.front();
525 // Call isCachedAbove for both Writebacks and CleanEvicts. If
526 // isCachedAbove returns true we set BLOCK_CACHED flag in Writebacks
527 // and discard CleanEvicts.
528 if (isCachedAbove(wbPkt
, false)) {
529 if (wbPkt
->cmd
== MemCmd::WritebackDirty
) {
530 // Set BLOCK_CACHED flag in Writeback and send below,
531 // so that the Writeback does not reset the bit
532 // corresponding to this address in the snoop filter
533 // below. We can discard CleanEvicts because cached
534 // copies exist above. Atomic mode isCachedAbove
535 // modifies packet to set BLOCK_CACHED flag
536 memSidePort
->sendAtomic(wbPkt
);
539 // If the block is not cached above, send packet below. Both
540 // CleanEvict and Writeback with BLOCK_CACHED flag cleared will
541 // reset the bit corresponding to this address in the snoop filter
543 memSidePort
->sendAtomic(wbPkt
);
545 writebacks
.pop_front();
546 // In case of CleanEvicts, the packet destructor will delete the
547 // request object because this is a non-snoop request packet which
548 // does not require a response.
555 Cache::recvTimingSnoopResp(PacketPtr pkt
)
557 DPRINTF(Cache
, "%s for %s addr %#llx size %d\n", __func__
,
558 pkt
->cmdString(), pkt
->getAddr(), pkt
->getSize());
560 assert(pkt
->isResponse());
561 assert(!system
->bypassCaches());
563 // determine if the response is from a snoop request we created
564 // (in which case it should be in the outstandingSnoop), or if we
565 // merely forwarded someone else's snoop request
566 const bool forwardAsSnoop
= outstandingSnoop
.find(pkt
->req
) ==
567 outstandingSnoop
.end();
569 if (!forwardAsSnoop
) {
570 // the packet came from this cache, so sink it here and do not
572 assert(pkt
->cmd
== MemCmd::HardPFResp
);
574 outstandingSnoop
.erase(pkt
->req
);
576 DPRINTF(Cache
, "Got prefetch response from above for addr "
577 "%#llx (%s)\n", pkt
->getAddr(), pkt
->isSecure() ? "s" : "ns");
582 // forwardLatency is set here because there is a response from an
583 // upper level cache.
584 // To pay the delay that occurs if the packet comes from the bus,
585 // we charge also headerDelay.
586 Tick snoop_resp_time
= clockEdge(forwardLatency
) + pkt
->headerDelay
;
587 // Reset the timing of the packet.
588 pkt
->headerDelay
= pkt
->payloadDelay
= 0;
589 memSidePort
->schedTimingSnoopResp(pkt
, snoop_resp_time
);
593 Cache::promoteWholeLineWrites(PacketPtr pkt
)
595 // Cache line clearing instructions
596 if (doFastWrites
&& (pkt
->cmd
== MemCmd::WriteReq
) &&
597 (pkt
->getSize() == blkSize
) && (pkt
->getOffset(blkSize
) == 0)) {
598 pkt
->cmd
= MemCmd::WriteLineReq
;
599 DPRINTF(Cache
, "packet promoted from Write to WriteLineReq\n");
604 Cache::recvTimingReq(PacketPtr pkt
)
606 DPRINTF(CacheTags
, "%s tags: %s\n", __func__
, tags
->print());
608 assert(pkt
->isRequest());
610 // Just forward the packet if caches are disabled.
611 if (system
->bypassCaches()) {
612 // @todo This should really enqueue the packet rather
613 bool M5_VAR_USED success
= memSidePort
->sendTimingReq(pkt
);
618 promoteWholeLineWrites(pkt
);
620 if (pkt
->cacheResponding()) {
621 // a cache above us (but not where the packet came from) is
622 // responding to the request, in other words it has the line
623 // in Modified or Owned state
624 DPRINTF(Cache
, "Cache above responding to %#llx (%s): "
626 pkt
->getAddr(), pkt
->isSecure() ? "s" : "ns");
628 // if the packet needs the block to be writable, and the cache
629 // that has promised to respond (setting the cache responding
630 // flag) is not providing writable (it is in Owned rather than
631 // the Modified state), we know that there may be other Shared
632 // copies in the system; go out and invalidate them all
633 if (pkt
->needsWritable() && !pkt
->responderHadWritable()) {
634 // an upstream cache that had the line in Owned state
635 // (dirty, but not writable), is responding and thus
636 // transferring the dirty line from one branch of the
637 // cache hierarchy to another
639 // send out an express snoop and invalidate all other
640 // copies (snooping a packet that needs writable is the
641 // same as an invalidation), thus turning the Owned line
642 // into a Modified line, note that we don't invalidate the
643 // block in the current cache or any other cache on the
646 // create a downstream express snoop with cleared packet
647 // flags, there is no need to allocate any data as the
648 // packet is merely used to co-ordinate state transitions
649 Packet
*snoop_pkt
= new Packet(pkt
, true, false);
651 // also reset the bus time that the original packet has
653 snoop_pkt
->headerDelay
= snoop_pkt
->payloadDelay
= 0;
655 // make this an instantaneous express snoop, and let the
656 // other caches in the system know that the another cache
657 // is responding, because we have found the authorative
658 // copy (Modified or Owned) that will supply the right
660 snoop_pkt
->setExpressSnoop();
661 snoop_pkt
->setCacheResponding();
663 // this express snoop travels towards the memory, and at
664 // every crossbar it is snooped upwards thus reaching
665 // every cache in the system
666 bool M5_VAR_USED success
= memSidePort
->sendTimingReq(snoop_pkt
);
667 // express snoops always succeed
670 // main memory will delete the snoop packet
673 // queue for deletion, as opposed to immediate deletion, as
674 // the sending cache is still relying on the packet
675 pendingDelete
.reset(pkt
);
677 // no need to take any action in this particular cache as an
678 // upstream cache has already committed to responding, and
679 // either the packet does not need writable (and we can let
680 // the cache that set the cache responding flag pass on the
681 // line without any need for intervention), or if the packet
682 // needs writable it is provided, or we have already sent out
683 // any express snoops in the section above
687 // anything that is merely forwarded pays for the forward latency and
688 // the delay provided by the crossbar
689 Tick forward_time
= clockEdge(forwardLatency
) + pkt
->headerDelay
;
691 // We use lookupLatency here because it is used to specify the latency
693 Cycles lat
= lookupLatency
;
694 CacheBlk
*blk
= NULL
;
695 bool satisfied
= false;
697 PacketList writebacks
;
698 // Note that lat is passed by reference here. The function
699 // access() calls accessBlock() which can modify lat value.
700 satisfied
= access(pkt
, blk
, lat
, writebacks
);
702 // copy writebacks to write buffer here to ensure they logically
703 // proceed anything happening below
704 doWritebacks(writebacks
, forward_time
);
707 // Here we charge the headerDelay that takes into account the latencies
708 // of the bus, if the packet comes from it.
709 // The latency charged it is just lat that is the value of lookupLatency
710 // modified by access() function, or if not just lookupLatency.
711 // In case of a hit we are neglecting response latency.
712 // In case of a miss we are neglecting forward latency.
713 Tick request_time
= clockEdge(lat
) + pkt
->headerDelay
;
714 // Here we reset the timing of the packet.
715 pkt
->headerDelay
= pkt
->payloadDelay
= 0;
717 // track time of availability of next prefetch, if any
718 Tick next_pf_time
= MaxTick
;
720 bool needsResponse
= pkt
->needsResponse();
723 // should never be satisfying an uncacheable access as we
724 // flush and invalidate any existing block as part of the
726 assert(!pkt
->req
->isUncacheable());
728 // hit (for all other request types)
730 if (prefetcher
&& (prefetchOnAccess
|| (blk
&& blk
->wasPrefetched()))) {
732 blk
->status
&= ~BlkHWPrefetched
;
734 // Don't notify on SWPrefetch
735 if (!pkt
->cmd
.isSWPrefetch())
736 next_pf_time
= prefetcher
->notify(pkt
);
740 pkt
->makeTimingResponse();
741 // @todo: Make someone pay for this
742 pkt
->headerDelay
= pkt
->payloadDelay
= 0;
744 // In this case we are considering request_time that takes
745 // into account the delay of the xbar, if any, and just
746 // lat, neglecting responseLatency, modelling hit latency
747 // just as lookupLatency or or the value of lat overriden
748 // by access(), that calls accessBlock() function.
749 cpuSidePort
->schedTimingResp(pkt
, request_time
, true);
751 DPRINTF(Cache
, "%s satisfied %s addr %#llx, no response needed\n",
752 __func__
, pkt
->cmdString(), pkt
->getAddr(),
755 // queue the packet for deletion, as the sending cache is
756 // still relying on it; if the block is found in access(),
757 // CleanEvict and Writeback messages will be deleted
759 pendingDelete
.reset(pkt
);
764 Addr blk_addr
= blockAlign(pkt
->getAddr());
766 // ignore any existing MSHR if we are dealing with an
767 // uncacheable request
768 MSHR
*mshr
= pkt
->req
->isUncacheable() ? nullptr :
769 mshrQueue
.findMatch(blk_addr
, pkt
->isSecure());
771 // Software prefetch handling:
772 // To keep the core from waiting on data it won't look at
773 // anyway, send back a response with dummy data. Miss handling
774 // will continue asynchronously. Unfortunately, the core will
775 // insist upon freeing original Packet/Request, so we have to
776 // create a new pair with a different lifecycle. Note that this
777 // processing happens before any MSHR munging on the behalf of
778 // this request because this new Request will be the one stored
779 // into the MSHRs, not the original.
780 if (pkt
->cmd
.isSWPrefetch()) {
781 assert(needsResponse
);
782 assert(pkt
->req
->hasPaddr());
783 assert(!pkt
->req
->isUncacheable());
785 // There's no reason to add a prefetch as an additional target
786 // to an existing MSHR. If an outstanding request is already
787 // in progress, there is nothing for the prefetch to do.
788 // If this is the case, we don't even create a request at all.
789 PacketPtr pf
= nullptr;
792 // copy the request and create a new SoftPFReq packet
793 RequestPtr req
= new Request(pkt
->req
->getPaddr(),
795 pkt
->req
->getFlags(),
796 pkt
->req
->masterId());
797 pf
= new Packet(req
, pkt
->cmd
);
799 assert(pf
->getAddr() == pkt
->getAddr());
800 assert(pf
->getSize() == pkt
->getSize());
803 pkt
->makeTimingResponse();
805 // request_time is used here, taking into account lat and the delay
806 // charged if the packet comes from the xbar.
807 cpuSidePort
->schedTimingResp(pkt
, request_time
, true);
809 // If an outstanding request is in progress (we found an
810 // MSHR) this is set to null
816 /// @note writebacks will be checked in getNextMSHR()
817 /// for any conflicting requests to the same block
819 //@todo remove hw_pf here
821 // Coalesce unless it was a software prefetch (see above).
823 assert(!pkt
->isWriteback());
824 // CleanEvicts corresponding to blocks which have
825 // outstanding requests in MSHRs are simply sunk here
826 if (pkt
->cmd
== MemCmd::CleanEvict
) {
827 pendingDelete
.reset(pkt
);
829 DPRINTF(Cache
, "%s coalescing MSHR for %s addr %#llx size %d\n",
830 __func__
, pkt
->cmdString(), pkt
->getAddr(),
833 assert(pkt
->req
->masterId() < system
->maxMasters());
834 mshr_hits
[pkt
->cmdToIndex()][pkt
->req
->masterId()]++;
835 // We use forward_time here because it is the same
836 // considering new targets. We have multiple
837 // requests for the same address here. It
838 // specifies the latency to allocate an internal
839 // buffer and to schedule an event to the queued
840 // port and also takes into account the additional
841 // delay of the xbar.
842 mshr
->allocateTarget(pkt
, forward_time
, order
++,
843 allocOnFill(pkt
->cmd
));
844 if (mshr
->getNumTargets() == numTarget
) {
846 setBlocked(Blocked_NoTargets
);
847 // need to be careful with this... if this mshr isn't
848 // ready yet (i.e. time > curTick()), we don't want to
849 // move it ahead of mshrs that are ready
850 // mshrQueue.moveToFront(mshr);
853 // We should call the prefetcher reguardless if the request is
854 // satisfied or not, reguardless if the request is in the MSHR or
855 // not. The request could be a ReadReq hit, but still not
856 // satisfied (potentially because of a prior write to the same
857 // cache line. So, even when not satisfied, tehre is an MSHR
858 // already allocated for this, we need to let the prefetcher know
861 // Don't notify on SWPrefetch
862 if (!pkt
->cmd
.isSWPrefetch())
863 next_pf_time
= prefetcher
->notify(pkt
);
868 assert(pkt
->req
->masterId() < system
->maxMasters());
869 if (pkt
->req
->isUncacheable()) {
870 mshr_uncacheable
[pkt
->cmdToIndex()][pkt
->req
->masterId()]++;
872 mshr_misses
[pkt
->cmdToIndex()][pkt
->req
->masterId()]++;
875 if (pkt
->isEviction() ||
876 (pkt
->req
->isUncacheable() && pkt
->isWrite())) {
877 // We use forward_time here because there is an
878 // uncached memory write, forwarded to WriteBuffer.
879 allocateWriteBuffer(pkt
, forward_time
);
881 if (blk
&& blk
->isValid()) {
882 // should have flushed and have no valid block
883 assert(!pkt
->req
->isUncacheable());
885 // If we have a write miss to a valid block, we
886 // need to mark the block non-readable. Otherwise
887 // if we allow reads while there's an outstanding
888 // write miss, the read could return stale data
889 // out of the cache block... a more aggressive
890 // system could detect the overlap (if any) and
891 // forward data out of the MSHRs, but we don't do
892 // that yet. Note that we do need to leave the
893 // block valid so that it stays in the cache, in
894 // case we get an upgrade response (and hence no
895 // new data) when the write miss completes.
896 // As long as CPUs do proper store/load forwarding
897 // internally, and have a sufficiently weak memory
898 // model, this is probably unnecessary, but at some
899 // point it must have seemed like we needed it...
900 assert(pkt
->needsWritable());
901 assert(!blk
->isWritable());
902 blk
->status
&= ~BlkReadable
;
904 // Here we are using forward_time, modelling the latency of
905 // a miss (outbound) just as forwardLatency, neglecting the
906 // lookupLatency component.
907 allocateMissBuffer(pkt
, forward_time
);
911 // Don't notify on SWPrefetch
912 if (!pkt
->cmd
.isSWPrefetch())
913 next_pf_time
= prefetcher
->notify(pkt
);
918 if (next_pf_time
!= MaxTick
)
919 schedMemSideSendEvent(next_pf_time
);
925 // See comment in cache.hh.
927 Cache::getBusPacket(PacketPtr cpu_pkt
, CacheBlk
*blk
,
928 bool needsWritable
) const
930 bool blkValid
= blk
&& blk
->isValid();
932 if (cpu_pkt
->req
->isUncacheable()) {
933 // note that at the point we see the uncacheable request we
934 // flush any block, but there could be an outstanding MSHR,
935 // and the cache could have filled again before we actually
936 // send out the forwarded uncacheable request (blk could thus
942 (cpu_pkt
->isUpgrade() ||
943 cpu_pkt
->isEviction())) {
944 // Writebacks that weren't allocated in access() and upgrades
945 // from upper-level caches that missed completely just go
950 assert(cpu_pkt
->needsResponse());
953 // @TODO make useUpgrades a parameter.
954 // Note that ownership protocols require upgrade, otherwise a
955 // write miss on a shared owned block will generate a ReadExcl,
956 // which will clobber the owned copy.
957 const bool useUpgrades
= true;
958 if (blkValid
&& useUpgrades
) {
959 // only reason to be here is that blk is read only and we need
961 assert(needsWritable
);
962 assert(!blk
->isWritable());
963 cmd
= cpu_pkt
->isLLSC() ? MemCmd::SCUpgradeReq
: MemCmd::UpgradeReq
;
964 } else if (cpu_pkt
->cmd
== MemCmd::SCUpgradeFailReq
||
965 cpu_pkt
->cmd
== MemCmd::StoreCondFailReq
) {
966 // Even though this SC will fail, we still need to send out the
967 // request and get the data to supply it to other snoopers in the case
968 // where the determination the StoreCond fails is delayed due to
969 // all caches not being on the same local bus.
970 cmd
= MemCmd::SCUpgradeFailReq
;
971 } else if (cpu_pkt
->cmd
== MemCmd::WriteLineReq
) {
972 // forward as invalidate to all other caches, this gives us
973 // the line in Exclusive state, and invalidates all other
975 cmd
= MemCmd::InvalidateReq
;
978 cmd
= needsWritable
? MemCmd::ReadExReq
:
979 (isReadOnly
? MemCmd::ReadCleanReq
: MemCmd::ReadSharedReq
);
981 PacketPtr pkt
= new Packet(cpu_pkt
->req
, cmd
, blkSize
);
983 // if there are upstream caches that have already marked the
984 // packet as having sharers (not passing writable), pass that info
986 if (cpu_pkt
->hasSharers()) {
987 // note that cpu_pkt may have spent a considerable time in the
988 // MSHR queue and that the information could possibly be out
989 // of date, however, there is no harm in conservatively
990 // assuming the block has sharers
991 pkt
->setHasSharers();
992 DPRINTF(Cache
, "%s passing hasSharers from %s to %s addr %#llx "
994 __func__
, cpu_pkt
->cmdString(), pkt
->cmdString(),
995 pkt
->getAddr(), pkt
->getSize());
998 // the packet should be block aligned
999 assert(pkt
->getAddr() == blockAlign(pkt
->getAddr()));
1002 DPRINTF(Cache
, "%s created %s from %s for addr %#llx size %d\n",
1003 __func__
, pkt
->cmdString(), cpu_pkt
->cmdString(), pkt
->getAddr(),
1010 Cache::recvAtomic(PacketPtr pkt
)
1012 // We are in atomic mode so we pay just for lookupLatency here.
1013 Cycles lat
= lookupLatency
;
1014 // @TODO: make this a parameter
1015 bool last_level_cache
= false;
1017 // Forward the request if the system is in cache bypass mode.
1018 if (system
->bypassCaches())
1019 return ticksToCycles(memSidePort
->sendAtomic(pkt
));
1021 promoteWholeLineWrites(pkt
);
1023 if (pkt
->cacheResponding()) {
1024 // have to invalidate ourselves and any lower caches even if
1025 // upper cache will be responding
1026 if (pkt
->isInvalidate()) {
1027 CacheBlk
*blk
= tags
->findBlock(pkt
->getAddr(), pkt
->isSecure());
1028 if (blk
&& blk
->isValid()) {
1029 tags
->invalidate(blk
);
1031 DPRINTF(Cache
, "Other cache responding to %s on %#llx (%s):"
1033 pkt
->cmdString(), pkt
->getAddr(),
1034 pkt
->isSecure() ? "s" : "ns");
1036 if (!last_level_cache
) {
1037 DPRINTF(Cache
, "Other cache responding to %s on %#llx (%s):"
1039 pkt
->cmdString(), pkt
->getAddr(),
1040 pkt
->isSecure() ? "s" : "ns");
1041 lat
+= ticksToCycles(memSidePort
->sendAtomic(pkt
));
1044 DPRINTF(Cache
, "Other cache responding to %s on %#llx: "
1046 pkt
->cmdString(), pkt
->getAddr());
1049 return lat
* clockPeriod();
1052 // should assert here that there are no outstanding MSHRs or
1053 // writebacks... that would mean that someone used an atomic
1054 // access in timing mode
1056 CacheBlk
*blk
= NULL
;
1057 PacketList writebacks
;
1058 bool satisfied
= access(pkt
, blk
, lat
, writebacks
);
1060 // handle writebacks resulting from the access here to ensure they
1061 // logically proceed anything happening below
1062 doWritebacksAtomic(writebacks
);
1067 PacketPtr bus_pkt
= getBusPacket(pkt
, blk
, pkt
->needsWritable());
1069 bool is_forward
= (bus_pkt
== NULL
);
1072 // just forwarding the same request to the next level
1073 // no local cache operation involved
1077 DPRINTF(Cache
, "Sending an atomic %s for %#llx (%s)\n",
1078 bus_pkt
->cmdString(), bus_pkt
->getAddr(),
1079 bus_pkt
->isSecure() ? "s" : "ns");
1082 CacheBlk::State old_state
= blk
? blk
->status
: 0;
1085 lat
+= ticksToCycles(memSidePort
->sendAtomic(bus_pkt
));
1087 // We are now dealing with the response handling
1088 DPRINTF(Cache
, "Receive response: %s for addr %#llx (%s) in state %i\n",
1089 bus_pkt
->cmdString(), bus_pkt
->getAddr(),
1090 bus_pkt
->isSecure() ? "s" : "ns",
1093 // If packet was a forward, the response (if any) is already
1094 // in place in the bus_pkt == pkt structure, so we don't need
1095 // to do anything. Otherwise, use the separate bus_pkt to
1096 // generate response to pkt and then delete it.
1098 if (pkt
->needsResponse()) {
1099 assert(bus_pkt
->isResponse());
1100 if (bus_pkt
->isError()) {
1101 pkt
->makeAtomicResponse();
1102 pkt
->copyError(bus_pkt
);
1103 } else if (pkt
->cmd
== MemCmd::InvalidateReq
) {
1105 // invalidate response to a cache that received
1106 // an invalidate request
1107 satisfyCpuSideRequest(pkt
, blk
);
1109 } else if (pkt
->cmd
== MemCmd::WriteLineReq
) {
1110 // note the use of pkt, not bus_pkt here.
1112 // write-line request to the cache that promoted
1113 // the write to a whole line
1114 blk
= handleFill(pkt
, blk
, writebacks
,
1115 allocOnFill(pkt
->cmd
));
1116 satisfyCpuSideRequest(pkt
, blk
);
1117 } else if (bus_pkt
->isRead() ||
1118 bus_pkt
->cmd
== MemCmd::UpgradeResp
) {
1119 // we're updating cache state to allow us to
1120 // satisfy the upstream request from the cache
1121 blk
= handleFill(bus_pkt
, blk
, writebacks
,
1122 allocOnFill(pkt
->cmd
));
1123 satisfyCpuSideRequest(pkt
, blk
);
1125 // we're satisfying the upstream request without
1126 // modifying cache state, e.g., a write-through
1127 pkt
->makeAtomicResponse();
1134 // Note that we don't invoke the prefetcher at all in atomic mode.
1135 // It's not clear how to do it properly, particularly for
1136 // prefetchers that aggressively generate prefetch candidates and
1137 // rely on bandwidth contention to throttle them; these will tend
1138 // to pollute the cache in atomic mode since there is no bandwidth
1139 // contention. If we ever do want to enable prefetching in atomic
1140 // mode, though, this is the place to do it... see timingAccess()
1141 // for an example (though we'd want to issue the prefetch(es)
1142 // immediately rather than calling requestMemSideBus() as we do
1145 // do any writebacks resulting from the response handling
1146 doWritebacksAtomic(writebacks
);
1148 // if we used temp block, check to see if its valid and if so
1149 // clear it out, but only do so after the call to recvAtomic is
1150 // finished so that any downstream observers (such as a snoop
1151 // filter), first see the fill, and only then see the eviction
1152 if (blk
== tempBlock
&& tempBlock
->isValid()) {
1153 // the atomic CPU calls recvAtomic for fetch and load/store
1154 // sequentuially, and we may already have a tempBlock
1155 // writeback from the fetch that we have not yet sent
1156 if (tempBlockWriteback
) {
1157 // if that is the case, write the prevoius one back, and
1158 // do not schedule any new event
1159 writebackTempBlockAtomic();
1161 // the writeback/clean eviction happens after the call to
1162 // recvAtomic has finished (but before any successive
1163 // calls), so that the response handling from the fill is
1164 // allowed to happen first
1165 schedule(writebackTempBlockAtomicEvent
, curTick());
1168 tempBlockWriteback
= (blk
->isDirty() || writebackClean
) ?
1169 writebackBlk(blk
) : cleanEvictBlk(blk
);
1173 if (pkt
->needsResponse()) {
1174 pkt
->makeAtomicResponse();
1177 return lat
* clockPeriod();
1182 Cache::functionalAccess(PacketPtr pkt
, bool fromCpuSide
)
1184 if (system
->bypassCaches()) {
1185 // Packets from the memory side are snoop request and
1186 // shouldn't happen in bypass mode.
1187 assert(fromCpuSide
);
1189 // The cache should be flushed if we are in cache bypass mode,
1190 // so we don't need to check if we need to update anything.
1191 memSidePort
->sendFunctional(pkt
);
1195 Addr blk_addr
= blockAlign(pkt
->getAddr());
1196 bool is_secure
= pkt
->isSecure();
1197 CacheBlk
*blk
= tags
->findBlock(pkt
->getAddr(), is_secure
);
1198 MSHR
*mshr
= mshrQueue
.findMatch(blk_addr
, is_secure
);
1200 pkt
->pushLabel(name());
1202 CacheBlkPrintWrapper
cbpw(blk
);
1204 // Note that just because an L2/L3 has valid data doesn't mean an
1205 // L1 doesn't have a more up-to-date modified copy that still
1206 // needs to be found. As a result we always update the request if
1207 // we have it, but only declare it satisfied if we are the owner.
1209 // see if we have data at all (owned or otherwise)
1210 bool have_data
= blk
&& blk
->isValid()
1211 && pkt
->checkFunctional(&cbpw
, blk_addr
, is_secure
, blkSize
,
1214 // data we have is dirty if marked as such or if we have an
1215 // in-service MSHR that is pending a modified line
1217 have_data
&& (blk
->isDirty() ||
1218 (mshr
&& mshr
->inService
&& mshr
->isPendingModified()));
1220 bool done
= have_dirty
1221 || cpuSidePort
->checkFunctional(pkt
)
1222 || mshrQueue
.checkFunctional(pkt
, blk_addr
)
1223 || writeBuffer
.checkFunctional(pkt
, blk_addr
)
1224 || memSidePort
->checkFunctional(pkt
);
1226 DPRINTF(CacheVerbose
, "functional %s %#llx (%s) %s%s%s\n",
1227 pkt
->cmdString(), pkt
->getAddr(), is_secure
? "s" : "ns",
1228 (blk
&& blk
->isValid()) ? "valid " : "",
1229 have_data
? "data " : "", done
? "done " : "");
1231 // We're leaving the cache, so pop cache->name() label
1235 pkt
->makeResponse();
1237 // if it came as a request from the CPU side then make sure it
1238 // continues towards the memory side
1240 memSidePort
->sendFunctional(pkt
);
1241 } else if (forwardSnoops
&& cpuSidePort
->isSnooping()) {
1242 // if it came from the memory side, it must be a snoop request
1243 // and we should only forward it if we are forwarding snoops
1244 cpuSidePort
->sendFunctionalSnoop(pkt
);
1250 /////////////////////////////////////////////////////
1252 // Response handling: responses from the memory side
1254 /////////////////////////////////////////////////////
1258 Cache::recvTimingResp(PacketPtr pkt
)
1260 assert(pkt
->isResponse());
1262 // all header delay should be paid for by the crossbar, unless
1263 // this is a prefetch response from above
1264 panic_if(pkt
->headerDelay
!= 0 && pkt
->cmd
!= MemCmd::HardPFResp
,
1265 "%s saw a non-zero packet delay\n", name());
1267 MSHR
*mshr
= dynamic_cast<MSHR
*>(pkt
->senderState
);
1268 bool is_error
= pkt
->isError();
1273 DPRINTF(Cache
, "Cache received packet with error for addr %#llx (%s), "
1274 "cmd: %s\n", pkt
->getAddr(), pkt
->isSecure() ? "s" : "ns",
1278 DPRINTF(Cache
, "Handling response %s for addr %#llx size %d (%s)\n",
1279 pkt
->cmdString(), pkt
->getAddr(), pkt
->getSize(),
1280 pkt
->isSecure() ? "s" : "ns");
1282 MSHRQueue
*mq
= mshr
->queue
;
1283 bool wasFull
= mq
->isFull();
1285 if (mshr
== noTargetMSHR
) {
1286 // we always clear at least one target
1287 clearBlocked(Blocked_NoTargets
);
1288 noTargetMSHR
= NULL
;
1291 // Initial target is used just for stats
1292 MSHR::Target
*initial_tgt
= mshr
->getTarget();
1293 int stats_cmd_idx
= initial_tgt
->pkt
->cmdToIndex();
1294 Tick miss_latency
= curTick() - initial_tgt
->recvTime
;
1295 PacketList writebacks
;
1296 // We need forward_time here because we have a call of
1297 // allocateWriteBuffer() that need this parameter to specify the
1298 // time to request the bus. In this case we use forward latency
1299 // because there is a writeback. We pay also here for headerDelay
1300 // that is charged of bus latencies if the packet comes from the
1302 Tick forward_time
= clockEdge(forwardLatency
) + pkt
->headerDelay
;
1304 if (pkt
->req
->isUncacheable()) {
1305 assert(pkt
->req
->masterId() < system
->maxMasters());
1306 mshr_uncacheable_lat
[stats_cmd_idx
][pkt
->req
->masterId()] +=
1309 assert(pkt
->req
->masterId() < system
->maxMasters());
1310 mshr_miss_latency
[stats_cmd_idx
][pkt
->req
->masterId()] +=
1314 // upgrade deferred targets if the response has no sharers, and is
1315 // thus passing writable
1316 if (!pkt
->hasSharers()) {
1317 mshr
->promoteWritable();
1320 bool is_fill
= !mshr
->isForward
&&
1321 (pkt
->isRead() || pkt
->cmd
== MemCmd::UpgradeResp
);
1323 CacheBlk
*blk
= tags
->findBlock(pkt
->getAddr(), pkt
->isSecure());
1325 if (is_fill
&& !is_error
) {
1326 DPRINTF(Cache
, "Block for addr %#llx being updated in Cache\n",
1329 blk
= handleFill(pkt
, blk
, writebacks
, mshr
->allocOnFill
);
1330 assert(blk
!= NULL
);
1333 // allow invalidation responses originating from write-line
1334 // requests to be discarded
1335 bool is_invalidate
= pkt
->isInvalidate();
1337 // First offset for critical word first calculations
1338 int initial_offset
= initial_tgt
->pkt
->getOffset(blkSize
);
1340 while (mshr
->hasTargets()) {
1341 MSHR::Target
*target
= mshr
->getTarget();
1342 Packet
*tgt_pkt
= target
->pkt
;
1344 switch (target
->source
) {
1345 case MSHR::Target::FromCPU
:
1346 Tick completion_time
;
1347 // Here we charge on completion_time the delay of the xbar if the
1348 // packet comes from it, charged on headerDelay.
1349 completion_time
= pkt
->headerDelay
;
1351 // Software prefetch handling for cache closest to core
1352 if (tgt_pkt
->cmd
.isSWPrefetch()) {
1353 // a software prefetch would have already been ack'd immediately
1354 // with dummy data so the core would be able to retire it.
1355 // this request completes right here, so we deallocate it.
1356 delete tgt_pkt
->req
;
1358 break; // skip response
1361 // unlike the other packet flows, where data is found in other
1362 // caches or memory and brought back, write-line requests always
1363 // have the data right away, so the above check for "is fill?"
1364 // cannot actually be determined until examining the stored MSHR
1365 // state. We "catch up" with that logic here, which is duplicated
1367 if (tgt_pkt
->cmd
== MemCmd::WriteLineReq
) {
1369 // we got the block in a writable state, so promote
1370 // any deferred targets if possible
1371 mshr
->promoteWritable();
1372 // NB: we use the original packet here and not the response!
1373 blk
= handleFill(tgt_pkt
, blk
, writebacks
, mshr
->allocOnFill
);
1374 assert(blk
!= NULL
);
1376 // treat as a fill, and discard the invalidation
1379 is_invalidate
= false;
1383 satisfyCpuSideRequest(tgt_pkt
, blk
,
1384 true, mshr
->hasPostDowngrade());
1386 // How many bytes past the first request is this one
1387 int transfer_offset
=
1388 tgt_pkt
->getOffset(blkSize
) - initial_offset
;
1389 if (transfer_offset
< 0) {
1390 transfer_offset
+= blkSize
;
1393 // If not critical word (offset) return payloadDelay.
1394 // responseLatency is the latency of the return path
1395 // from lower level caches/memory to an upper level cache or
1397 completion_time
+= clockEdge(responseLatency
) +
1398 (transfer_offset
? pkt
->payloadDelay
: 0);
1400 assert(!tgt_pkt
->req
->isUncacheable());
1402 assert(tgt_pkt
->req
->masterId() < system
->maxMasters());
1403 missLatency
[tgt_pkt
->cmdToIndex()][tgt_pkt
->req
->masterId()] +=
1404 completion_time
- target
->recvTime
;
1405 } else if (pkt
->cmd
== MemCmd::UpgradeFailResp
) {
1406 // failed StoreCond upgrade
1407 assert(tgt_pkt
->cmd
== MemCmd::StoreCondReq
||
1408 tgt_pkt
->cmd
== MemCmd::StoreCondFailReq
||
1409 tgt_pkt
->cmd
== MemCmd::SCUpgradeFailReq
);
1410 // responseLatency is the latency of the return path
1411 // from lower level caches/memory to an upper level cache or
1413 completion_time
+= clockEdge(responseLatency
) +
1415 tgt_pkt
->req
->setExtraData(0);
1417 // not a cache fill, just forwarding response
1418 // responseLatency is the latency of the return path
1419 // from lower level cahces/memory to the core.
1420 completion_time
+= clockEdge(responseLatency
) +
1422 if (pkt
->isRead() && !is_error
) {
1424 assert(pkt
->getAddr() == tgt_pkt
->getAddr());
1425 assert(pkt
->getSize() >= tgt_pkt
->getSize());
1427 tgt_pkt
->setData(pkt
->getConstPtr
<uint8_t>());
1430 tgt_pkt
->makeTimingResponse();
1431 // if this packet is an error copy that to the new packet
1433 tgt_pkt
->copyError(pkt
);
1434 if (tgt_pkt
->cmd
== MemCmd::ReadResp
&&
1435 (is_invalidate
|| mshr
->hasPostInvalidate())) {
1436 // If intermediate cache got ReadRespWithInvalidate,
1437 // propagate that. Response should not have
1438 // isInvalidate() set otherwise.
1439 tgt_pkt
->cmd
= MemCmd::ReadRespWithInvalidate
;
1440 DPRINTF(Cache
, "%s updated cmd to %s for addr %#llx\n",
1441 __func__
, tgt_pkt
->cmdString(), tgt_pkt
->getAddr());
1443 // Reset the bus additional time as it is now accounted for
1444 tgt_pkt
->headerDelay
= tgt_pkt
->payloadDelay
= 0;
1445 cpuSidePort
->schedTimingResp(tgt_pkt
, completion_time
, true);
1448 case MSHR::Target::FromPrefetcher
:
1449 assert(tgt_pkt
->cmd
== MemCmd::HardPFReq
);
1451 blk
->status
|= BlkHWPrefetched
;
1452 delete tgt_pkt
->req
;
1456 case MSHR::Target::FromSnoop
:
1457 // I don't believe that a snoop can be in an error state
1459 // response to snoop request
1460 DPRINTF(Cache
, "processing deferred snoop...\n");
1461 assert(!(is_invalidate
&& !mshr
->hasPostInvalidate()));
1462 handleSnoop(tgt_pkt
, blk
, true, true, mshr
->hasPostInvalidate());
1466 panic("Illegal target->source enum %d\n", target
->source
);
1472 if (blk
&& blk
->isValid()) {
1473 // an invalidate response stemming from a write line request
1474 // should not invalidate the block, so check if the
1475 // invalidation should be discarded
1476 if (is_invalidate
|| mshr
->hasPostInvalidate()) {
1477 invalidateBlock(blk
);
1478 } else if (mshr
->hasPostDowngrade()) {
1479 blk
->status
&= ~BlkWritable
;
1483 if (mshr
->promoteDeferredTargets()) {
1484 // avoid later read getting stale data while write miss is
1485 // outstanding.. see comment in timingAccess()
1487 blk
->status
&= ~BlkReadable
;
1490 mq
->markPending(mshr
);
1491 schedMemSideSendEvent(clockEdge() + pkt
->payloadDelay
);
1493 mq
->deallocate(mshr
);
1494 if (wasFull
&& !mq
->isFull()) {
1495 clearBlocked((BlockedCause
)mq
->index
);
1498 // Request the bus for a prefetch if this deallocation freed enough
1499 // MSHRs for a prefetch to take place
1500 if (prefetcher
&& mq
== &mshrQueue
&& mshrQueue
.canPrefetch()) {
1501 Tick next_pf_time
= std::max(prefetcher
->nextPrefetchReadyTime(),
1503 if (next_pf_time
!= MaxTick
)
1504 schedMemSideSendEvent(next_pf_time
);
1507 // reset the xbar additional timinig as it is now accounted for
1508 pkt
->headerDelay
= pkt
->payloadDelay
= 0;
1510 // copy writebacks to write buffer
1511 doWritebacks(writebacks
, forward_time
);
1513 // if we used temp block, check to see if its valid and then clear it out
1514 if (blk
== tempBlock
&& tempBlock
->isValid()) {
1515 // We use forwardLatency here because we are copying
1516 // Writebacks/CleanEvicts to write buffer. It specifies the latency to
1517 // allocate an internal buffer and to schedule an event to the
1519 if (blk
->isDirty() || writebackClean
) {
1520 PacketPtr wbPkt
= writebackBlk(blk
);
1521 allocateWriteBuffer(wbPkt
, forward_time
);
1522 // Set BLOCK_CACHED flag if cached above.
1523 if (isCachedAbove(wbPkt
))
1524 wbPkt
->setBlockCached();
1526 PacketPtr wcPkt
= cleanEvictBlk(blk
);
1527 // Check to see if block is cached above. If not allocate
1529 if (isCachedAbove(wcPkt
))
1532 allocateWriteBuffer(wcPkt
, forward_time
);
1537 DPRINTF(CacheVerbose
, "Leaving %s with %s for addr %#llx\n", __func__
,
1538 pkt
->cmdString(), pkt
->getAddr());
1543 Cache::writebackBlk(CacheBlk
*blk
)
1545 chatty_assert(!isReadOnly
|| writebackClean
,
1546 "Writeback from read-only cache");
1547 assert(blk
&& blk
->isValid() && (blk
->isDirty() || writebackClean
));
1549 writebacks
[Request::wbMasterId
]++;
1551 Request
*req
= new Request(tags
->regenerateBlkAddr(blk
->tag
, blk
->set
),
1552 blkSize
, 0, Request::wbMasterId
);
1553 if (blk
->isSecure())
1554 req
->setFlags(Request::SECURE
);
1556 req
->taskId(blk
->task_id
);
1557 blk
->task_id
= ContextSwitchTaskId::Unknown
;
1558 blk
->tickInserted
= curTick();
1561 new Packet(req
, blk
->isDirty() ?
1562 MemCmd::WritebackDirty
: MemCmd::WritebackClean
);
1564 DPRINTF(Cache
, "Create Writeback %#llx writable: %d, dirty: %d\n",
1565 pkt
->getAddr(), blk
->isWritable(), blk
->isDirty());
1567 if (blk
->isWritable()) {
1568 // not asserting shared means we pass the block in modified
1569 // state, mark our own block non-writeable
1570 blk
->status
&= ~BlkWritable
;
1572 // we are in the Owned state, tell the receiver
1573 pkt
->setHasSharers();
1576 // make sure the block is not marked dirty
1577 blk
->status
&= ~BlkDirty
;
1580 std::memcpy(pkt
->getPtr
<uint8_t>(), blk
->data
, blkSize
);
1586 Cache::cleanEvictBlk(CacheBlk
*blk
)
1588 assert(!writebackClean
);
1589 assert(blk
&& blk
->isValid() && !blk
->isDirty());
1590 // Creating a zero sized write, a message to the snoop filter
1592 new Request(tags
->regenerateBlkAddr(blk
->tag
, blk
->set
), blkSize
, 0,
1593 Request::wbMasterId
);
1594 if (blk
->isSecure())
1595 req
->setFlags(Request::SECURE
);
1597 req
->taskId(blk
->task_id
);
1598 blk
->task_id
= ContextSwitchTaskId::Unknown
;
1599 blk
->tickInserted
= curTick();
1601 PacketPtr pkt
= new Packet(req
, MemCmd::CleanEvict
);
1603 DPRINTF(Cache
, "%s%s %x Create CleanEvict\n", pkt
->cmdString(),
1604 pkt
->req
->isInstFetch() ? " (ifetch)" : "",
1611 Cache::memWriteback()
1613 CacheBlkVisitorWrapper
visitor(*this, &Cache::writebackVisitor
);
1614 tags
->forEachBlk(visitor
);
1618 Cache::memInvalidate()
1620 CacheBlkVisitorWrapper
visitor(*this, &Cache::invalidateVisitor
);
1621 tags
->forEachBlk(visitor
);
1625 Cache::isDirty() const
1627 CacheBlkIsDirtyVisitor visitor
;
1628 tags
->forEachBlk(visitor
);
1630 return visitor
.isDirty();
1634 Cache::writebackVisitor(CacheBlk
&blk
)
1636 if (blk
.isDirty()) {
1637 assert(blk
.isValid());
1639 Request
request(tags
->regenerateBlkAddr(blk
.tag
, blk
.set
),
1640 blkSize
, 0, Request::funcMasterId
);
1641 request
.taskId(blk
.task_id
);
1643 Packet
packet(&request
, MemCmd::WriteReq
);
1644 packet
.dataStatic(blk
.data
);
1646 memSidePort
->sendFunctional(&packet
);
1648 blk
.status
&= ~BlkDirty
;
1655 Cache::invalidateVisitor(CacheBlk
&blk
)
1659 warn_once("Invalidating dirty cache lines. Expect things to break.\n");
1661 if (blk
.isValid()) {
1662 assert(!blk
.isDirty());
1663 tags
->invalidate(&blk
);
1671 Cache::allocateBlock(Addr addr
, bool is_secure
, PacketList
&writebacks
)
1673 CacheBlk
*blk
= tags
->findVictim(addr
);
1675 // It is valid to return NULL if there is no victim
1679 if (blk
->isValid()) {
1680 Addr repl_addr
= tags
->regenerateBlkAddr(blk
->tag
, blk
->set
);
1681 MSHR
*repl_mshr
= mshrQueue
.findMatch(repl_addr
, blk
->isSecure());
1683 // must be an outstanding upgrade request
1684 // on a block we're about to replace...
1685 assert(!blk
->isWritable() || blk
->isDirty());
1686 assert(repl_mshr
->needsWritable());
1687 // too hard to replace block with transient state
1688 // allocation failed, block not inserted
1691 DPRINTF(Cache
, "replacement: replacing %#llx (%s) with %#llx (%s): %s\n",
1692 repl_addr
, blk
->isSecure() ? "s" : "ns",
1693 addr
, is_secure
? "s" : "ns",
1694 blk
->isDirty() ? "writeback" : "clean");
1696 // Will send up Writeback/CleanEvict snoops via isCachedAbove
1697 // when pushing this writeback list into the write buffer.
1698 if (blk
->isDirty() || writebackClean
) {
1699 // Save writeback packet for handling by caller
1700 writebacks
.push_back(writebackBlk(blk
));
1702 writebacks
.push_back(cleanEvictBlk(blk
));
1711 Cache::invalidateBlock(CacheBlk
*blk
)
1713 if (blk
!= tempBlock
)
1714 tags
->invalidate(blk
);
1718 // Note that the reason we return a list of writebacks rather than
1719 // inserting them directly in the write buffer is that this function
1720 // is called by both atomic and timing-mode accesses, and in atomic
1721 // mode we don't mess with the write buffer (we just perform the
1722 // writebacks atomically once the original request is complete).
1724 Cache::handleFill(PacketPtr pkt
, CacheBlk
*blk
, PacketList
&writebacks
,
1727 assert(pkt
->isResponse() || pkt
->cmd
== MemCmd::WriteLineReq
);
1728 Addr addr
= pkt
->getAddr();
1729 bool is_secure
= pkt
->isSecure();
1731 CacheBlk::State old_state
= blk
? blk
->status
: 0;
1734 // When handling a fill, discard any CleanEvicts for the
1735 // same address in write buffer.
1736 Addr M5_VAR_USED blk_addr
= blockAlign(pkt
->getAddr());
1737 std::vector
<MSHR
*> M5_VAR_USED wbs
;
1738 assert (!writeBuffer
.findMatches(blk_addr
, is_secure
, wbs
));
1741 // better have read new data...
1742 assert(pkt
->hasData());
1744 // only read responses and write-line requests have data;
1745 // note that we don't write the data here for write-line - that
1746 // happens in the subsequent satisfyCpuSideRequest.
1747 assert(pkt
->isRead() || pkt
->cmd
== MemCmd::WriteLineReq
);
1749 // need to do a replacement if allocating, otherwise we stick
1750 // with the temporary storage
1751 blk
= allocate
? allocateBlock(addr
, is_secure
, writebacks
) : NULL
;
1754 // No replaceable block or a mostly exclusive
1755 // cache... just use temporary storage to complete the
1756 // current request and then get rid of it
1757 assert(!tempBlock
->isValid());
1759 tempBlock
->set
= tags
->extractSet(addr
);
1760 tempBlock
->tag
= tags
->extractTag(addr
);
1761 // @todo: set security state as well...
1762 DPRINTF(Cache
, "using temp block for %#llx (%s)\n", addr
,
1763 is_secure
? "s" : "ns");
1765 tags
->insertBlock(pkt
, blk
);
1768 // we should never be overwriting a valid block
1769 assert(!blk
->isValid());
1771 // existing block... probably an upgrade
1772 assert(blk
->tag
== tags
->extractTag(addr
));
1773 // either we're getting new data or the block should already be valid
1774 assert(pkt
->hasData() || blk
->isValid());
1775 // don't clear block status... if block is already dirty we
1776 // don't want to lose that
1780 blk
->status
|= BlkSecure
;
1781 blk
->status
|= BlkValid
| BlkReadable
;
1783 // sanity check for whole-line writes, which should always be
1784 // marked as writable as part of the fill, and then later marked
1785 // dirty as part of satisfyCpuSideRequest
1786 if (pkt
->cmd
== MemCmd::WriteLineReq
) {
1787 assert(!pkt
->hasSharers());
1788 // at the moment other caches do not respond to the
1789 // invalidation requests corresponding to a whole-line write
1790 assert(!pkt
->cacheResponding());
1793 // here we deal with setting the appropriate state of the line,
1794 // and we start by looking at the hasSharers flag, and ignore the
1795 // cacheResponding flag (normally signalling dirty data) if the
1796 // packet has sharers, thus the line is never allocated as Owned
1797 // (dirty but not writable), and always ends up being either
1798 // Shared, Exclusive or Modified, see Packet::setCacheResponding
1800 if (!pkt
->hasSharers()) {
1801 // we could get a writable line from memory (rather than a
1802 // cache) even in a read-only cache, note that we set this bit
1803 // even for a read-only cache, possibly revisit this decision
1804 blk
->status
|= BlkWritable
;
1806 // check if we got this via cache-to-cache transfer (i.e., from a
1807 // cache that had the block in Modified or Owned state)
1808 if (pkt
->cacheResponding()) {
1809 // we got the block in Modified state, and invalidated the
1811 blk
->status
|= BlkDirty
;
1813 chatty_assert(!isReadOnly
, "Should never see dirty snoop response "
1814 "in read-only cache %s\n", name());
1818 DPRINTF(Cache
, "Block addr %#llx (%s) moving from state %x to %s\n",
1819 addr
, is_secure
? "s" : "ns", old_state
, blk
->print());
1821 // if we got new data, copy it in (checking for a read response
1822 // and a response that has data is the same in the end)
1823 if (pkt
->isRead()) {
1825 assert(pkt
->hasData());
1826 assert(pkt
->getSize() == blkSize
);
1828 std::memcpy(blk
->data
, pkt
->getConstPtr
<uint8_t>(), blkSize
);
1830 // We pay for fillLatency here.
1831 blk
->whenReady
= clockEdge() + fillLatency
* clockPeriod() +
1838 /////////////////////////////////////////////////////
1840 // Snoop path: requests coming in from the memory side
1842 /////////////////////////////////////////////////////
1845 Cache::doTimingSupplyResponse(PacketPtr req_pkt
, const uint8_t *blk_data
,
1846 bool already_copied
, bool pending_inval
)
1849 assert(req_pkt
->isRequest());
1850 assert(req_pkt
->needsResponse());
1852 DPRINTF(Cache
, "%s for %s addr %#llx size %d\n", __func__
,
1853 req_pkt
->cmdString(), req_pkt
->getAddr(), req_pkt
->getSize());
1854 // timing-mode snoop responses require a new packet, unless we
1855 // already made a copy...
1856 PacketPtr pkt
= req_pkt
;
1857 if (!already_copied
)
1858 // do not clear flags, and allocate space for data if the
1859 // packet needs it (the only packets that carry data are read
1861 pkt
= new Packet(req_pkt
, false, req_pkt
->isRead());
1863 assert(req_pkt
->req
->isUncacheable() || req_pkt
->isInvalidate() ||
1865 pkt
->makeTimingResponse();
1866 if (pkt
->isRead()) {
1867 pkt
->setDataFromBlock(blk_data
, blkSize
);
1869 if (pkt
->cmd
== MemCmd::ReadResp
&& pending_inval
) {
1870 // Assume we defer a response to a read from a far-away cache
1871 // A, then later defer a ReadExcl from a cache B on the same
1872 // bus as us. We'll assert cacheResponding in both cases, but
1873 // in the latter case cacheResponding will keep the
1874 // invalidation from reaching cache A. This special response
1875 // tells cache A that it gets the block to satisfy its read,
1876 // but must immediately invalidate it.
1877 pkt
->cmd
= MemCmd::ReadRespWithInvalidate
;
1879 // Here we consider forward_time, paying for just forward latency and
1880 // also charging the delay provided by the xbar.
1881 // forward_time is used as send_time in next allocateWriteBuffer().
1882 Tick forward_time
= clockEdge(forwardLatency
) + pkt
->headerDelay
;
1883 // Here we reset the timing of the packet.
1884 pkt
->headerDelay
= pkt
->payloadDelay
= 0;
1885 DPRINTF(CacheVerbose
,
1886 "%s created response: %s addr %#llx size %d tick: %lu\n",
1887 __func__
, pkt
->cmdString(), pkt
->getAddr(), pkt
->getSize(),
1889 memSidePort
->schedTimingSnoopResp(pkt
, forward_time
, true);
1893 Cache::handleSnoop(PacketPtr pkt
, CacheBlk
*blk
, bool is_timing
,
1894 bool is_deferred
, bool pending_inval
)
1896 DPRINTF(CacheVerbose
, "%s for %s addr %#llx size %d\n", __func__
,
1897 pkt
->cmdString(), pkt
->getAddr(), pkt
->getSize());
1898 // deferred snoops can only happen in timing mode
1899 assert(!(is_deferred
&& !is_timing
));
1900 // pending_inval only makes sense on deferred snoops
1901 assert(!(pending_inval
&& !is_deferred
));
1902 assert(pkt
->isRequest());
1904 // the packet may get modified if we or a forwarded snooper
1905 // responds in atomic mode, so remember a few things about the
1906 // original packet up front
1907 bool invalidate
= pkt
->isInvalidate();
1908 bool M5_VAR_USED needs_writable
= pkt
->needsWritable();
1910 // at the moment we could get an uncacheable write which does not
1911 // have the invalidate flag, and we need a suitable way of dealing
1913 panic_if(invalidate
&& pkt
->req
->isUncacheable(),
1914 "%s got an invalidating uncacheable snoop request %s to %#llx",
1915 name(), pkt
->cmdString(), pkt
->getAddr());
1917 uint32_t snoop_delay
= 0;
1919 if (forwardSnoops
) {
1920 // first propagate snoop upward to see if anyone above us wants to
1921 // handle it. save & restore packet src since it will get
1922 // rewritten to be relative to cpu-side bus (if any)
1923 bool alreadyResponded
= pkt
->cacheResponding();
1925 // copy the packet so that we can clear any flags before
1926 // forwarding it upwards, we also allocate data (passing
1927 // the pointer along in case of static data), in case
1928 // there is a snoop hit in upper levels
1929 Packet
snoopPkt(pkt
, true, true);
1930 snoopPkt
.setExpressSnoop();
1931 // the snoop packet does not need to wait any additional
1933 snoopPkt
.headerDelay
= snoopPkt
.payloadDelay
= 0;
1934 cpuSidePort
->sendTimingSnoopReq(&snoopPkt
);
1936 // add the header delay (including crossbar and snoop
1937 // delays) of the upward snoop to the snoop delay for this
1939 snoop_delay
+= snoopPkt
.headerDelay
;
1941 if (snoopPkt
.cacheResponding()) {
1942 // cache-to-cache response from some upper cache
1943 assert(!alreadyResponded
);
1944 pkt
->setCacheResponding();
1946 // upstream cache has the block, or has an outstanding
1947 // MSHR, pass the flag on
1948 if (snoopPkt
.hasSharers()) {
1949 pkt
->setHasSharers();
1951 // If this request is a prefetch or clean evict and an upper level
1952 // signals block present, make sure to propagate the block
1953 // presence to the requester.
1954 if (snoopPkt
.isBlockCached()) {
1955 pkt
->setBlockCached();
1958 cpuSidePort
->sendAtomicSnoop(pkt
);
1959 if (!alreadyResponded
&& pkt
->cacheResponding()) {
1960 // cache-to-cache response from some upper cache:
1961 // forward response to original requester
1962 assert(pkt
->isResponse());
1967 if (!blk
|| !blk
->isValid()) {
1968 DPRINTF(CacheVerbose
, "%s snoop miss for %s addr %#llx size %d\n",
1969 __func__
, pkt
->cmdString(), pkt
->getAddr(), pkt
->getSize());
1972 DPRINTF(Cache
, "%s snoop hit for %s addr %#llx size %d, "
1973 "old state is %s\n", __func__
, pkt
->cmdString(),
1974 pkt
->getAddr(), pkt
->getSize(), blk
->print());
1977 chatty_assert(!(isReadOnly
&& blk
->isDirty()),
1978 "Should never have a dirty block in a read-only cache %s\n",
1981 // We may end up modifying both the block state and the packet (if
1982 // we respond in atomic mode), so just figure out what to do now
1983 // and then do it later. If we find dirty data while snooping for
1984 // an invalidate, we don't need to send a response. The
1985 // invalidation itself is taken care of below.
1986 bool respond
= blk
->isDirty() && pkt
->needsResponse() &&
1987 pkt
->cmd
!= MemCmd::InvalidateReq
;
1988 bool have_writable
= blk
->isWritable();
1990 // Invalidate any prefetch's from below that would strip write permissions
1991 // MemCmd::HardPFReq is only observed by upstream caches. After missing
1992 // above and in it's own cache, a new MemCmd::ReadReq is created that
1993 // downstream caches observe.
1994 if (pkt
->mustCheckAbove()) {
1995 DPRINTF(Cache
, "Found addr %#llx in upper level cache for snoop %s from"
1996 " lower cache\n", pkt
->getAddr(), pkt
->cmdString());
1997 pkt
->setBlockCached();
2001 if (pkt
->isRead() && !invalidate
) {
2002 // reading without requiring the line in a writable state
2003 assert(!needs_writable
);
2004 pkt
->setHasSharers();
2006 // if the requesting packet is uncacheable, retain the line in
2007 // the current state, otherwhise unset the writable flag,
2008 // which means we go from Modified to Owned (and will respond
2009 // below), remain in Owned (and will respond below), from
2010 // Exclusive to Shared, or remain in Shared
2011 if (!pkt
->req
->isUncacheable())
2012 blk
->status
&= ~BlkWritable
;
2016 // prevent anyone else from responding, cache as well as
2017 // memory, and also prevent any memory from even seeing the
2019 pkt
->setCacheResponding();
2020 if (have_writable
) {
2021 // inform the cache hierarchy that this cache had the line
2022 // in the Modified state so that we avoid unnecessary
2023 // invalidations (see Packet::setResponderHadWritable)
2024 pkt
->setResponderHadWritable();
2026 // in the case of an uncacheable request there is no point
2027 // in setting the responderHadWritable flag, but since the
2028 // recipient does not care there is no harm in doing so
2030 // if the packet has needsWritable set we invalidate our
2031 // copy below and all other copies will be invalidates
2032 // through express snoops, and if needsWritable is not set
2033 // we already called setHasSharers above
2036 // if we are returning a writable and dirty (Modified) line,
2037 // we should be invalidating the line
2038 panic_if(!invalidate
&& !pkt
->hasSharers(),
2039 "%s is passing a Modified line through %s to %#llx, "
2040 "but keeping the block",
2041 name(), pkt
->cmdString(), pkt
->getAddr());
2044 doTimingSupplyResponse(pkt
, blk
->data
, is_deferred
, pending_inval
);
2046 pkt
->makeAtomicResponse();
2047 // packets such as upgrades do not actually have any data
2050 pkt
->setDataFromBlock(blk
->data
, blkSize
);
2054 if (!respond
&& is_timing
&& is_deferred
) {
2055 // if it's a deferred timing snoop to which we are not
2056 // responding, then we've made a copy of both the request and
2057 // the packet, delete them here
2058 assert(pkt
->needsResponse());
2063 // Do this last in case it deallocates block data or something
2066 invalidateBlock(blk
);
2069 DPRINTF(Cache
, "new state is %s\n", blk
->print());
2076 Cache::recvTimingSnoopReq(PacketPtr pkt
)
2078 DPRINTF(CacheVerbose
, "%s for %s addr %#llx size %d\n", __func__
,
2079 pkt
->cmdString(), pkt
->getAddr(), pkt
->getSize());
2081 // Snoops shouldn't happen when bypassing caches
2082 assert(!system
->bypassCaches());
2084 // no need to snoop requests that are not in range
2085 if (!inRange(pkt
->getAddr())) {
2089 bool is_secure
= pkt
->isSecure();
2090 CacheBlk
*blk
= tags
->findBlock(pkt
->getAddr(), is_secure
);
2092 Addr blk_addr
= blockAlign(pkt
->getAddr());
2093 MSHR
*mshr
= mshrQueue
.findMatch(blk_addr
, is_secure
);
2095 // Update the latency cost of the snoop so that the crossbar can
2096 // account for it. Do not overwrite what other neighbouring caches
2097 // have already done, rather take the maximum. The update is
2098 // tentative, for cases where we return before an upward snoop
2100 pkt
->snoopDelay
= std::max
<uint32_t>(pkt
->snoopDelay
,
2101 lookupLatency
* clockPeriod());
2103 // Inform request(Prefetch, CleanEvict or Writeback) from below of
2104 // MSHR hit, set setBlockCached.
2105 if (mshr
&& pkt
->mustCheckAbove()) {
2106 DPRINTF(Cache
, "Setting block cached for %s from"
2107 "lower cache on mshr hit %#x\n",
2108 pkt
->cmdString(), pkt
->getAddr());
2109 pkt
->setBlockCached();
2113 // Let the MSHR itself track the snoop and decide whether we want
2114 // to go ahead and do the regular cache snoop
2115 if (mshr
&& mshr
->handleSnoop(pkt
, order
++)) {
2116 DPRINTF(Cache
, "Deferring snoop on in-service MSHR to blk %#llx (%s)."
2117 "mshrs: %s\n", blk_addr
, is_secure
? "s" : "ns",
2120 if (mshr
->getNumTargets() > numTarget
)
2121 warn("allocating bonus target for snoop"); //handle later
2125 //We also need to check the writeback buffers and handle those
2126 std::vector
<MSHR
*> writebacks
;
2127 if (writeBuffer
.findMatches(blk_addr
, is_secure
, writebacks
)) {
2128 DPRINTF(Cache
, "Snoop hit in writeback to addr %#llx (%s)\n",
2129 pkt
->getAddr(), is_secure
? "s" : "ns");
2131 // Look through writebacks for any cachable writes.
2132 // We should only ever find a single match
2133 assert(writebacks
.size() == 1);
2134 MSHR
*wb_entry
= writebacks
[0];
2135 // Expect to see only Writebacks and/or CleanEvicts here, both of
2136 // which should not be generated for uncacheable data.
2137 assert(!wb_entry
->isUncacheable());
2138 // There should only be a single request responsible for generating
2139 // Writebacks/CleanEvicts.
2140 assert(wb_entry
->getNumTargets() == 1);
2141 PacketPtr wb_pkt
= wb_entry
->getTarget()->pkt
;
2142 assert(wb_pkt
->isEviction());
2144 if (pkt
->isEviction()) {
2145 // if the block is found in the write queue, set the BLOCK_CACHED
2146 // flag for Writeback/CleanEvict snoop. On return the snoop will
2147 // propagate the BLOCK_CACHED flag in Writeback packets and prevent
2148 // any CleanEvicts from travelling down the memory hierarchy.
2149 pkt
->setBlockCached();
2150 DPRINTF(Cache
, "Squashing %s from lower cache on writequeue hit"
2151 " %#x\n", pkt
->cmdString(), pkt
->getAddr());
2155 if (wb_pkt
->cmd
== MemCmd::WritebackDirty
) {
2156 // we have dirty data, and so will proceed to respond
2157 pkt
->setCacheResponding();
2158 if (!pkt
->needsWritable()) {
2159 // the packet should end up in the Shared state (non
2160 // writable) on the completion of the fill
2161 pkt
->setHasSharers();
2162 // similarly, the writeback is no longer passing
2163 // writeable (the receiving cache should consider the
2164 // block Owned rather than Modified)
2165 wb_pkt
->setHasSharers();
2167 // we need to invalidate our copy. we do that
2169 assert(pkt
->isInvalidate());
2171 doTimingSupplyResponse(pkt
, wb_pkt
->getConstPtr
<uint8_t>(),
2174 // on hitting a clean writeback we play it safe and do not
2175 // provide a response, the block may be dirty somewhere
2177 assert(wb_pkt
->isCleanEviction());
2178 // The cache technically holds the block until the
2179 // corresponding message reaches the crossbar
2180 // below. Therefore when a snoop encounters a CleanEvict
2181 // or WritebackClean message we must call
2182 // setHasSharers (just like when it encounters a
2183 // Writeback) to avoid the snoop filter prematurely
2184 // clearing the holder bit in the crossbar below
2185 if (!pkt
->needsWritable()) {
2186 pkt
->setHasSharers();
2187 // the writeback is no longer passing writeable (the
2188 // receiving cache should consider the block Owned
2189 // rather than Modified)
2190 wb_pkt
->setHasSharers();
2192 assert(pkt
->isInvalidate());
2196 if (pkt
->isInvalidate()) {
2197 // Invalidation trumps our writeback... discard here
2198 // Note: markInService will remove entry from writeback buffer.
2199 markInService(wb_entry
, false);
2204 // If this was a shared writeback, there may still be
2205 // other shared copies above that require invalidation.
2206 // We could be more selective and return here if the
2207 // request is non-exclusive or if the writeback is
2209 uint32_t snoop_delay
= handleSnoop(pkt
, blk
, true, false, false);
2211 // Override what we did when we first saw the snoop, as we now
2212 // also have the cost of the upwards snoops to account for
2213 pkt
->snoopDelay
= std::max
<uint32_t>(pkt
->snoopDelay
, snoop_delay
+
2214 lookupLatency
* clockPeriod());
2218 Cache::CpuSidePort::recvTimingSnoopResp(PacketPtr pkt
)
2220 // Express snoop responses from master to slave, e.g., from L1 to L2
2221 cache
->recvTimingSnoopResp(pkt
);
2226 Cache::recvAtomicSnoop(PacketPtr pkt
)
2228 // Snoops shouldn't happen when bypassing caches
2229 assert(!system
->bypassCaches());
2231 // no need to snoop requests that are not in range.
2232 if (!inRange(pkt
->getAddr())) {
2236 CacheBlk
*blk
= tags
->findBlock(pkt
->getAddr(), pkt
->isSecure());
2237 uint32_t snoop_delay
= handleSnoop(pkt
, blk
, false, false, false);
2238 return snoop_delay
+ lookupLatency
* clockPeriod();
2243 Cache::getNextMSHR()
2245 // Check both MSHR queue and write buffer for potential requests,
2246 // note that null does not mean there is no request, it could
2247 // simply be that it is not ready
2248 MSHR
*miss_mshr
= mshrQueue
.getNextMSHR();
2249 MSHR
*write_mshr
= writeBuffer
.getNextMSHR();
2251 // If we got a write buffer request ready, first priority is a
2252 // full write buffer, otherwhise we favour the miss requests
2254 ((writeBuffer
.isFull() && writeBuffer
.inServiceEntries
== 0) ||
2256 // need to search MSHR queue for conflicting earlier miss.
2257 MSHR
*conflict_mshr
=
2258 mshrQueue
.findPending(write_mshr
->blkAddr
,
2259 write_mshr
->isSecure
);
2261 if (conflict_mshr
&& conflict_mshr
->order
< write_mshr
->order
) {
2262 // Service misses in order until conflict is cleared.
2263 return conflict_mshr
;
2265 // @todo Note that we ignore the ready time of the conflict here
2268 // No conflicts; issue write
2270 } else if (miss_mshr
) {
2271 // need to check for conflicting earlier writeback
2272 MSHR
*conflict_mshr
=
2273 writeBuffer
.findPending(miss_mshr
->blkAddr
,
2274 miss_mshr
->isSecure
);
2275 if (conflict_mshr
) {
2276 // not sure why we don't check order here... it was in the
2277 // original code but commented out.
2279 // The only way this happens is if we are
2280 // doing a write and we didn't have permissions
2281 // then subsequently saw a writeback (owned got evicted)
2282 // We need to make sure to perform the writeback first
2283 // To preserve the dirty data, then we can issue the write
2285 // should we return write_mshr here instead? I.e. do we
2286 // have to flush writes in order? I don't think so... not
2287 // for Alpha anyway. Maybe for x86?
2288 return conflict_mshr
;
2290 // @todo Note that we ignore the ready time of the conflict here
2293 // No conflicts; issue read
2297 // fall through... no pending requests. Try a prefetch.
2298 assert(!miss_mshr
&& !write_mshr
);
2299 if (prefetcher
&& mshrQueue
.canPrefetch()) {
2300 // If we have a miss queue slot, we can try a prefetch
2301 PacketPtr pkt
= prefetcher
->getPacket();
2303 Addr pf_addr
= blockAlign(pkt
->getAddr());
2304 if (!tags
->findBlock(pf_addr
, pkt
->isSecure()) &&
2305 !mshrQueue
.findMatch(pf_addr
, pkt
->isSecure()) &&
2306 !writeBuffer
.findMatch(pf_addr
, pkt
->isSecure())) {
2307 // Update statistic on number of prefetches issued
2308 // (hwpf_mshr_misses)
2309 assert(pkt
->req
->masterId() < system
->maxMasters());
2310 mshr_misses
[pkt
->cmdToIndex()][pkt
->req
->masterId()]++;
2312 // allocate an MSHR and return it, note
2313 // that we send the packet straight away, so do not
2314 // schedule the send
2315 return allocateMissBuffer(pkt
, curTick(), false);
2317 // free the request and packet
2328 Cache::isCachedAbove(PacketPtr pkt
, bool is_timing
) const
2332 // Mirroring the flow of HardPFReqs, the cache sends CleanEvict and
2333 // Writeback snoops into upper level caches to check for copies of the
2334 // same block. Using the BLOCK_CACHED flag with the Writeback/CleanEvict
2335 // packet, the cache can inform the crossbar below of presence or absence
2338 Packet
snoop_pkt(pkt
, true, false);
2339 snoop_pkt
.setExpressSnoop();
2340 // Assert that packet is either Writeback or CleanEvict and not a
2341 // prefetch request because prefetch requests need an MSHR and may
2342 // generate a snoop response.
2343 assert(pkt
->isEviction());
2344 snoop_pkt
.senderState
= NULL
;
2345 cpuSidePort
->sendTimingSnoopReq(&snoop_pkt
);
2346 // Writeback/CleanEvict snoops do not generate a snoop response.
2347 assert(!(snoop_pkt
.cacheResponding()));
2348 return snoop_pkt
.isBlockCached();
2350 cpuSidePort
->sendAtomicSnoop(pkt
);
2351 return pkt
->isBlockCached();
2356 Cache::getTimingPacket()
2358 MSHR
*mshr
= getNextMSHR();
2364 // use request from 1st target
2365 PacketPtr tgt_pkt
= mshr
->getTarget()->pkt
;
2366 PacketPtr pkt
= NULL
;
2368 DPRINTF(CachePort
, "%s %s for addr %#llx size %d\n", __func__
,
2369 tgt_pkt
->cmdString(), tgt_pkt
->getAddr(), tgt_pkt
->getSize());
2371 CacheBlk
*blk
= tags
->findBlock(mshr
->blkAddr
, mshr
->isSecure
);
2373 if (tgt_pkt
->cmd
== MemCmd::HardPFReq
&& forwardSnoops
) {
2374 // We need to check the caches above us to verify that
2375 // they don't have a copy of this block in the dirty state
2376 // at the moment. Without this check we could get a stale
2377 // copy from memory that might get used in place of the
2379 Packet
snoop_pkt(tgt_pkt
, true, false);
2380 snoop_pkt
.setExpressSnoop();
2381 // We are sending this packet upwards, but if it hits we will
2382 // get a snoop response that we end up treating just like a
2383 // normal response, hence it needs the MSHR as its sender
2385 snoop_pkt
.senderState
= mshr
;
2386 cpuSidePort
->sendTimingSnoopReq(&snoop_pkt
);
2388 // Check to see if the prefetch was squashed by an upper cache (to
2389 // prevent us from grabbing the line) or if a Check to see if a
2390 // writeback arrived between the time the prefetch was placed in
2391 // the MSHRs and when it was selected to be sent or if the
2392 // prefetch was squashed by an upper cache.
2394 // It is important to check cacheResponding before
2395 // prefetchSquashed. If another cache has committed to
2396 // responding, it will be sending a dirty response which will
2397 // arrive at the MSHR allocated for this request. Checking the
2398 // prefetchSquash first may result in the MSHR being
2399 // prematurely deallocated.
2400 if (snoop_pkt
.cacheResponding()) {
2401 auto M5_VAR_USED r
= outstandingSnoop
.insert(snoop_pkt
.req
);
2404 // if we are getting a snoop response with no sharers it
2405 // will be allocated as Modified
2406 bool pending_modified_resp
= !snoop_pkt
.hasSharers();
2407 markInService(mshr
, pending_modified_resp
);
2409 DPRINTF(Cache
, "Upward snoop of prefetch for addr"
2411 tgt_pkt
->getAddr(), tgt_pkt
->isSecure()? "s": "ns");
2415 if (snoop_pkt
.isBlockCached() || blk
!= NULL
) {
2416 DPRINTF(Cache
, "Block present, prefetch squashed by cache. "
2417 "Deallocating mshr target %#x.\n",
2419 // Deallocate the mshr target
2420 if (mshr
->queue
->forceDeallocateTarget(mshr
)) {
2421 // Clear block if this deallocation resulted freed an
2422 // mshr when all had previously been utilized
2423 clearBlocked((BlockedCause
)(mshr
->queue
->index
));
2429 if (mshr
->isForwardNoResponse()) {
2430 // no response expected, just forward packet as it is
2431 assert(tags
->findBlock(mshr
->blkAddr
, mshr
->isSecure
) == NULL
);
2434 pkt
= getBusPacket(tgt_pkt
, blk
, mshr
->needsWritable());
2436 mshr
->isForward
= (pkt
== NULL
);
2438 if (mshr
->isForward
) {
2439 // not a cache block request, but a response is expected
2440 // make copy of current packet to forward, keep current
2441 // copy for response handling
2442 pkt
= new Packet(tgt_pkt
, false, true);
2443 if (pkt
->isWrite()) {
2444 pkt
->setData(tgt_pkt
->getConstPtr
<uint8_t>());
2449 assert(pkt
!= NULL
);
2450 // play it safe and append (rather than set) the sender state, as
2451 // forwarded packets may already have existing state
2452 pkt
->pushSenderState(mshr
);
2458 Cache::nextMSHRReadyTime() const
2460 Tick nextReady
= std::min(mshrQueue
.nextMSHRReadyTime(),
2461 writeBuffer
.nextMSHRReadyTime());
2463 // Don't signal prefetch ready time if no MSHRs available
2464 // Will signal once enoguh MSHRs are deallocated
2465 if (prefetcher
&& mshrQueue
.canPrefetch()) {
2466 nextReady
= std::min(nextReady
,
2467 prefetcher
->nextPrefetchReadyTime());
2474 Cache::serialize(CheckpointOut
&cp
) const
2476 bool dirty(isDirty());
2479 warn("*** The cache still contains dirty data. ***\n");
2480 warn(" Make sure to drain the system using the correct flags.\n");
2481 warn(" This checkpoint will not restore correctly and dirty data in "
2482 "the cache will be lost!\n");
2485 // Since we don't checkpoint the data in the cache, any dirty data
2486 // will be lost when restoring from a checkpoint of a system that
2487 // wasn't drained properly. Flag the checkpoint as invalid if the
2488 // cache contains dirty data.
2489 bool bad_checkpoint(dirty
);
2490 SERIALIZE_SCALAR(bad_checkpoint
);
2494 Cache::unserialize(CheckpointIn
&cp
)
2496 bool bad_checkpoint
;
2497 UNSERIALIZE_SCALAR(bad_checkpoint
);
2498 if (bad_checkpoint
) {
2499 fatal("Restoring from checkpoints with dirty caches is not supported "
2500 "in the classic memory system. Please remove any caches or "
2501 " drain them properly before taking checkpoints.\n");
2512 Cache::CpuSidePort::getAddrRanges() const
2514 return cache
->getAddrRanges();
2518 Cache::CpuSidePort::recvTimingReq(PacketPtr pkt
)
2520 assert(!cache
->system
->bypassCaches());
2522 bool success
= false;
2524 // always let packets through if an upstream cache has committed
2525 // to responding, even if blocked (we should technically look at
2526 // the isExpressSnoop flag, but it is set by the cache itself, and
2527 // consequently we have to rely on the cacheResponding flag)
2528 if (pkt
->cacheResponding()) {
2529 // do not change the current retry state
2530 bool M5_VAR_USED bypass_success
= cache
->recvTimingReq(pkt
);
2531 assert(bypass_success
);
2533 } else if (blocked
|| mustSendRetry
) {
2534 // either already committed to send a retry, or blocked
2537 // pass it on to the cache, and let the cache decide if we
2538 // have to retry or not
2539 success
= cache
->recvTimingReq(pkt
);
2542 // remember if we have to retry
2543 mustSendRetry
= !success
;
2548 Cache::CpuSidePort::recvAtomic(PacketPtr pkt
)
2550 return cache
->recvAtomic(pkt
);
2554 Cache::CpuSidePort::recvFunctional(PacketPtr pkt
)
2556 // functional request
2557 cache
->functionalAccess(pkt
, true);
2561 CpuSidePort::CpuSidePort(const std::string
&_name
, Cache
*_cache
,
2562 const std::string
&_label
)
2563 : BaseCache::CacheSlavePort(_name
, _cache
, _label
), cache(_cache
)
2568 CacheParams::create()
2572 return new Cache(this);
2581 Cache::MemSidePort::recvTimingResp(PacketPtr pkt
)
2583 cache
->recvTimingResp(pkt
);
2587 // Express snooping requests to memside port
2589 Cache::MemSidePort::recvTimingSnoopReq(PacketPtr pkt
)
2591 // handle snooping requests
2592 cache
->recvTimingSnoopReq(pkt
);
2596 Cache::MemSidePort::recvAtomicSnoop(PacketPtr pkt
)
2598 return cache
->recvAtomicSnoop(pkt
);
2602 Cache::MemSidePort::recvFunctionalSnoop(PacketPtr pkt
)
2604 // functional snoop (note that in contrast to atomic we don't have
2605 // a specific functionalSnoop method, as they have the same
2606 // behaviour regardless)
2607 cache
->functionalAccess(pkt
, false);
2611 Cache::CacheReqPacketQueue::sendDeferredPacket()
2614 assert(!waitingOnRetry
);
2616 // there should never be any deferred request packets in the
2617 // queue, instead we resly on the cache to provide the packets
2618 // from the MSHR queue or write queue
2619 assert(deferredPacketReadyTime() == MaxTick
);
2621 // check for request packets (requests & writebacks)
2622 PacketPtr pkt
= cache
.getTimingPacket();
2624 // can happen if e.g. we attempt a writeback and fail, but
2625 // before the retry, the writeback is eliminated because
2626 // we snoop another cache's ReadEx.
2628 MSHR
*mshr
= dynamic_cast<MSHR
*>(pkt
->senderState
);
2629 // in most cases getTimingPacket allocates a new packet, and
2630 // we must delete it unless it is successfully sent
2631 bool delete_pkt
= !mshr
->isForwardNoResponse();
2633 // let our snoop responses go first if there are responses to
2634 // the same addresses we are about to writeback, note that
2635 // this creates a dependency between requests and snoop
2636 // responses, but that should not be a problem since there is
2637 // a chain already and the key is that the snoop responses can
2638 // sink unconditionally
2639 if (snoopRespQueue
.hasAddr(pkt
->getAddr())) {
2640 DPRINTF(CachePort
, "Waiting for snoop response to be sent\n");
2641 Tick when
= snoopRespQueue
.deferredPacketReadyTime();
2642 schedSendEvent(when
);
2651 waitingOnRetry
= !masterPort
.sendTimingReq(pkt
);
2653 if (waitingOnRetry
) {
2654 DPRINTF(CachePort
, "now waiting on a retry\n");
2656 // we are awaiting a retry, but we
2657 // delete the packet and will be creating a new packet
2658 // when we get the opportunity
2661 // note that we have now masked any requestBus and
2662 // schedSendEvent (we will wait for a retry before
2663 // doing anything), and this is so even if we do not
2664 // care about this packet and might override it before
2667 // As part of the call to sendTimingReq the packet is
2668 // forwarded to all neighbouring caches (and any caches
2669 // above them) as a snoop. Thus at this point we know if
2670 // any of the neighbouring caches are responding, and if
2671 // so, we know it is dirty, and we can determine if it is
2672 // being passed as Modified, making our MSHR the ordering
2674 bool pending_modified_resp
= !pkt
->hasSharers() &&
2675 pkt
->cacheResponding();
2677 cache
.markInService(mshr
, pending_modified_resp
);
2681 // if we succeeded and are not waiting for a retry, schedule the
2682 // next send considering when the next MSHR is ready, note that
2683 // snoop responses have their own packet queue and thus schedule
2685 if (!waitingOnRetry
) {
2686 schedSendEvent(cache
.nextMSHRReadyTime());
2691 MemSidePort::MemSidePort(const std::string
&_name
, Cache
*_cache
,
2692 const std::string
&_label
)
2693 : BaseCache::CacheMasterPort(_name
, _cache
, _reqQueue
, _snoopRespQueue
),
2694 _reqQueue(*_cache
, *this, _snoopRespQueue
, _label
),
2695 _snoopRespQueue(*_cache
, *this, _label
), cache(_cache
)