mem-cache: Add compression and decompression calls
[gem5.git] / src / mem / cache / cache.cc
1 /*
2 * Copyright (c) 2010-2019 ARM Limited
3 * All rights reserved.
4 *
5 * The license below extends only to copyright in the software and shall
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9 * licensed hereunder. You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated
11 * unmodified and in its entirety in all distributions of the software,
12 * modified or unmodified, in source code or in binary form.
13 *
14 * Copyright (c) 2002-2005 The Regents of The University of Michigan
15 * Copyright (c) 2010,2015 Advanced Micro Devices, Inc.
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19 * modification, are permitted provided that the following conditions are
20 * met: redistributions of source code must retain the above copyright
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22 * redistributions in binary form must reproduce the above copyright
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27 * this software without specific prior written permission.
28 *
29 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
30 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
31 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
32 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
33 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
34 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
35 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
36 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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39 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
40 *
41 * Authors: Erik Hallnor
42 * Dave Greene
43 * Nathan Binkert
44 * Steve Reinhardt
45 * Ron Dreslinski
46 * Andreas Sandberg
47 * Nikos Nikoleris
48 */
49
50 /**
51 * @file
52 * Cache definitions.
53 */
54
55 #include "mem/cache/cache.hh"
56
57 #include <cassert>
58
59 #include "base/compiler.hh"
60 #include "base/logging.hh"
61 #include "base/trace.hh"
62 #include "base/types.hh"
63 #include "debug/Cache.hh"
64 #include "debug/CacheTags.hh"
65 #include "debug/CacheVerbose.hh"
66 #include "enums/Clusivity.hh"
67 #include "mem/cache/cache_blk.hh"
68 #include "mem/cache/mshr.hh"
69 #include "mem/cache/tags/base.hh"
70 #include "mem/cache/write_queue_entry.hh"
71 #include "mem/request.hh"
72 #include "params/Cache.hh"
73
74 Cache::Cache(const CacheParams *p)
75 : BaseCache(p, p->system->cacheLineSize()),
76 doFastWrites(true)
77 {
78 }
79
80 void
81 Cache::satisfyRequest(PacketPtr pkt, CacheBlk *blk,
82 bool deferred_response, bool pending_downgrade)
83 {
84 BaseCache::satisfyRequest(pkt, blk);
85
86 if (pkt->isRead()) {
87 // determine if this read is from a (coherent) cache or not
88 if (pkt->fromCache()) {
89 assert(pkt->getSize() == blkSize);
90 // special handling for coherent block requests from
91 // upper-level caches
92 if (pkt->needsWritable()) {
93 // sanity check
94 assert(pkt->cmd == MemCmd::ReadExReq ||
95 pkt->cmd == MemCmd::SCUpgradeFailReq);
96 assert(!pkt->hasSharers());
97
98 // if we have a dirty copy, make sure the recipient
99 // keeps it marked dirty (in the modified state)
100 if (blk->isDirty()) {
101 pkt->setCacheResponding();
102 blk->status &= ~BlkDirty;
103 }
104 } else if (blk->isWritable() && !pending_downgrade &&
105 !pkt->hasSharers() &&
106 pkt->cmd != MemCmd::ReadCleanReq) {
107 // we can give the requester a writable copy on a read
108 // request if:
109 // - we have a writable copy at this level (& below)
110 // - we don't have a pending snoop from below
111 // signaling another read request
112 // - no other cache above has a copy (otherwise it
113 // would have set hasSharers flag when
114 // snooping the packet)
115 // - the read has explicitly asked for a clean
116 // copy of the line
117 if (blk->isDirty()) {
118 // special considerations if we're owner:
119 if (!deferred_response) {
120 // respond with the line in Modified state
121 // (cacheResponding set, hasSharers not set)
122 pkt->setCacheResponding();
123
124 // if this cache is mostly inclusive, we
125 // keep the block in the Exclusive state,
126 // and pass it upwards as Modified
127 // (writable and dirty), hence we have
128 // multiple caches, all on the same path
129 // towards memory, all considering the
130 // same block writable, but only one
131 // considering it Modified
132
133 // we get away with multiple caches (on
134 // the same path to memory) considering
135 // the block writeable as we always enter
136 // the cache hierarchy through a cache,
137 // and first snoop upwards in all other
138 // branches
139 blk->status &= ~BlkDirty;
140 } else {
141 // if we're responding after our own miss,
142 // there's a window where the recipient didn't
143 // know it was getting ownership and may not
144 // have responded to snoops correctly, so we
145 // have to respond with a shared line
146 pkt->setHasSharers();
147 }
148 }
149 } else {
150 // otherwise only respond with a shared copy
151 pkt->setHasSharers();
152 }
153 }
154 }
155 }
156
157 /////////////////////////////////////////////////////
158 //
159 // Access path: requests coming in from the CPU side
160 //
161 /////////////////////////////////////////////////////
162
163 bool
164 Cache::access(PacketPtr pkt, CacheBlk *&blk, Cycles &lat,
165 PacketList &writebacks)
166 {
167
168 if (pkt->req->isUncacheable()) {
169 assert(pkt->isRequest());
170
171 chatty_assert(!(isReadOnly && pkt->isWrite()),
172 "Should never see a write in a read-only cache %s\n",
173 name());
174
175 DPRINTF(Cache, "%s for %s\n", __func__, pkt->print());
176
177 // flush and invalidate any existing block
178 CacheBlk *old_blk(tags->findBlock(pkt->getAddr(), pkt->isSecure()));
179 if (old_blk && old_blk->isValid()) {
180 BaseCache::evictBlock(old_blk, writebacks);
181 }
182
183 blk = nullptr;
184 // lookupLatency is the latency in case the request is uncacheable.
185 lat = lookupLatency;
186 return false;
187 }
188
189 return BaseCache::access(pkt, blk, lat, writebacks);
190 }
191
192 void
193 Cache::doWritebacks(PacketList& writebacks, Tick forward_time)
194 {
195 while (!writebacks.empty()) {
196 PacketPtr wbPkt = writebacks.front();
197 // We use forwardLatency here because we are copying writebacks to
198 // write buffer.
199
200 // Call isCachedAbove for Writebacks, CleanEvicts and
201 // WriteCleans to discover if the block is cached above.
202 if (isCachedAbove(wbPkt)) {
203 if (wbPkt->cmd == MemCmd::CleanEvict) {
204 // Delete CleanEvict because cached copies exist above. The
205 // packet destructor will delete the request object because
206 // this is a non-snoop request packet which does not require a
207 // response.
208 delete wbPkt;
209 } else if (wbPkt->cmd == MemCmd::WritebackClean) {
210 // clean writeback, do not send since the block is
211 // still cached above
212 assert(writebackClean);
213 delete wbPkt;
214 } else {
215 assert(wbPkt->cmd == MemCmd::WritebackDirty ||
216 wbPkt->cmd == MemCmd::WriteClean);
217 // Set BLOCK_CACHED flag in Writeback and send below, so that
218 // the Writeback does not reset the bit corresponding to this
219 // address in the snoop filter below.
220 wbPkt->setBlockCached();
221 allocateWriteBuffer(wbPkt, forward_time);
222 }
223 } else {
224 // If the block is not cached above, send packet below. Both
225 // CleanEvict and Writeback with BLOCK_CACHED flag cleared will
226 // reset the bit corresponding to this address in the snoop filter
227 // below.
228 allocateWriteBuffer(wbPkt, forward_time);
229 }
230 writebacks.pop_front();
231 }
232 }
233
234 void
235 Cache::doWritebacksAtomic(PacketList& writebacks)
236 {
237 while (!writebacks.empty()) {
238 PacketPtr wbPkt = writebacks.front();
239 // Call isCachedAbove for both Writebacks and CleanEvicts. If
240 // isCachedAbove returns true we set BLOCK_CACHED flag in Writebacks
241 // and discard CleanEvicts.
242 if (isCachedAbove(wbPkt, false)) {
243 if (wbPkt->cmd == MemCmd::WritebackDirty ||
244 wbPkt->cmd == MemCmd::WriteClean) {
245 // Set BLOCK_CACHED flag in Writeback and send below,
246 // so that the Writeback does not reset the bit
247 // corresponding to this address in the snoop filter
248 // below. We can discard CleanEvicts because cached
249 // copies exist above. Atomic mode isCachedAbove
250 // modifies packet to set BLOCK_CACHED flag
251 memSidePort.sendAtomic(wbPkt);
252 }
253 } else {
254 // If the block is not cached above, send packet below. Both
255 // CleanEvict and Writeback with BLOCK_CACHED flag cleared will
256 // reset the bit corresponding to this address in the snoop filter
257 // below.
258 memSidePort.sendAtomic(wbPkt);
259 }
260 writebacks.pop_front();
261 // In case of CleanEvicts, the packet destructor will delete the
262 // request object because this is a non-snoop request packet which
263 // does not require a response.
264 delete wbPkt;
265 }
266 }
267
268
269 void
270 Cache::recvTimingSnoopResp(PacketPtr pkt)
271 {
272 DPRINTF(Cache, "%s for %s\n", __func__, pkt->print());
273
274 // determine if the response is from a snoop request we created
275 // (in which case it should be in the outstandingSnoop), or if we
276 // merely forwarded someone else's snoop request
277 const bool forwardAsSnoop = outstandingSnoop.find(pkt->req) ==
278 outstandingSnoop.end();
279
280 if (!forwardAsSnoop) {
281 // the packet came from this cache, so sink it here and do not
282 // forward it
283 assert(pkt->cmd == MemCmd::HardPFResp);
284
285 outstandingSnoop.erase(pkt->req);
286
287 DPRINTF(Cache, "Got prefetch response from above for addr "
288 "%#llx (%s)\n", pkt->getAddr(), pkt->isSecure() ? "s" : "ns");
289 recvTimingResp(pkt);
290 return;
291 }
292
293 // forwardLatency is set here because there is a response from an
294 // upper level cache.
295 // To pay the delay that occurs if the packet comes from the bus,
296 // we charge also headerDelay.
297 Tick snoop_resp_time = clockEdge(forwardLatency) + pkt->headerDelay;
298 // Reset the timing of the packet.
299 pkt->headerDelay = pkt->payloadDelay = 0;
300 memSidePort.schedTimingSnoopResp(pkt, snoop_resp_time);
301 }
302
303 void
304 Cache::promoteWholeLineWrites(PacketPtr pkt)
305 {
306 // Cache line clearing instructions
307 if (doFastWrites && (pkt->cmd == MemCmd::WriteReq) &&
308 (pkt->getSize() == blkSize) && (pkt->getOffset(blkSize) == 0)) {
309 pkt->cmd = MemCmd::WriteLineReq;
310 DPRINTF(Cache, "packet promoted from Write to WriteLineReq\n");
311 }
312 }
313
314 void
315 Cache::handleTimingReqHit(PacketPtr pkt, CacheBlk *blk, Tick request_time)
316 {
317 // should never be satisfying an uncacheable access as we
318 // flush and invalidate any existing block as part of the
319 // lookup
320 assert(!pkt->req->isUncacheable());
321
322 BaseCache::handleTimingReqHit(pkt, blk, request_time);
323 }
324
325 void
326 Cache::handleTimingReqMiss(PacketPtr pkt, CacheBlk *blk, Tick forward_time,
327 Tick request_time)
328 {
329 if (pkt->req->isUncacheable()) {
330 // ignore any existing MSHR if we are dealing with an
331 // uncacheable request
332
333 // should have flushed and have no valid block
334 assert(!blk || !blk->isValid());
335
336 mshr_uncacheable[pkt->cmdToIndex()][pkt->req->masterId()]++;
337
338 if (pkt->isWrite()) {
339 allocateWriteBuffer(pkt, forward_time);
340 } else {
341 assert(pkt->isRead());
342
343 // uncacheable accesses always allocate a new MSHR
344
345 // Here we are using forward_time, modelling the latency of
346 // a miss (outbound) just as forwardLatency, neglecting the
347 // lookupLatency component.
348 allocateMissBuffer(pkt, forward_time);
349 }
350
351 return;
352 }
353
354 Addr blk_addr = pkt->getBlockAddr(blkSize);
355
356 MSHR *mshr = mshrQueue.findMatch(blk_addr, pkt->isSecure());
357
358 // Software prefetch handling:
359 // To keep the core from waiting on data it won't look at
360 // anyway, send back a response with dummy data. Miss handling
361 // will continue asynchronously. Unfortunately, the core will
362 // insist upon freeing original Packet/Request, so we have to
363 // create a new pair with a different lifecycle. Note that this
364 // processing happens before any MSHR munging on the behalf of
365 // this request because this new Request will be the one stored
366 // into the MSHRs, not the original.
367 if (pkt->cmd.isSWPrefetch()) {
368 assert(pkt->needsResponse());
369 assert(pkt->req->hasPaddr());
370 assert(!pkt->req->isUncacheable());
371
372 // There's no reason to add a prefetch as an additional target
373 // to an existing MSHR. If an outstanding request is already
374 // in progress, there is nothing for the prefetch to do.
375 // If this is the case, we don't even create a request at all.
376 PacketPtr pf = nullptr;
377
378 if (!mshr) {
379 // copy the request and create a new SoftPFReq packet
380 RequestPtr req = std::make_shared<Request>(pkt->req->getPaddr(),
381 pkt->req->getSize(),
382 pkt->req->getFlags(),
383 pkt->req->masterId());
384 pf = new Packet(req, pkt->cmd);
385 pf->allocate();
386 assert(pf->matchAddr(pkt));
387 assert(pf->getSize() == pkt->getSize());
388 }
389
390 pkt->makeTimingResponse();
391
392 // request_time is used here, taking into account lat and the delay
393 // charged if the packet comes from the xbar.
394 cpuSidePort.schedTimingResp(pkt, request_time);
395
396 // If an outstanding request is in progress (we found an
397 // MSHR) this is set to null
398 pkt = pf;
399 }
400
401 BaseCache::handleTimingReqMiss(pkt, mshr, blk, forward_time, request_time);
402 }
403
404 void
405 Cache::recvTimingReq(PacketPtr pkt)
406 {
407 DPRINTF(CacheTags, "%s tags:\n%s\n", __func__, tags->print());
408
409 promoteWholeLineWrites(pkt);
410
411 if (pkt->cacheResponding()) {
412 // a cache above us (but not where the packet came from) is
413 // responding to the request, in other words it has the line
414 // in Modified or Owned state
415 DPRINTF(Cache, "Cache above responding to %s: not responding\n",
416 pkt->print());
417
418 // if the packet needs the block to be writable, and the cache
419 // that has promised to respond (setting the cache responding
420 // flag) is not providing writable (it is in Owned rather than
421 // the Modified state), we know that there may be other Shared
422 // copies in the system; go out and invalidate them all
423 assert(pkt->needsWritable() && !pkt->responderHadWritable());
424
425 // an upstream cache that had the line in Owned state
426 // (dirty, but not writable), is responding and thus
427 // transferring the dirty line from one branch of the
428 // cache hierarchy to another
429
430 // send out an express snoop and invalidate all other
431 // copies (snooping a packet that needs writable is the
432 // same as an invalidation), thus turning the Owned line
433 // into a Modified line, note that we don't invalidate the
434 // block in the current cache or any other cache on the
435 // path to memory
436
437 // create a downstream express snoop with cleared packet
438 // flags, there is no need to allocate any data as the
439 // packet is merely used to co-ordinate state transitions
440 Packet *snoop_pkt = new Packet(pkt, true, false);
441
442 // also reset the bus time that the original packet has
443 // not yet paid for
444 snoop_pkt->headerDelay = snoop_pkt->payloadDelay = 0;
445
446 // make this an instantaneous express snoop, and let the
447 // other caches in the system know that the another cache
448 // is responding, because we have found the authorative
449 // copy (Modified or Owned) that will supply the right
450 // data
451 snoop_pkt->setExpressSnoop();
452 snoop_pkt->setCacheResponding();
453
454 // this express snoop travels towards the memory, and at
455 // every crossbar it is snooped upwards thus reaching
456 // every cache in the system
457 bool M5_VAR_USED success = memSidePort.sendTimingReq(snoop_pkt);
458 // express snoops always succeed
459 assert(success);
460
461 // main memory will delete the snoop packet
462
463 // queue for deletion, as opposed to immediate deletion, as
464 // the sending cache is still relying on the packet
465 pendingDelete.reset(pkt);
466
467 // no need to take any further action in this particular cache
468 // as an upstram cache has already committed to responding,
469 // and we have already sent out any express snoops in the
470 // section above to ensure all other copies in the system are
471 // invalidated
472 return;
473 }
474
475 BaseCache::recvTimingReq(pkt);
476 }
477
478 PacketPtr
479 Cache::createMissPacket(PacketPtr cpu_pkt, CacheBlk *blk,
480 bool needsWritable,
481 bool is_whole_line_write) const
482 {
483 // should never see evictions here
484 assert(!cpu_pkt->isEviction());
485
486 bool blkValid = blk && blk->isValid();
487
488 if (cpu_pkt->req->isUncacheable() ||
489 (!blkValid && cpu_pkt->isUpgrade()) ||
490 cpu_pkt->cmd == MemCmd::InvalidateReq || cpu_pkt->isClean()) {
491 // uncacheable requests and upgrades from upper-level caches
492 // that missed completely just go through as is
493 return nullptr;
494 }
495
496 assert(cpu_pkt->needsResponse());
497
498 MemCmd cmd;
499 // @TODO make useUpgrades a parameter.
500 // Note that ownership protocols require upgrade, otherwise a
501 // write miss on a shared owned block will generate a ReadExcl,
502 // which will clobber the owned copy.
503 const bool useUpgrades = true;
504 assert(cpu_pkt->cmd != MemCmd::WriteLineReq || is_whole_line_write);
505 if (is_whole_line_write) {
506 assert(!blkValid || !blk->isWritable());
507 // forward as invalidate to all other caches, this gives us
508 // the line in Exclusive state, and invalidates all other
509 // copies
510 cmd = MemCmd::InvalidateReq;
511 } else if (blkValid && useUpgrades) {
512 // only reason to be here is that blk is read only and we need
513 // it to be writable
514 assert(needsWritable);
515 assert(!blk->isWritable());
516 cmd = cpu_pkt->isLLSC() ? MemCmd::SCUpgradeReq : MemCmd::UpgradeReq;
517 } else if (cpu_pkt->cmd == MemCmd::SCUpgradeFailReq ||
518 cpu_pkt->cmd == MemCmd::StoreCondFailReq) {
519 // Even though this SC will fail, we still need to send out the
520 // request and get the data to supply it to other snoopers in the case
521 // where the determination the StoreCond fails is delayed due to
522 // all caches not being on the same local bus.
523 cmd = MemCmd::SCUpgradeFailReq;
524 } else {
525 // block is invalid
526
527 // If the request does not need a writable there are two cases
528 // where we need to ensure the response will not fetch the
529 // block in dirty state:
530 // * this cache is read only and it does not perform
531 // writebacks,
532 // * this cache is mostly exclusive and will not fill (since
533 // it does not fill it will have to writeback the dirty data
534 // immediately which generates uneccesary writebacks).
535 bool force_clean_rsp = isReadOnly || clusivity == Enums::mostly_excl;
536 cmd = needsWritable ? MemCmd::ReadExReq :
537 (force_clean_rsp ? MemCmd::ReadCleanReq : MemCmd::ReadSharedReq);
538 }
539 PacketPtr pkt = new Packet(cpu_pkt->req, cmd, blkSize);
540
541 // if there are upstream caches that have already marked the
542 // packet as having sharers (not passing writable), pass that info
543 // downstream
544 if (cpu_pkt->hasSharers() && !needsWritable) {
545 // note that cpu_pkt may have spent a considerable time in the
546 // MSHR queue and that the information could possibly be out
547 // of date, however, there is no harm in conservatively
548 // assuming the block has sharers
549 pkt->setHasSharers();
550 DPRINTF(Cache, "%s: passing hasSharers from %s to %s\n",
551 __func__, cpu_pkt->print(), pkt->print());
552 }
553
554 // the packet should be block aligned
555 assert(pkt->getAddr() == pkt->getBlockAddr(blkSize));
556
557 pkt->allocate();
558 DPRINTF(Cache, "%s: created %s from %s\n", __func__, pkt->print(),
559 cpu_pkt->print());
560 return pkt;
561 }
562
563
564 Cycles
565 Cache::handleAtomicReqMiss(PacketPtr pkt, CacheBlk *&blk,
566 PacketList &writebacks)
567 {
568 // deal with the packets that go through the write path of
569 // the cache, i.e. any evictions and writes
570 if (pkt->isEviction() || pkt->cmd == MemCmd::WriteClean ||
571 (pkt->req->isUncacheable() && pkt->isWrite())) {
572 Cycles latency = ticksToCycles(memSidePort.sendAtomic(pkt));
573
574 // at this point, if the request was an uncacheable write
575 // request, it has been satisfied by a memory below and the
576 // packet carries the response back
577 assert(!(pkt->req->isUncacheable() && pkt->isWrite()) ||
578 pkt->isResponse());
579
580 return latency;
581 }
582
583 // only misses left
584
585 PacketPtr bus_pkt = createMissPacket(pkt, blk, pkt->needsWritable(),
586 pkt->isWholeLineWrite(blkSize));
587
588 bool is_forward = (bus_pkt == nullptr);
589
590 if (is_forward) {
591 // just forwarding the same request to the next level
592 // no local cache operation involved
593 bus_pkt = pkt;
594 }
595
596 DPRINTF(Cache, "%s: Sending an atomic %s\n", __func__,
597 bus_pkt->print());
598
599 #if TRACING_ON
600 CacheBlk::State old_state = blk ? blk->status : 0;
601 #endif
602
603 Cycles latency = ticksToCycles(memSidePort.sendAtomic(bus_pkt));
604
605 bool is_invalidate = bus_pkt->isInvalidate();
606
607 // We are now dealing with the response handling
608 DPRINTF(Cache, "%s: Receive response: %s in state %i\n", __func__,
609 bus_pkt->print(), old_state);
610
611 // If packet was a forward, the response (if any) is already
612 // in place in the bus_pkt == pkt structure, so we don't need
613 // to do anything. Otherwise, use the separate bus_pkt to
614 // generate response to pkt and then delete it.
615 if (!is_forward) {
616 if (pkt->needsResponse()) {
617 assert(bus_pkt->isResponse());
618 if (bus_pkt->isError()) {
619 pkt->makeAtomicResponse();
620 pkt->copyError(bus_pkt);
621 } else if (pkt->isWholeLineWrite(blkSize)) {
622 // note the use of pkt, not bus_pkt here.
623
624 // write-line request to the cache that promoted
625 // the write to a whole line
626 const bool allocate = allocOnFill(pkt->cmd) &&
627 (!writeAllocator || writeAllocator->allocate());
628 blk = handleFill(bus_pkt, blk, writebacks, allocate);
629 assert(blk != NULL);
630 is_invalidate = false;
631 satisfyRequest(pkt, blk);
632 } else if (bus_pkt->isRead() ||
633 bus_pkt->cmd == MemCmd::UpgradeResp) {
634 // we're updating cache state to allow us to
635 // satisfy the upstream request from the cache
636 blk = handleFill(bus_pkt, blk, writebacks,
637 allocOnFill(pkt->cmd));
638 satisfyRequest(pkt, blk);
639 maintainClusivity(pkt->fromCache(), blk);
640 } else {
641 // we're satisfying the upstream request without
642 // modifying cache state, e.g., a write-through
643 pkt->makeAtomicResponse();
644 }
645 }
646 delete bus_pkt;
647 }
648
649 if (is_invalidate && blk && blk->isValid()) {
650 invalidateBlock(blk);
651 }
652
653 return latency;
654 }
655
656 Tick
657 Cache::recvAtomic(PacketPtr pkt)
658 {
659 promoteWholeLineWrites(pkt);
660
661 // follow the same flow as in recvTimingReq, and check if a cache
662 // above us is responding
663 if (pkt->cacheResponding()) {
664 assert(!pkt->req->isCacheInvalidate());
665 DPRINTF(Cache, "Cache above responding to %s: not responding\n",
666 pkt->print());
667
668 // if a cache is responding, and it had the line in Owned
669 // rather than Modified state, we need to invalidate any
670 // copies that are not on the same path to memory
671 assert(pkt->needsWritable() && !pkt->responderHadWritable());
672
673 return memSidePort.sendAtomic(pkt);
674 }
675
676 return BaseCache::recvAtomic(pkt);
677 }
678
679
680 /////////////////////////////////////////////////////
681 //
682 // Response handling: responses from the memory side
683 //
684 /////////////////////////////////////////////////////
685
686
687 void
688 Cache::serviceMSHRTargets(MSHR *mshr, const PacketPtr pkt, CacheBlk *blk)
689 {
690 QueueEntry::Target *initial_tgt = mshr->getTarget();
691 // First offset for critical word first calculations
692 const int initial_offset = initial_tgt->pkt->getOffset(blkSize);
693
694 const bool is_error = pkt->isError();
695 // allow invalidation responses originating from write-line
696 // requests to be discarded
697 bool is_invalidate = pkt->isInvalidate() &&
698 !mshr->wasWholeLineWrite;
699
700 MSHR::TargetList targets = mshr->extractServiceableTargets(pkt);
701 for (auto &target: targets) {
702 Packet *tgt_pkt = target.pkt;
703 switch (target.source) {
704 case MSHR::Target::FromCPU:
705 Tick completion_time;
706 // Here we charge on completion_time the delay of the xbar if the
707 // packet comes from it, charged on headerDelay.
708 completion_time = pkt->headerDelay;
709
710 // Software prefetch handling for cache closest to core
711 if (tgt_pkt->cmd.isSWPrefetch()) {
712 // a software prefetch would have already been ack'd
713 // immediately with dummy data so the core would be able to
714 // retire it. This request completes right here, so we
715 // deallocate it.
716 delete tgt_pkt;
717 break; // skip response
718 }
719
720 // unlike the other packet flows, where data is found in other
721 // caches or memory and brought back, write-line requests always
722 // have the data right away, so the above check for "is fill?"
723 // cannot actually be determined until examining the stored MSHR
724 // state. We "catch up" with that logic here, which is duplicated
725 // from above.
726 if (tgt_pkt->cmd == MemCmd::WriteLineReq) {
727 assert(!is_error);
728 assert(blk);
729 assert(blk->isWritable());
730 }
731
732 if (blk && blk->isValid() && !mshr->isForward) {
733 satisfyRequest(tgt_pkt, blk, true, mshr->hasPostDowngrade());
734
735 // How many bytes past the first request is this one
736 int transfer_offset =
737 tgt_pkt->getOffset(blkSize) - initial_offset;
738 if (transfer_offset < 0) {
739 transfer_offset += blkSize;
740 }
741
742 // If not critical word (offset) return payloadDelay.
743 // responseLatency is the latency of the return path
744 // from lower level caches/memory to an upper level cache or
745 // the core.
746 completion_time += clockEdge(responseLatency) +
747 (transfer_offset ? pkt->payloadDelay : 0);
748
749 assert(!tgt_pkt->req->isUncacheable());
750
751 assert(tgt_pkt->req->masterId() < system->maxMasters());
752 missLatency[tgt_pkt->cmdToIndex()][tgt_pkt->req->masterId()] +=
753 completion_time - target.recvTime;
754 } else if (pkt->cmd == MemCmd::UpgradeFailResp) {
755 // failed StoreCond upgrade
756 assert(tgt_pkt->cmd == MemCmd::StoreCondReq ||
757 tgt_pkt->cmd == MemCmd::StoreCondFailReq ||
758 tgt_pkt->cmd == MemCmd::SCUpgradeFailReq);
759 // responseLatency is the latency of the return path
760 // from lower level caches/memory to an upper level cache or
761 // the core.
762 completion_time += clockEdge(responseLatency) +
763 pkt->payloadDelay;
764 tgt_pkt->req->setExtraData(0);
765 } else {
766 // We are about to send a response to a cache above
767 // that asked for an invalidation; we need to
768 // invalidate our copy immediately as the most
769 // up-to-date copy of the block will now be in the
770 // cache above. It will also prevent this cache from
771 // responding (if the block was previously dirty) to
772 // snoops as they should snoop the caches above where
773 // they will get the response from.
774 if (is_invalidate && blk && blk->isValid()) {
775 invalidateBlock(blk);
776 }
777 // not a cache fill, just forwarding response
778 // responseLatency is the latency of the return path
779 // from lower level cahces/memory to the core.
780 completion_time += clockEdge(responseLatency) +
781 pkt->payloadDelay;
782 if (pkt->isRead() && !is_error) {
783 // sanity check
784 assert(pkt->matchAddr(tgt_pkt));
785 assert(pkt->getSize() >= tgt_pkt->getSize());
786
787 tgt_pkt->setData(pkt->getConstPtr<uint8_t>());
788 }
789
790 // this response did not allocate here and therefore
791 // it was not consumed, make sure that any flags are
792 // carried over to cache above
793 tgt_pkt->copyResponderFlags(pkt);
794 }
795 tgt_pkt->makeTimingResponse();
796 // if this packet is an error copy that to the new packet
797 if (is_error)
798 tgt_pkt->copyError(pkt);
799 if (tgt_pkt->cmd == MemCmd::ReadResp &&
800 (is_invalidate || mshr->hasPostInvalidate())) {
801 // If intermediate cache got ReadRespWithInvalidate,
802 // propagate that. Response should not have
803 // isInvalidate() set otherwise.
804 tgt_pkt->cmd = MemCmd::ReadRespWithInvalidate;
805 DPRINTF(Cache, "%s: updated cmd to %s\n", __func__,
806 tgt_pkt->print());
807 }
808 // Reset the bus additional time as it is now accounted for
809 tgt_pkt->headerDelay = tgt_pkt->payloadDelay = 0;
810 cpuSidePort.schedTimingResp(tgt_pkt, completion_time);
811 break;
812
813 case MSHR::Target::FromPrefetcher:
814 assert(tgt_pkt->cmd == MemCmd::HardPFReq);
815 if (blk)
816 blk->status |= BlkHWPrefetched;
817 delete tgt_pkt;
818 break;
819
820 case MSHR::Target::FromSnoop:
821 // I don't believe that a snoop can be in an error state
822 assert(!is_error);
823 // response to snoop request
824 DPRINTF(Cache, "processing deferred snoop...\n");
825 // If the response is invalidating, a snooping target can
826 // be satisfied if it is also invalidating. If the reponse is, not
827 // only invalidating, but more specifically an InvalidateResp and
828 // the MSHR was created due to an InvalidateReq then a cache above
829 // is waiting to satisfy a WriteLineReq. In this case even an
830 // non-invalidating snoop is added as a target here since this is
831 // the ordering point. When the InvalidateResp reaches this cache,
832 // the snooping target will snoop further the cache above with the
833 // WriteLineReq.
834 assert(!is_invalidate || pkt->cmd == MemCmd::InvalidateResp ||
835 pkt->req->isCacheMaintenance() ||
836 mshr->hasPostInvalidate());
837 handleSnoop(tgt_pkt, blk, true, true, mshr->hasPostInvalidate());
838 break;
839
840 default:
841 panic("Illegal target->source enum %d\n", target.source);
842 }
843 }
844
845 maintainClusivity(targets.hasFromCache, blk);
846
847 if (blk && blk->isValid()) {
848 // an invalidate response stemming from a write line request
849 // should not invalidate the block, so check if the
850 // invalidation should be discarded
851 if (is_invalidate || mshr->hasPostInvalidate()) {
852 invalidateBlock(blk);
853 } else if (mshr->hasPostDowngrade()) {
854 blk->status &= ~BlkWritable;
855 }
856 }
857 }
858
859 PacketPtr
860 Cache::evictBlock(CacheBlk *blk)
861 {
862 PacketPtr pkt = (blk->isDirty() || writebackClean) ?
863 writebackBlk(blk) : cleanEvictBlk(blk);
864
865 invalidateBlock(blk);
866
867 return pkt;
868 }
869
870 PacketPtr
871 Cache::cleanEvictBlk(CacheBlk *blk)
872 {
873 assert(!writebackClean);
874 assert(blk && blk->isValid() && !blk->isDirty());
875
876 // Creating a zero sized write, a message to the snoop filter
877 RequestPtr req = std::make_shared<Request>(
878 regenerateBlkAddr(blk), blkSize, 0, Request::wbMasterId);
879
880 if (blk->isSecure())
881 req->setFlags(Request::SECURE);
882
883 req->taskId(blk->task_id);
884
885 PacketPtr pkt = new Packet(req, MemCmd::CleanEvict);
886 pkt->allocate();
887 DPRINTF(Cache, "Create CleanEvict %s\n", pkt->print());
888
889 return pkt;
890 }
891
892 /////////////////////////////////////////////////////
893 //
894 // Snoop path: requests coming in from the memory side
895 //
896 /////////////////////////////////////////////////////
897
898 void
899 Cache::doTimingSupplyResponse(PacketPtr req_pkt, const uint8_t *blk_data,
900 bool already_copied, bool pending_inval)
901 {
902 // sanity check
903 assert(req_pkt->isRequest());
904 assert(req_pkt->needsResponse());
905
906 DPRINTF(Cache, "%s: for %s\n", __func__, req_pkt->print());
907 // timing-mode snoop responses require a new packet, unless we
908 // already made a copy...
909 PacketPtr pkt = req_pkt;
910 if (!already_copied)
911 // do not clear flags, and allocate space for data if the
912 // packet needs it (the only packets that carry data are read
913 // responses)
914 pkt = new Packet(req_pkt, false, req_pkt->isRead());
915
916 assert(req_pkt->req->isUncacheable() || req_pkt->isInvalidate() ||
917 pkt->hasSharers());
918 pkt->makeTimingResponse();
919 if (pkt->isRead()) {
920 pkt->setDataFromBlock(blk_data, blkSize);
921 }
922 if (pkt->cmd == MemCmd::ReadResp && pending_inval) {
923 // Assume we defer a response to a read from a far-away cache
924 // A, then later defer a ReadExcl from a cache B on the same
925 // bus as us. We'll assert cacheResponding in both cases, but
926 // in the latter case cacheResponding will keep the
927 // invalidation from reaching cache A. This special response
928 // tells cache A that it gets the block to satisfy its read,
929 // but must immediately invalidate it.
930 pkt->cmd = MemCmd::ReadRespWithInvalidate;
931 }
932 // Here we consider forward_time, paying for just forward latency and
933 // also charging the delay provided by the xbar.
934 // forward_time is used as send_time in next allocateWriteBuffer().
935 Tick forward_time = clockEdge(forwardLatency) + pkt->headerDelay;
936 // Here we reset the timing of the packet.
937 pkt->headerDelay = pkt->payloadDelay = 0;
938 DPRINTF(CacheVerbose, "%s: created response: %s tick: %lu\n", __func__,
939 pkt->print(), forward_time);
940 memSidePort.schedTimingSnoopResp(pkt, forward_time);
941 }
942
943 uint32_t
944 Cache::handleSnoop(PacketPtr pkt, CacheBlk *blk, bool is_timing,
945 bool is_deferred, bool pending_inval)
946 {
947 DPRINTF(CacheVerbose, "%s: for %s\n", __func__, pkt->print());
948 // deferred snoops can only happen in timing mode
949 assert(!(is_deferred && !is_timing));
950 // pending_inval only makes sense on deferred snoops
951 assert(!(pending_inval && !is_deferred));
952 assert(pkt->isRequest());
953
954 // the packet may get modified if we or a forwarded snooper
955 // responds in atomic mode, so remember a few things about the
956 // original packet up front
957 bool invalidate = pkt->isInvalidate();
958 bool M5_VAR_USED needs_writable = pkt->needsWritable();
959
960 // at the moment we could get an uncacheable write which does not
961 // have the invalidate flag, and we need a suitable way of dealing
962 // with this case
963 panic_if(invalidate && pkt->req->isUncacheable(),
964 "%s got an invalidating uncacheable snoop request %s",
965 name(), pkt->print());
966
967 uint32_t snoop_delay = 0;
968
969 if (forwardSnoops) {
970 // first propagate snoop upward to see if anyone above us wants to
971 // handle it. save & restore packet src since it will get
972 // rewritten to be relative to cpu-side bus (if any)
973 if (is_timing) {
974 // copy the packet so that we can clear any flags before
975 // forwarding it upwards, we also allocate data (passing
976 // the pointer along in case of static data), in case
977 // there is a snoop hit in upper levels
978 Packet snoopPkt(pkt, true, true);
979 snoopPkt.setExpressSnoop();
980 // the snoop packet does not need to wait any additional
981 // time
982 snoopPkt.headerDelay = snoopPkt.payloadDelay = 0;
983 cpuSidePort.sendTimingSnoopReq(&snoopPkt);
984
985 // add the header delay (including crossbar and snoop
986 // delays) of the upward snoop to the snoop delay for this
987 // cache
988 snoop_delay += snoopPkt.headerDelay;
989
990 // If this request is a prefetch or clean evict and an upper level
991 // signals block present, make sure to propagate the block
992 // presence to the requester.
993 if (snoopPkt.isBlockCached()) {
994 pkt->setBlockCached();
995 }
996 // If the request was satisfied by snooping the cache
997 // above, mark the original packet as satisfied too.
998 if (snoopPkt.satisfied()) {
999 pkt->setSatisfied();
1000 }
1001
1002 // Copy over flags from the snoop response to make sure we
1003 // inform the final destination
1004 pkt->copyResponderFlags(&snoopPkt);
1005 } else {
1006 bool already_responded = pkt->cacheResponding();
1007 cpuSidePort.sendAtomicSnoop(pkt);
1008 if (!already_responded && pkt->cacheResponding()) {
1009 // cache-to-cache response from some upper cache:
1010 // forward response to original requester
1011 assert(pkt->isResponse());
1012 }
1013 }
1014 }
1015
1016 bool respond = false;
1017 bool blk_valid = blk && blk->isValid();
1018 if (pkt->isClean()) {
1019 if (blk_valid && blk->isDirty()) {
1020 DPRINTF(CacheVerbose, "%s: packet (snoop) %s found block: %s\n",
1021 __func__, pkt->print(), blk->print());
1022 PacketPtr wb_pkt = writecleanBlk(blk, pkt->req->getDest(), pkt->id);
1023 PacketList writebacks;
1024 writebacks.push_back(wb_pkt);
1025
1026 if (is_timing) {
1027 // anything that is merely forwarded pays for the forward
1028 // latency and the delay provided by the crossbar
1029 Tick forward_time = clockEdge(forwardLatency) +
1030 pkt->headerDelay;
1031 doWritebacks(writebacks, forward_time);
1032 } else {
1033 doWritebacksAtomic(writebacks);
1034 }
1035 pkt->setSatisfied();
1036 }
1037 } else if (!blk_valid) {
1038 DPRINTF(CacheVerbose, "%s: snoop miss for %s\n", __func__,
1039 pkt->print());
1040 if (is_deferred) {
1041 // we no longer have the block, and will not respond, but a
1042 // packet was allocated in MSHR::handleSnoop and we have
1043 // to delete it
1044 assert(pkt->needsResponse());
1045
1046 // we have passed the block to a cache upstream, that
1047 // cache should be responding
1048 assert(pkt->cacheResponding());
1049
1050 delete pkt;
1051 }
1052 return snoop_delay;
1053 } else {
1054 DPRINTF(Cache, "%s: snoop hit for %s, old state is %s\n", __func__,
1055 pkt->print(), blk->print());
1056
1057 // We may end up modifying both the block state and the packet (if
1058 // we respond in atomic mode), so just figure out what to do now
1059 // and then do it later. We respond to all snoops that need
1060 // responses provided we have the block in dirty state. The
1061 // invalidation itself is taken care of below. We don't respond to
1062 // cache maintenance operations as this is done by the destination
1063 // xbar.
1064 respond = blk->isDirty() && pkt->needsResponse();
1065
1066 chatty_assert(!(isReadOnly && blk->isDirty()), "Should never have "
1067 "a dirty block in a read-only cache %s\n", name());
1068 }
1069
1070 // Invalidate any prefetch's from below that would strip write permissions
1071 // MemCmd::HardPFReq is only observed by upstream caches. After missing
1072 // above and in it's own cache, a new MemCmd::ReadReq is created that
1073 // downstream caches observe.
1074 if (pkt->mustCheckAbove()) {
1075 DPRINTF(Cache, "Found addr %#llx in upper level cache for snoop %s "
1076 "from lower cache\n", pkt->getAddr(), pkt->print());
1077 pkt->setBlockCached();
1078 return snoop_delay;
1079 }
1080
1081 if (pkt->isRead() && !invalidate) {
1082 // reading without requiring the line in a writable state
1083 assert(!needs_writable);
1084 pkt->setHasSharers();
1085
1086 // if the requesting packet is uncacheable, retain the line in
1087 // the current state, otherwhise unset the writable flag,
1088 // which means we go from Modified to Owned (and will respond
1089 // below), remain in Owned (and will respond below), from
1090 // Exclusive to Shared, or remain in Shared
1091 if (!pkt->req->isUncacheable())
1092 blk->status &= ~BlkWritable;
1093 DPRINTF(Cache, "new state is %s\n", blk->print());
1094 }
1095
1096 if (respond) {
1097 // prevent anyone else from responding, cache as well as
1098 // memory, and also prevent any memory from even seeing the
1099 // request
1100 pkt->setCacheResponding();
1101 if (!pkt->isClean() && blk->isWritable()) {
1102 // inform the cache hierarchy that this cache had the line
1103 // in the Modified state so that we avoid unnecessary
1104 // invalidations (see Packet::setResponderHadWritable)
1105 pkt->setResponderHadWritable();
1106
1107 // in the case of an uncacheable request there is no point
1108 // in setting the responderHadWritable flag, but since the
1109 // recipient does not care there is no harm in doing so
1110 } else {
1111 // if the packet has needsWritable set we invalidate our
1112 // copy below and all other copies will be invalidates
1113 // through express snoops, and if needsWritable is not set
1114 // we already called setHasSharers above
1115 }
1116
1117 // if we are returning a writable and dirty (Modified) line,
1118 // we should be invalidating the line
1119 panic_if(!invalidate && !pkt->hasSharers(),
1120 "%s is passing a Modified line through %s, "
1121 "but keeping the block", name(), pkt->print());
1122
1123 if (is_timing) {
1124 doTimingSupplyResponse(pkt, blk->data, is_deferred, pending_inval);
1125 } else {
1126 pkt->makeAtomicResponse();
1127 // packets such as upgrades do not actually have any data
1128 // payload
1129 if (pkt->hasData())
1130 pkt->setDataFromBlock(blk->data, blkSize);
1131 }
1132
1133 // When a block is compressed, it must first be decompressed before
1134 // being read, and this increases the snoop delay.
1135 if (compressor && pkt->isRead()) {
1136 snoop_delay += compressor->getDecompressionLatency(blk);
1137 }
1138 }
1139
1140 if (!respond && is_deferred) {
1141 assert(pkt->needsResponse());
1142 delete pkt;
1143 }
1144
1145 // Do this last in case it deallocates block data or something
1146 // like that
1147 if (blk_valid && invalidate) {
1148 invalidateBlock(blk);
1149 DPRINTF(Cache, "new state is %s\n", blk->print());
1150 }
1151
1152 return snoop_delay;
1153 }
1154
1155
1156 void
1157 Cache::recvTimingSnoopReq(PacketPtr pkt)
1158 {
1159 DPRINTF(CacheVerbose, "%s: for %s\n", __func__, pkt->print());
1160
1161 // no need to snoop requests that are not in range
1162 if (!inRange(pkt->getAddr())) {
1163 return;
1164 }
1165
1166 bool is_secure = pkt->isSecure();
1167 CacheBlk *blk = tags->findBlock(pkt->getAddr(), is_secure);
1168
1169 Addr blk_addr = pkt->getBlockAddr(blkSize);
1170 MSHR *mshr = mshrQueue.findMatch(blk_addr, is_secure);
1171
1172 // Update the latency cost of the snoop so that the crossbar can
1173 // account for it. Do not overwrite what other neighbouring caches
1174 // have already done, rather take the maximum. The update is
1175 // tentative, for cases where we return before an upward snoop
1176 // happens below.
1177 pkt->snoopDelay = std::max<uint32_t>(pkt->snoopDelay,
1178 lookupLatency * clockPeriod());
1179
1180 // Inform request(Prefetch, CleanEvict or Writeback) from below of
1181 // MSHR hit, set setBlockCached.
1182 if (mshr && pkt->mustCheckAbove()) {
1183 DPRINTF(Cache, "Setting block cached for %s from lower cache on "
1184 "mshr hit\n", pkt->print());
1185 pkt->setBlockCached();
1186 return;
1187 }
1188
1189 // Let the MSHR itself track the snoop and decide whether we want
1190 // to go ahead and do the regular cache snoop
1191 if (mshr && mshr->handleSnoop(pkt, order++)) {
1192 DPRINTF(Cache, "Deferring snoop on in-service MSHR to blk %#llx (%s)."
1193 "mshrs: %s\n", blk_addr, is_secure ? "s" : "ns",
1194 mshr->print());
1195
1196 if (mshr->getNumTargets() > numTarget)
1197 warn("allocating bonus target for snoop"); //handle later
1198 return;
1199 }
1200
1201 //We also need to check the writeback buffers and handle those
1202 WriteQueueEntry *wb_entry = writeBuffer.findMatch(blk_addr, is_secure);
1203 if (wb_entry) {
1204 DPRINTF(Cache, "Snoop hit in writeback to addr %#llx (%s)\n",
1205 pkt->getAddr(), is_secure ? "s" : "ns");
1206 // Expect to see only Writebacks and/or CleanEvicts here, both of
1207 // which should not be generated for uncacheable data.
1208 assert(!wb_entry->isUncacheable());
1209 // There should only be a single request responsible for generating
1210 // Writebacks/CleanEvicts.
1211 assert(wb_entry->getNumTargets() == 1);
1212 PacketPtr wb_pkt = wb_entry->getTarget()->pkt;
1213 assert(wb_pkt->isEviction() || wb_pkt->cmd == MemCmd::WriteClean);
1214
1215 if (pkt->isEviction()) {
1216 // if the block is found in the write queue, set the BLOCK_CACHED
1217 // flag for Writeback/CleanEvict snoop. On return the snoop will
1218 // propagate the BLOCK_CACHED flag in Writeback packets and prevent
1219 // any CleanEvicts from travelling down the memory hierarchy.
1220 pkt->setBlockCached();
1221 DPRINTF(Cache, "%s: Squashing %s from lower cache on writequeue "
1222 "hit\n", __func__, pkt->print());
1223 return;
1224 }
1225
1226 // conceptually writebacks are no different to other blocks in
1227 // this cache, so the behaviour is modelled after handleSnoop,
1228 // the difference being that instead of querying the block
1229 // state to determine if it is dirty and writable, we use the
1230 // command and fields of the writeback packet
1231 bool respond = wb_pkt->cmd == MemCmd::WritebackDirty &&
1232 pkt->needsResponse();
1233 bool have_writable = !wb_pkt->hasSharers();
1234 bool invalidate = pkt->isInvalidate();
1235
1236 if (!pkt->req->isUncacheable() && pkt->isRead() && !invalidate) {
1237 assert(!pkt->needsWritable());
1238 pkt->setHasSharers();
1239 wb_pkt->setHasSharers();
1240 }
1241
1242 if (respond) {
1243 pkt->setCacheResponding();
1244
1245 if (have_writable) {
1246 pkt->setResponderHadWritable();
1247 }
1248
1249 doTimingSupplyResponse(pkt, wb_pkt->getConstPtr<uint8_t>(),
1250 false, false);
1251 }
1252
1253 if (invalidate && wb_pkt->cmd != MemCmd::WriteClean) {
1254 // Invalidation trumps our writeback... discard here
1255 // Note: markInService will remove entry from writeback buffer.
1256 markInService(wb_entry);
1257 delete wb_pkt;
1258 }
1259 }
1260
1261 // If this was a shared writeback, there may still be
1262 // other shared copies above that require invalidation.
1263 // We could be more selective and return here if the
1264 // request is non-exclusive or if the writeback is
1265 // exclusive.
1266 uint32_t snoop_delay = handleSnoop(pkt, blk, true, false, false);
1267
1268 // Override what we did when we first saw the snoop, as we now
1269 // also have the cost of the upwards snoops to account for
1270 pkt->snoopDelay = std::max<uint32_t>(pkt->snoopDelay, snoop_delay +
1271 lookupLatency * clockPeriod());
1272 }
1273
1274 Tick
1275 Cache::recvAtomicSnoop(PacketPtr pkt)
1276 {
1277 // no need to snoop requests that are not in range.
1278 if (!inRange(pkt->getAddr())) {
1279 return 0;
1280 }
1281
1282 CacheBlk *blk = tags->findBlock(pkt->getAddr(), pkt->isSecure());
1283 uint32_t snoop_delay = handleSnoop(pkt, blk, false, false, false);
1284 return snoop_delay + lookupLatency * clockPeriod();
1285 }
1286
1287 bool
1288 Cache::isCachedAbove(PacketPtr pkt, bool is_timing)
1289 {
1290 if (!forwardSnoops)
1291 return false;
1292 // Mirroring the flow of HardPFReqs, the cache sends CleanEvict and
1293 // Writeback snoops into upper level caches to check for copies of the
1294 // same block. Using the BLOCK_CACHED flag with the Writeback/CleanEvict
1295 // packet, the cache can inform the crossbar below of presence or absence
1296 // of the block.
1297 if (is_timing) {
1298 Packet snoop_pkt(pkt, true, false);
1299 snoop_pkt.setExpressSnoop();
1300 // Assert that packet is either Writeback or CleanEvict and not a
1301 // prefetch request because prefetch requests need an MSHR and may
1302 // generate a snoop response.
1303 assert(pkt->isEviction() || pkt->cmd == MemCmd::WriteClean);
1304 snoop_pkt.senderState = nullptr;
1305 cpuSidePort.sendTimingSnoopReq(&snoop_pkt);
1306 // Writeback/CleanEvict snoops do not generate a snoop response.
1307 assert(!(snoop_pkt.cacheResponding()));
1308 return snoop_pkt.isBlockCached();
1309 } else {
1310 cpuSidePort.sendAtomicSnoop(pkt);
1311 return pkt->isBlockCached();
1312 }
1313 }
1314
1315 bool
1316 Cache::sendMSHRQueuePacket(MSHR* mshr)
1317 {
1318 assert(mshr);
1319
1320 // use request from 1st target
1321 PacketPtr tgt_pkt = mshr->getTarget()->pkt;
1322
1323 if (tgt_pkt->cmd == MemCmd::HardPFReq && forwardSnoops) {
1324 DPRINTF(Cache, "%s: MSHR %s\n", __func__, tgt_pkt->print());
1325
1326 // we should never have hardware prefetches to allocated
1327 // blocks
1328 assert(!tags->findBlock(mshr->blkAddr, mshr->isSecure));
1329
1330 // We need to check the caches above us to verify that
1331 // they don't have a copy of this block in the dirty state
1332 // at the moment. Without this check we could get a stale
1333 // copy from memory that might get used in place of the
1334 // dirty one.
1335 Packet snoop_pkt(tgt_pkt, true, false);
1336 snoop_pkt.setExpressSnoop();
1337 // We are sending this packet upwards, but if it hits we will
1338 // get a snoop response that we end up treating just like a
1339 // normal response, hence it needs the MSHR as its sender
1340 // state
1341 snoop_pkt.senderState = mshr;
1342 cpuSidePort.sendTimingSnoopReq(&snoop_pkt);
1343
1344 // Check to see if the prefetch was squashed by an upper cache (to
1345 // prevent us from grabbing the line) or if a Check to see if a
1346 // writeback arrived between the time the prefetch was placed in
1347 // the MSHRs and when it was selected to be sent or if the
1348 // prefetch was squashed by an upper cache.
1349
1350 // It is important to check cacheResponding before
1351 // prefetchSquashed. If another cache has committed to
1352 // responding, it will be sending a dirty response which will
1353 // arrive at the MSHR allocated for this request. Checking the
1354 // prefetchSquash first may result in the MSHR being
1355 // prematurely deallocated.
1356 if (snoop_pkt.cacheResponding()) {
1357 auto M5_VAR_USED r = outstandingSnoop.insert(snoop_pkt.req);
1358 assert(r.second);
1359
1360 // if we are getting a snoop response with no sharers it
1361 // will be allocated as Modified
1362 bool pending_modified_resp = !snoop_pkt.hasSharers();
1363 markInService(mshr, pending_modified_resp);
1364
1365 DPRINTF(Cache, "Upward snoop of prefetch for addr"
1366 " %#x (%s) hit\n",
1367 tgt_pkt->getAddr(), tgt_pkt->isSecure()? "s": "ns");
1368 return false;
1369 }
1370
1371 if (snoop_pkt.isBlockCached()) {
1372 DPRINTF(Cache, "Block present, prefetch squashed by cache. "
1373 "Deallocating mshr target %#x.\n",
1374 mshr->blkAddr);
1375
1376 // Deallocate the mshr target
1377 if (mshrQueue.forceDeallocateTarget(mshr)) {
1378 // Clear block if this deallocation resulted freed an
1379 // mshr when all had previously been utilized
1380 clearBlocked(Blocked_NoMSHRs);
1381 }
1382
1383 // given that no response is expected, delete Request and Packet
1384 delete tgt_pkt;
1385
1386 return false;
1387 }
1388 }
1389
1390 return BaseCache::sendMSHRQueuePacket(mshr);
1391 }
1392
1393 Cache*
1394 CacheParams::create()
1395 {
1396 assert(tags);
1397 assert(replacement_policy);
1398
1399 return new Cache(this);
1400 }