2 * Copyright (c) 2010-2016 ARM Limited
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder. You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated
11 * unmodified and in its entirety in all distributions of the software,
12 * modified or unmodified, in source code or in binary form.
14 * Copyright (c) 2002-2005 The Regents of The University of Michigan
15 * Copyright (c) 2010,2015 Advanced Micro Devices, Inc.
16 * All rights reserved.
18 * Redistribution and use in source and binary forms, with or without
19 * modification, are permitted provided that the following conditions are
20 * met: redistributions of source code must retain the above copyright
21 * notice, this list of conditions and the following disclaimer;
22 * redistributions in binary form must reproduce the above copyright
23 * notice, this list of conditions and the following disclaimer in the
24 * documentation and/or other materials provided with the distribution;
25 * neither the name of the copyright holders nor the names of its
26 * contributors may be used to endorse or promote products derived from
27 * this software without specific prior written permission.
29 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
30 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
31 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
32 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
33 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
34 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
35 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
36 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
37 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
38 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
39 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
41 * Authors: Erik Hallnor
54 #include "mem/cache/cache.hh"
56 #include "base/misc.hh"
57 #include "base/types.hh"
58 #include "debug/Cache.hh"
59 #include "debug/CachePort.hh"
60 #include "debug/CacheTags.hh"
61 #include "debug/CacheVerbose.hh"
62 #include "mem/cache/blk.hh"
63 #include "mem/cache/mshr.hh"
64 #include "mem/cache/prefetch/base.hh"
65 #include "sim/sim_exit.hh"
67 Cache::Cache(const CacheParams
*p
)
68 : BaseCache(p
, p
->system
->cacheLineSize()),
70 prefetcher(p
->prefetcher
),
72 prefetchOnAccess(p
->prefetch_on_access
),
73 clusivity(p
->clusivity
),
74 writebackClean(p
->writeback_clean
),
75 tempBlockWriteback(nullptr),
76 writebackTempBlockAtomicEvent(this, false,
77 EventBase::Delayed_Writeback_Pri
)
79 tempBlock
= new CacheBlk();
80 tempBlock
->data
= new uint8_t[blkSize
];
82 cpuSidePort
= new CpuSidePort(p
->name
+ ".cpu_side", this,
84 memSidePort
= new MemSidePort(p
->name
+ ".mem_side", this,
89 prefetcher
->setCache(this);
94 delete [] tempBlock
->data
;
104 BaseCache::regStats();
108 Cache::cmpAndSwap(CacheBlk
*blk
, PacketPtr pkt
)
110 assert(pkt
->isRequest());
112 uint64_t overwrite_val
;
114 uint64_t condition_val64
;
115 uint32_t condition_val32
;
117 int offset
= tags
->extractBlkOffset(pkt
->getAddr());
118 uint8_t *blk_data
= blk
->data
+ offset
;
120 assert(sizeof(uint64_t) >= pkt
->getSize());
122 overwrite_mem
= true;
123 // keep a copy of our possible write value, and copy what is at the
124 // memory address into the packet
125 pkt
->writeData((uint8_t *)&overwrite_val
);
126 pkt
->setData(blk_data
);
128 if (pkt
->req
->isCondSwap()) {
129 if (pkt
->getSize() == sizeof(uint64_t)) {
130 condition_val64
= pkt
->req
->getExtraData();
131 overwrite_mem
= !std::memcmp(&condition_val64
, blk_data
,
133 } else if (pkt
->getSize() == sizeof(uint32_t)) {
134 condition_val32
= (uint32_t)pkt
->req
->getExtraData();
135 overwrite_mem
= !std::memcmp(&condition_val32
, blk_data
,
138 panic("Invalid size for conditional read/write\n");
142 std::memcpy(blk_data
, &overwrite_val
, pkt
->getSize());
143 blk
->status
|= BlkDirty
;
149 Cache::satisfyRequest(PacketPtr pkt
, CacheBlk
*blk
,
150 bool deferred_response
, bool pending_downgrade
)
152 assert(pkt
->isRequest());
154 assert(blk
&& blk
->isValid());
155 // Occasionally this is not true... if we are a lower-level cache
156 // satisfying a string of Read and ReadEx requests from
157 // upper-level caches, a Read will mark the block as shared but we
158 // can satisfy a following ReadEx anyway since we can rely on the
159 // Read requester(s) to have buffered the ReadEx snoop and to
160 // invalidate their blocks after receiving them.
161 // assert(!pkt->needsWritable() || blk->isWritable());
162 assert(pkt
->getOffset(blkSize
) + pkt
->getSize() <= blkSize
);
164 // Check RMW operations first since both isRead() and
165 // isWrite() will be true for them
166 if (pkt
->cmd
== MemCmd::SwapReq
) {
167 cmpAndSwap(blk
, pkt
);
168 } else if (pkt
->isWrite()) {
169 // we have the block in a writable state and can go ahead,
170 // note that the line may be also be considered writable in
171 // downstream caches along the path to memory, but always
172 // Exclusive, and never Modified
173 assert(blk
->isWritable());
174 // Write or WriteLine at the first cache with block in writable state
175 if (blk
->checkWrite(pkt
)) {
176 pkt
->writeDataToBlock(blk
->data
, blkSize
);
178 // Always mark the line as dirty (and thus transition to the
179 // Modified state) even if we are a failed StoreCond so we
180 // supply data to any snoops that have appended themselves to
181 // this cache before knowing the store will fail.
182 blk
->status
|= BlkDirty
;
183 DPRINTF(CacheVerbose
, "%s for %s (write)\n", __func__
, pkt
->print());
184 } else if (pkt
->isRead()) {
186 blk
->trackLoadLocked(pkt
);
189 // all read responses have a data payload
190 assert(pkt
->hasRespData());
191 pkt
->setDataFromBlock(blk
->data
, blkSize
);
193 // determine if this read is from a (coherent) cache or not
194 if (pkt
->fromCache()) {
195 assert(pkt
->getSize() == blkSize
);
196 // special handling for coherent block requests from
197 // upper-level caches
198 if (pkt
->needsWritable()) {
200 assert(pkt
->cmd
== MemCmd::ReadExReq
||
201 pkt
->cmd
== MemCmd::SCUpgradeFailReq
);
202 assert(!pkt
->hasSharers());
204 // if we have a dirty copy, make sure the recipient
205 // keeps it marked dirty (in the modified state)
206 if (blk
->isDirty()) {
207 pkt
->setCacheResponding();
208 blk
->status
&= ~BlkDirty
;
210 } else if (blk
->isWritable() && !pending_downgrade
&&
211 !pkt
->hasSharers() &&
212 pkt
->cmd
!= MemCmd::ReadCleanReq
) {
213 // we can give the requester a writable copy on a read
215 // - we have a writable copy at this level (& below)
216 // - we don't have a pending snoop from below
217 // signaling another read request
218 // - no other cache above has a copy (otherwise it
219 // would have set hasSharers flag when
220 // snooping the packet)
221 // - the read has explicitly asked for a clean
223 if (blk
->isDirty()) {
224 // special considerations if we're owner:
225 if (!deferred_response
) {
226 // respond with the line in Modified state
227 // (cacheResponding set, hasSharers not set)
228 pkt
->setCacheResponding();
230 // if this cache is mostly inclusive, we
231 // keep the block in the Exclusive state,
232 // and pass it upwards as Modified
233 // (writable and dirty), hence we have
234 // multiple caches, all on the same path
235 // towards memory, all considering the
236 // same block writable, but only one
237 // considering it Modified
239 // we get away with multiple caches (on
240 // the same path to memory) considering
241 // the block writeable as we always enter
242 // the cache hierarchy through a cache,
243 // and first snoop upwards in all other
245 blk
->status
&= ~BlkDirty
;
247 // if we're responding after our own miss,
248 // there's a window where the recipient didn't
249 // know it was getting ownership and may not
250 // have responded to snoops correctly, so we
251 // have to respond with a shared line
252 pkt
->setHasSharers();
256 // otherwise only respond with a shared copy
257 pkt
->setHasSharers();
260 } else if (pkt
->isUpgrade()) {
262 assert(!pkt
->hasSharers());
264 if (blk
->isDirty()) {
265 // we were in the Owned state, and a cache above us that
266 // has the line in Shared state needs to be made aware
267 // that the data it already has is in fact dirty
268 pkt
->setCacheResponding();
269 blk
->status
&= ~BlkDirty
;
272 assert(pkt
->isInvalidate());
273 invalidateBlock(blk
);
274 DPRINTF(CacheVerbose
, "%s for %s (invalidation)\n", __func__
,
279 /////////////////////////////////////////////////////
281 // Access path: requests coming in from the CPU side
283 /////////////////////////////////////////////////////
286 Cache::access(PacketPtr pkt
, CacheBlk
*&blk
, Cycles
&lat
,
287 PacketList
&writebacks
)
290 assert(pkt
->isRequest());
292 chatty_assert(!(isReadOnly
&& pkt
->isWrite()),
293 "Should never see a write in a read-only cache %s\n",
296 DPRINTF(CacheVerbose
, "%s for %s\n", __func__
, pkt
->print());
298 if (pkt
->req
->isUncacheable()) {
299 DPRINTF(Cache
, "uncacheable: %s\n", pkt
->print());
301 // flush and invalidate any existing block
302 CacheBlk
*old_blk(tags
->findBlock(pkt
->getAddr(), pkt
->isSecure()));
303 if (old_blk
&& old_blk
->isValid()) {
304 if (old_blk
->isDirty() || writebackClean
)
305 writebacks
.push_back(writebackBlk(old_blk
));
307 writebacks
.push_back(cleanEvictBlk(old_blk
));
308 invalidateBlock(old_blk
);
312 // lookupLatency is the latency in case the request is uncacheable.
317 // Here lat is the value passed as parameter to accessBlock() function
318 // that can modify its value.
319 blk
= tags
->accessBlock(pkt
->getAddr(), pkt
->isSecure(), lat
);
321 DPRINTF(Cache
, "%s %s\n", pkt
->print(),
322 blk
? "hit " + blk
->print() : "miss");
325 if (pkt
->isEviction()) {
326 // We check for presence of block in above caches before issuing
327 // Writeback or CleanEvict to write buffer. Therefore the only
328 // possible cases can be of a CleanEvict packet coming from above
329 // encountering a Writeback generated in this cache peer cache and
330 // waiting in the write buffer. Cases of upper level peer caches
331 // generating CleanEvict and Writeback or simply CleanEvict and
332 // CleanEvict almost simultaneously will be caught by snoops sent out
334 WriteQueueEntry
*wb_entry
= writeBuffer
.findMatch(pkt
->getAddr(),
337 assert(wb_entry
->getNumTargets() == 1);
338 PacketPtr wbPkt
= wb_entry
->getTarget()->pkt
;
339 assert(wbPkt
->isWriteback());
341 if (pkt
->isCleanEviction()) {
342 // The CleanEvict and WritebackClean snoops into other
343 // peer caches of the same level while traversing the
344 // crossbar. If a copy of the block is found, the
345 // packet is deleted in the crossbar. Hence, none of
346 // the other upper level caches connected to this
347 // cache have the block, so we can clear the
348 // BLOCK_CACHED flag in the Writeback if set and
349 // discard the CleanEvict by returning true.
350 wbPkt
->clearBlockCached();
353 assert(pkt
->cmd
== MemCmd::WritebackDirty
);
354 // Dirty writeback from above trumps our clean
355 // writeback... discard here
356 // Note: markInService will remove entry from writeback buffer.
357 markInService(wb_entry
);
363 // Writeback handling is special case. We can write the block into
364 // the cache without having a writeable copy (or any copy at all).
365 if (pkt
->isWriteback()) {
366 assert(blkSize
== pkt
->getSize());
368 // we could get a clean writeback while we are having
369 // outstanding accesses to a block, do the simple thing for
370 // now and drop the clean writeback so that we do not upset
371 // any ordering/decisions about ownership already taken
372 if (pkt
->cmd
== MemCmd::WritebackClean
&&
373 mshrQueue
.findMatch(pkt
->getAddr(), pkt
->isSecure())) {
374 DPRINTF(Cache
, "Clean writeback %#llx to block with MSHR, "
375 "dropping\n", pkt
->getAddr());
379 if (blk
== nullptr) {
380 // need to do a replacement
381 blk
= allocateBlock(pkt
->getAddr(), pkt
->isSecure(), writebacks
);
382 if (blk
== nullptr) {
383 // no replaceable block available: give up, fwd to next level.
387 tags
->insertBlock(pkt
, blk
);
389 blk
->status
= (BlkValid
| BlkReadable
);
390 if (pkt
->isSecure()) {
391 blk
->status
|= BlkSecure
;
394 // only mark the block dirty if we got a writeback command,
395 // and leave it as is for a clean writeback
396 if (pkt
->cmd
== MemCmd::WritebackDirty
) {
397 blk
->status
|= BlkDirty
;
399 // if the packet does not have sharers, it is passing
400 // writable, and we got the writeback in Modified or Exclusive
401 // state, if not we are in the Owned or Shared state
402 if (!pkt
->hasSharers()) {
403 blk
->status
|= BlkWritable
;
405 // nothing else to do; writeback doesn't expect response
406 assert(!pkt
->needsResponse());
407 std::memcpy(blk
->data
, pkt
->getConstPtr
<uint8_t>(), blkSize
);
408 DPRINTF(Cache
, "%s new state is %s\n", __func__
, blk
->print());
411 } else if (pkt
->cmd
== MemCmd::CleanEvict
) {
412 if (blk
!= nullptr) {
413 // Found the block in the tags, need to stop CleanEvict from
414 // propagating further down the hierarchy. Returning true will
415 // treat the CleanEvict like a satisfied write request and delete
419 // We didn't find the block here, propagate the CleanEvict further
420 // down the memory hierarchy. Returning false will treat the CleanEvict
421 // like a Writeback which could not find a replaceable block so has to
424 } else if (blk
&& (pkt
->needsWritable() ? blk
->isWritable() :
425 blk
->isReadable())) {
426 // OK to satisfy access
428 satisfyRequest(pkt
, blk
);
429 maintainClusivity(pkt
->fromCache(), blk
);
434 // Can't satisfy access normally... either no block (blk == nullptr)
435 // or have block but need writable
439 if (blk
== nullptr && pkt
->isLLSC() && pkt
->isWrite()) {
440 // complete miss on store conditional... just give up now
441 pkt
->req
->setExtraData(0);
449 Cache::maintainClusivity(bool from_cache
, CacheBlk
*blk
)
451 if (from_cache
&& blk
&& blk
->isValid() && !blk
->isDirty() &&
452 clusivity
== Enums::mostly_excl
) {
453 // if we have responded to a cache, and our block is still
454 // valid, but not dirty, and this cache is mostly exclusive
455 // with respect to the cache above, drop the block
456 invalidateBlock(blk
);
461 Cache::doWritebacks(PacketList
& writebacks
, Tick forward_time
)
463 while (!writebacks
.empty()) {
464 PacketPtr wbPkt
= writebacks
.front();
465 // We use forwardLatency here because we are copying writebacks to
466 // write buffer. Call isCachedAbove for both Writebacks and
467 // CleanEvicts. If isCachedAbove returns true we set BLOCK_CACHED flag
468 // in Writebacks and discard CleanEvicts.
469 if (isCachedAbove(wbPkt
)) {
470 if (wbPkt
->cmd
== MemCmd::CleanEvict
) {
471 // Delete CleanEvict because cached copies exist above. The
472 // packet destructor will delete the request object because
473 // this is a non-snoop request packet which does not require a
476 } else if (wbPkt
->cmd
== MemCmd::WritebackClean
) {
477 // clean writeback, do not send since the block is
478 // still cached above
479 assert(writebackClean
);
482 assert(wbPkt
->cmd
== MemCmd::WritebackDirty
);
483 // Set BLOCK_CACHED flag in Writeback and send below, so that
484 // the Writeback does not reset the bit corresponding to this
485 // address in the snoop filter below.
486 wbPkt
->setBlockCached();
487 allocateWriteBuffer(wbPkt
, forward_time
);
490 // If the block is not cached above, send packet below. Both
491 // CleanEvict and Writeback with BLOCK_CACHED flag cleared will
492 // reset the bit corresponding to this address in the snoop filter
494 allocateWriteBuffer(wbPkt
, forward_time
);
496 writebacks
.pop_front();
501 Cache::doWritebacksAtomic(PacketList
& writebacks
)
503 while (!writebacks
.empty()) {
504 PacketPtr wbPkt
= writebacks
.front();
505 // Call isCachedAbove for both Writebacks and CleanEvicts. If
506 // isCachedAbove returns true we set BLOCK_CACHED flag in Writebacks
507 // and discard CleanEvicts.
508 if (isCachedAbove(wbPkt
, false)) {
509 if (wbPkt
->cmd
== MemCmd::WritebackDirty
) {
510 // Set BLOCK_CACHED flag in Writeback and send below,
511 // so that the Writeback does not reset the bit
512 // corresponding to this address in the snoop filter
513 // below. We can discard CleanEvicts because cached
514 // copies exist above. Atomic mode isCachedAbove
515 // modifies packet to set BLOCK_CACHED flag
516 memSidePort
->sendAtomic(wbPkt
);
519 // If the block is not cached above, send packet below. Both
520 // CleanEvict and Writeback with BLOCK_CACHED flag cleared will
521 // reset the bit corresponding to this address in the snoop filter
523 memSidePort
->sendAtomic(wbPkt
);
525 writebacks
.pop_front();
526 // In case of CleanEvicts, the packet destructor will delete the
527 // request object because this is a non-snoop request packet which
528 // does not require a response.
535 Cache::recvTimingSnoopResp(PacketPtr pkt
)
537 DPRINTF(Cache
, "%s for %s\n", __func__
, pkt
->print());
539 assert(pkt
->isResponse());
540 assert(!system
->bypassCaches());
542 // determine if the response is from a snoop request we created
543 // (in which case it should be in the outstandingSnoop), or if we
544 // merely forwarded someone else's snoop request
545 const bool forwardAsSnoop
= outstandingSnoop
.find(pkt
->req
) ==
546 outstandingSnoop
.end();
548 if (!forwardAsSnoop
) {
549 // the packet came from this cache, so sink it here and do not
551 assert(pkt
->cmd
== MemCmd::HardPFResp
);
553 outstandingSnoop
.erase(pkt
->req
);
555 DPRINTF(Cache
, "Got prefetch response from above for addr "
556 "%#llx (%s)\n", pkt
->getAddr(), pkt
->isSecure() ? "s" : "ns");
561 // forwardLatency is set here because there is a response from an
562 // upper level cache.
563 // To pay the delay that occurs if the packet comes from the bus,
564 // we charge also headerDelay.
565 Tick snoop_resp_time
= clockEdge(forwardLatency
) + pkt
->headerDelay
;
566 // Reset the timing of the packet.
567 pkt
->headerDelay
= pkt
->payloadDelay
= 0;
568 memSidePort
->schedTimingSnoopResp(pkt
, snoop_resp_time
);
572 Cache::promoteWholeLineWrites(PacketPtr pkt
)
574 // Cache line clearing instructions
575 if (doFastWrites
&& (pkt
->cmd
== MemCmd::WriteReq
) &&
576 (pkt
->getSize() == blkSize
) && (pkt
->getOffset(blkSize
) == 0)) {
577 pkt
->cmd
= MemCmd::WriteLineReq
;
578 DPRINTF(Cache
, "packet promoted from Write to WriteLineReq\n");
583 Cache::recvTimingReq(PacketPtr pkt
)
585 DPRINTF(CacheTags
, "%s tags:\n%s\n", __func__
, tags
->print());
587 assert(pkt
->isRequest());
589 // Just forward the packet if caches are disabled.
590 if (system
->bypassCaches()) {
591 // @todo This should really enqueue the packet rather
592 bool M5_VAR_USED success
= memSidePort
->sendTimingReq(pkt
);
597 promoteWholeLineWrites(pkt
);
599 if (pkt
->cacheResponding()) {
600 // a cache above us (but not where the packet came from) is
601 // responding to the request, in other words it has the line
602 // in Modified or Owned state
603 DPRINTF(Cache
, "Cache above responding to %s: not responding\n",
606 // if the packet needs the block to be writable, and the cache
607 // that has promised to respond (setting the cache responding
608 // flag) is not providing writable (it is in Owned rather than
609 // the Modified state), we know that there may be other Shared
610 // copies in the system; go out and invalidate them all
611 assert(pkt
->needsWritable() && !pkt
->responderHadWritable());
613 // an upstream cache that had the line in Owned state
614 // (dirty, but not writable), is responding and thus
615 // transferring the dirty line from one branch of the
616 // cache hierarchy to another
618 // send out an express snoop and invalidate all other
619 // copies (snooping a packet that needs writable is the
620 // same as an invalidation), thus turning the Owned line
621 // into a Modified line, note that we don't invalidate the
622 // block in the current cache or any other cache on the
625 // create a downstream express snoop with cleared packet
626 // flags, there is no need to allocate any data as the
627 // packet is merely used to co-ordinate state transitions
628 Packet
*snoop_pkt
= new Packet(pkt
, true, false);
630 // also reset the bus time that the original packet has
632 snoop_pkt
->headerDelay
= snoop_pkt
->payloadDelay
= 0;
634 // make this an instantaneous express snoop, and let the
635 // other caches in the system know that the another cache
636 // is responding, because we have found the authorative
637 // copy (Modified or Owned) that will supply the right
639 snoop_pkt
->setExpressSnoop();
640 snoop_pkt
->setCacheResponding();
642 // this express snoop travels towards the memory, and at
643 // every crossbar it is snooped upwards thus reaching
644 // every cache in the system
645 bool M5_VAR_USED success
= memSidePort
->sendTimingReq(snoop_pkt
);
646 // express snoops always succeed
649 // main memory will delete the snoop packet
651 // queue for deletion, as opposed to immediate deletion, as
652 // the sending cache is still relying on the packet
653 pendingDelete
.reset(pkt
);
655 // no need to take any further action in this particular cache
656 // as an upstram cache has already committed to responding,
657 // and we have already sent out any express snoops in the
658 // section above to ensure all other copies in the system are
663 // anything that is merely forwarded pays for the forward latency and
664 // the delay provided by the crossbar
665 Tick forward_time
= clockEdge(forwardLatency
) + pkt
->headerDelay
;
667 // We use lookupLatency here because it is used to specify the latency
669 Cycles lat
= lookupLatency
;
670 CacheBlk
*blk
= nullptr;
671 bool satisfied
= false;
673 PacketList writebacks
;
674 // Note that lat is passed by reference here. The function
675 // access() calls accessBlock() which can modify lat value.
676 satisfied
= access(pkt
, blk
, lat
, writebacks
);
678 // copy writebacks to write buffer here to ensure they logically
679 // proceed anything happening below
680 doWritebacks(writebacks
, forward_time
);
683 // Here we charge the headerDelay that takes into account the latencies
684 // of the bus, if the packet comes from it.
685 // The latency charged it is just lat that is the value of lookupLatency
686 // modified by access() function, or if not just lookupLatency.
687 // In case of a hit we are neglecting response latency.
688 // In case of a miss we are neglecting forward latency.
689 Tick request_time
= clockEdge(lat
) + pkt
->headerDelay
;
690 // Here we reset the timing of the packet.
691 pkt
->headerDelay
= pkt
->payloadDelay
= 0;
693 // track time of availability of next prefetch, if any
694 Tick next_pf_time
= MaxTick
;
696 bool needsResponse
= pkt
->needsResponse();
699 // should never be satisfying an uncacheable access as we
700 // flush and invalidate any existing block as part of the
702 assert(!pkt
->req
->isUncacheable());
704 // hit (for all other request types)
706 if (prefetcher
&& (prefetchOnAccess
||
707 (blk
&& blk
->wasPrefetched()))) {
709 blk
->status
&= ~BlkHWPrefetched
;
711 // Don't notify on SWPrefetch
712 if (!pkt
->cmd
.isSWPrefetch())
713 next_pf_time
= prefetcher
->notify(pkt
);
717 pkt
->makeTimingResponse();
718 // @todo: Make someone pay for this
719 pkt
->headerDelay
= pkt
->payloadDelay
= 0;
721 // In this case we are considering request_time that takes
722 // into account the delay of the xbar, if any, and just
723 // lat, neglecting responseLatency, modelling hit latency
724 // just as lookupLatency or or the value of lat overriden
725 // by access(), that calls accessBlock() function.
726 cpuSidePort
->schedTimingResp(pkt
, request_time
, true);
728 DPRINTF(Cache
, "%s satisfied %s, no response needed\n", __func__
,
731 // queue the packet for deletion, as the sending cache is
732 // still relying on it; if the block is found in access(),
733 // CleanEvict and Writeback messages will be deleted
735 pendingDelete
.reset(pkt
);
740 Addr blk_addr
= blockAlign(pkt
->getAddr());
742 // ignore any existing MSHR if we are dealing with an
743 // uncacheable request
744 MSHR
*mshr
= pkt
->req
->isUncacheable() ? nullptr :
745 mshrQueue
.findMatch(blk_addr
, pkt
->isSecure());
747 // Software prefetch handling:
748 // To keep the core from waiting on data it won't look at
749 // anyway, send back a response with dummy data. Miss handling
750 // will continue asynchronously. Unfortunately, the core will
751 // insist upon freeing original Packet/Request, so we have to
752 // create a new pair with a different lifecycle. Note that this
753 // processing happens before any MSHR munging on the behalf of
754 // this request because this new Request will be the one stored
755 // into the MSHRs, not the original.
756 if (pkt
->cmd
.isSWPrefetch()) {
757 assert(needsResponse
);
758 assert(pkt
->req
->hasPaddr());
759 assert(!pkt
->req
->isUncacheable());
761 // There's no reason to add a prefetch as an additional target
762 // to an existing MSHR. If an outstanding request is already
763 // in progress, there is nothing for the prefetch to do.
764 // If this is the case, we don't even create a request at all.
765 PacketPtr pf
= nullptr;
768 // copy the request and create a new SoftPFReq packet
769 RequestPtr req
= new Request(pkt
->req
->getPaddr(),
771 pkt
->req
->getFlags(),
772 pkt
->req
->masterId());
773 pf
= new Packet(req
, pkt
->cmd
);
775 assert(pf
->getAddr() == pkt
->getAddr());
776 assert(pf
->getSize() == pkt
->getSize());
779 pkt
->makeTimingResponse();
781 // request_time is used here, taking into account lat and the delay
782 // charged if the packet comes from the xbar.
783 cpuSidePort
->schedTimingResp(pkt
, request_time
, true);
785 // If an outstanding request is in progress (we found an
786 // MSHR) this is set to null
792 /// @note writebacks will be checked in getNextMSHR()
793 /// for any conflicting requests to the same block
795 //@todo remove hw_pf here
797 // Coalesce unless it was a software prefetch (see above).
799 assert(!pkt
->isWriteback());
800 // CleanEvicts corresponding to blocks which have
801 // outstanding requests in MSHRs are simply sunk here
802 if (pkt
->cmd
== MemCmd::CleanEvict
) {
803 pendingDelete
.reset(pkt
);
805 DPRINTF(Cache
, "%s coalescing MSHR for %s\n", __func__
,
808 assert(pkt
->req
->masterId() < system
->maxMasters());
809 mshr_hits
[pkt
->cmdToIndex()][pkt
->req
->masterId()]++;
810 // We use forward_time here because it is the same
811 // considering new targets. We have multiple
812 // requests for the same address here. It
813 // specifies the latency to allocate an internal
814 // buffer and to schedule an event to the queued
815 // port and also takes into account the additional
816 // delay of the xbar.
817 mshr
->allocateTarget(pkt
, forward_time
, order
++,
818 allocOnFill(pkt
->cmd
));
819 if (mshr
->getNumTargets() == numTarget
) {
821 setBlocked(Blocked_NoTargets
);
822 // need to be careful with this... if this mshr isn't
823 // ready yet (i.e. time > curTick()), we don't want to
824 // move it ahead of mshrs that are ready
825 // mshrQueue.moveToFront(mshr);
828 // We should call the prefetcher reguardless if the request is
829 // satisfied or not, reguardless if the request is in the MSHR
830 // or not. The request could be a ReadReq hit, but still not
831 // satisfied (potentially because of a prior write to the same
832 // cache line. So, even when not satisfied, tehre is an MSHR
833 // already allocated for this, we need to let the prefetcher
834 // know about the request
836 // Don't notify on SWPrefetch
837 if (!pkt
->cmd
.isSWPrefetch())
838 next_pf_time
= prefetcher
->notify(pkt
);
843 assert(pkt
->req
->masterId() < system
->maxMasters());
844 if (pkt
->req
->isUncacheable()) {
845 mshr_uncacheable
[pkt
->cmdToIndex()][pkt
->req
->masterId()]++;
847 mshr_misses
[pkt
->cmdToIndex()][pkt
->req
->masterId()]++;
850 if (pkt
->isEviction() ||
851 (pkt
->req
->isUncacheable() && pkt
->isWrite())) {
852 // We use forward_time here because there is an
853 // uncached memory write, forwarded to WriteBuffer.
854 allocateWriteBuffer(pkt
, forward_time
);
856 if (blk
&& blk
->isValid()) {
857 // should have flushed and have no valid block
858 assert(!pkt
->req
->isUncacheable());
860 // If we have a write miss to a valid block, we
861 // need to mark the block non-readable. Otherwise
862 // if we allow reads while there's an outstanding
863 // write miss, the read could return stale data
864 // out of the cache block... a more aggressive
865 // system could detect the overlap (if any) and
866 // forward data out of the MSHRs, but we don't do
867 // that yet. Note that we do need to leave the
868 // block valid so that it stays in the cache, in
869 // case we get an upgrade response (and hence no
870 // new data) when the write miss completes.
871 // As long as CPUs do proper store/load forwarding
872 // internally, and have a sufficiently weak memory
873 // model, this is probably unnecessary, but at some
874 // point it must have seemed like we needed it...
875 assert(pkt
->needsWritable());
876 assert(!blk
->isWritable());
877 blk
->status
&= ~BlkReadable
;
879 // Here we are using forward_time, modelling the latency of
880 // a miss (outbound) just as forwardLatency, neglecting the
881 // lookupLatency component.
882 allocateMissBuffer(pkt
, forward_time
);
886 // Don't notify on SWPrefetch
887 if (!pkt
->cmd
.isSWPrefetch())
888 next_pf_time
= prefetcher
->notify(pkt
);
893 if (next_pf_time
!= MaxTick
)
894 schedMemSideSendEvent(next_pf_time
);
900 Cache::createMissPacket(PacketPtr cpu_pkt
, CacheBlk
*blk
,
901 bool needsWritable
) const
903 // should never see evictions here
904 assert(!cpu_pkt
->isEviction());
906 bool blkValid
= blk
&& blk
->isValid();
908 if (cpu_pkt
->req
->isUncacheable() ||
909 (!blkValid
&& cpu_pkt
->isUpgrade()) ||
910 cpu_pkt
->cmd
== MemCmd::InvalidateReq
) {
911 // uncacheable requests and upgrades from upper-level caches
912 // that missed completely just go through as is
916 assert(cpu_pkt
->needsResponse());
919 // @TODO make useUpgrades a parameter.
920 // Note that ownership protocols require upgrade, otherwise a
921 // write miss on a shared owned block will generate a ReadExcl,
922 // which will clobber the owned copy.
923 const bool useUpgrades
= true;
924 if (cpu_pkt
->cmd
== MemCmd::WriteLineReq
) {
925 assert(!blkValid
|| !blk
->isWritable());
926 // forward as invalidate to all other caches, this gives us
927 // the line in Exclusive state, and invalidates all other
929 cmd
= MemCmd::InvalidateReq
;
930 } else if (blkValid
&& useUpgrades
) {
931 // only reason to be here is that blk is read only and we need
933 assert(needsWritable
);
934 assert(!blk
->isWritable());
935 cmd
= cpu_pkt
->isLLSC() ? MemCmd::SCUpgradeReq
: MemCmd::UpgradeReq
;
936 } else if (cpu_pkt
->cmd
== MemCmd::SCUpgradeFailReq
||
937 cpu_pkt
->cmd
== MemCmd::StoreCondFailReq
) {
938 // Even though this SC will fail, we still need to send out the
939 // request and get the data to supply it to other snoopers in the case
940 // where the determination the StoreCond fails is delayed due to
941 // all caches not being on the same local bus.
942 cmd
= MemCmd::SCUpgradeFailReq
;
945 cmd
= needsWritable
? MemCmd::ReadExReq
:
946 (isReadOnly
? MemCmd::ReadCleanReq
: MemCmd::ReadSharedReq
);
948 PacketPtr pkt
= new Packet(cpu_pkt
->req
, cmd
, blkSize
);
950 // if there are upstream caches that have already marked the
951 // packet as having sharers (not passing writable), pass that info
953 if (cpu_pkt
->hasSharers() && !needsWritable
) {
954 // note that cpu_pkt may have spent a considerable time in the
955 // MSHR queue and that the information could possibly be out
956 // of date, however, there is no harm in conservatively
957 // assuming the block has sharers
958 pkt
->setHasSharers();
959 DPRINTF(Cache
, "%s: passing hasSharers from %s to %s\n",
960 __func__
, cpu_pkt
->print(), pkt
->print());
963 // the packet should be block aligned
964 assert(pkt
->getAddr() == blockAlign(pkt
->getAddr()));
967 DPRINTF(Cache
, "%s: created %s from %s\n", __func__
, pkt
->print(),
974 Cache::recvAtomic(PacketPtr pkt
)
976 // We are in atomic mode so we pay just for lookupLatency here.
977 Cycles lat
= lookupLatency
;
979 // Forward the request if the system is in cache bypass mode.
980 if (system
->bypassCaches())
981 return ticksToCycles(memSidePort
->sendAtomic(pkt
));
983 promoteWholeLineWrites(pkt
);
985 // follow the same flow as in recvTimingReq, and check if a cache
986 // above us is responding
987 if (pkt
->cacheResponding()) {
988 DPRINTF(Cache
, "Cache above responding to %s: not responding\n",
991 // if a cache is responding, and it had the line in Owned
992 // rather than Modified state, we need to invalidate any
993 // copies that are not on the same path to memory
994 assert(pkt
->needsWritable() && !pkt
->responderHadWritable());
995 lat
+= ticksToCycles(memSidePort
->sendAtomic(pkt
));
997 return lat
* clockPeriod();
1000 // should assert here that there are no outstanding MSHRs or
1001 // writebacks... that would mean that someone used an atomic
1002 // access in timing mode
1004 CacheBlk
*blk
= nullptr;
1005 PacketList writebacks
;
1006 bool satisfied
= access(pkt
, blk
, lat
, writebacks
);
1008 // handle writebacks resulting from the access here to ensure they
1009 // logically proceed anything happening below
1010 doWritebacksAtomic(writebacks
);
1015 // deal with the packets that go through the write path of
1016 // the cache, i.e. any evictions and uncacheable writes
1017 if (pkt
->isEviction() ||
1018 (pkt
->req
->isUncacheable() && pkt
->isWrite())) {
1019 lat
+= ticksToCycles(memSidePort
->sendAtomic(pkt
));
1020 return lat
* clockPeriod();
1024 PacketPtr bus_pkt
= createMissPacket(pkt
, blk
, pkt
->needsWritable());
1026 bool is_forward
= (bus_pkt
== nullptr);
1029 // just forwarding the same request to the next level
1030 // no local cache operation involved
1034 DPRINTF(Cache
, "%s: Sending an atomic %s\n", __func__
,
1038 CacheBlk::State old_state
= blk
? blk
->status
: 0;
1041 lat
+= ticksToCycles(memSidePort
->sendAtomic(bus_pkt
));
1043 bool is_invalidate
= bus_pkt
->isInvalidate();
1045 // We are now dealing with the response handling
1046 DPRINTF(Cache
, "%s: Receive response: %s in state %i\n", __func__
,
1047 bus_pkt
->print(), old_state
);
1049 // If packet was a forward, the response (if any) is already
1050 // in place in the bus_pkt == pkt structure, so we don't need
1051 // to do anything. Otherwise, use the separate bus_pkt to
1052 // generate response to pkt and then delete it.
1054 if (pkt
->needsResponse()) {
1055 assert(bus_pkt
->isResponse());
1056 if (bus_pkt
->isError()) {
1057 pkt
->makeAtomicResponse();
1058 pkt
->copyError(bus_pkt
);
1059 } else if (pkt
->cmd
== MemCmd::WriteLineReq
) {
1060 // note the use of pkt, not bus_pkt here.
1062 // write-line request to the cache that promoted
1063 // the write to a whole line
1064 blk
= handleFill(pkt
, blk
, writebacks
,
1065 allocOnFill(pkt
->cmd
));
1066 assert(blk
!= NULL
);
1067 is_invalidate
= false;
1068 satisfyRequest(pkt
, blk
);
1069 } else if (bus_pkt
->isRead() ||
1070 bus_pkt
->cmd
== MemCmd::UpgradeResp
) {
1071 // we're updating cache state to allow us to
1072 // satisfy the upstream request from the cache
1073 blk
= handleFill(bus_pkt
, blk
, writebacks
,
1074 allocOnFill(pkt
->cmd
));
1075 satisfyRequest(pkt
, blk
);
1076 maintainClusivity(pkt
->fromCache(), blk
);
1078 // we're satisfying the upstream request without
1079 // modifying cache state, e.g., a write-through
1080 pkt
->makeAtomicResponse();
1086 if (is_invalidate
&& blk
&& blk
->isValid()) {
1087 invalidateBlock(blk
);
1091 // Note that we don't invoke the prefetcher at all in atomic mode.
1092 // It's not clear how to do it properly, particularly for
1093 // prefetchers that aggressively generate prefetch candidates and
1094 // rely on bandwidth contention to throttle them; these will tend
1095 // to pollute the cache in atomic mode since there is no bandwidth
1096 // contention. If we ever do want to enable prefetching in atomic
1097 // mode, though, this is the place to do it... see timingAccess()
1098 // for an example (though we'd want to issue the prefetch(es)
1099 // immediately rather than calling requestMemSideBus() as we do
1102 // do any writebacks resulting from the response handling
1103 doWritebacksAtomic(writebacks
);
1105 // if we used temp block, check to see if its valid and if so
1106 // clear it out, but only do so after the call to recvAtomic is
1107 // finished so that any downstream observers (such as a snoop
1108 // filter), first see the fill, and only then see the eviction
1109 if (blk
== tempBlock
&& tempBlock
->isValid()) {
1110 // the atomic CPU calls recvAtomic for fetch and load/store
1111 // sequentuially, and we may already have a tempBlock
1112 // writeback from the fetch that we have not yet sent
1113 if (tempBlockWriteback
) {
1114 // if that is the case, write the prevoius one back, and
1115 // do not schedule any new event
1116 writebackTempBlockAtomic();
1118 // the writeback/clean eviction happens after the call to
1119 // recvAtomic has finished (but before any successive
1120 // calls), so that the response handling from the fill is
1121 // allowed to happen first
1122 schedule(writebackTempBlockAtomicEvent
, curTick());
1125 tempBlockWriteback
= (blk
->isDirty() || writebackClean
) ?
1126 writebackBlk(blk
) : cleanEvictBlk(blk
);
1127 invalidateBlock(blk
);
1130 if (pkt
->needsResponse()) {
1131 pkt
->makeAtomicResponse();
1134 return lat
* clockPeriod();
1139 Cache::functionalAccess(PacketPtr pkt
, bool fromCpuSide
)
1141 if (system
->bypassCaches()) {
1142 // Packets from the memory side are snoop request and
1143 // shouldn't happen in bypass mode.
1144 assert(fromCpuSide
);
1146 // The cache should be flushed if we are in cache bypass mode,
1147 // so we don't need to check if we need to update anything.
1148 memSidePort
->sendFunctional(pkt
);
1152 Addr blk_addr
= blockAlign(pkt
->getAddr());
1153 bool is_secure
= pkt
->isSecure();
1154 CacheBlk
*blk
= tags
->findBlock(pkt
->getAddr(), is_secure
);
1155 MSHR
*mshr
= mshrQueue
.findMatch(blk_addr
, is_secure
);
1157 pkt
->pushLabel(name());
1159 CacheBlkPrintWrapper
cbpw(blk
);
1161 // Note that just because an L2/L3 has valid data doesn't mean an
1162 // L1 doesn't have a more up-to-date modified copy that still
1163 // needs to be found. As a result we always update the request if
1164 // we have it, but only declare it satisfied if we are the owner.
1166 // see if we have data at all (owned or otherwise)
1167 bool have_data
= blk
&& blk
->isValid()
1168 && pkt
->checkFunctional(&cbpw
, blk_addr
, is_secure
, blkSize
,
1171 // data we have is dirty if marked as such or if we have an
1172 // in-service MSHR that is pending a modified line
1174 have_data
&& (blk
->isDirty() ||
1175 (mshr
&& mshr
->inService
&& mshr
->isPendingModified()));
1177 bool done
= have_dirty
1178 || cpuSidePort
->checkFunctional(pkt
)
1179 || mshrQueue
.checkFunctional(pkt
, blk_addr
)
1180 || writeBuffer
.checkFunctional(pkt
, blk_addr
)
1181 || memSidePort
->checkFunctional(pkt
);
1183 DPRINTF(CacheVerbose
, "%s: %s %s%s%s\n", __func__
, pkt
->print(),
1184 (blk
&& blk
->isValid()) ? "valid " : "",
1185 have_data
? "data " : "", done
? "done " : "");
1187 // We're leaving the cache, so pop cache->name() label
1191 pkt
->makeResponse();
1193 // if it came as a request from the CPU side then make sure it
1194 // continues towards the memory side
1196 memSidePort
->sendFunctional(pkt
);
1197 } else if (cpuSidePort
->isSnooping()) {
1198 // if it came from the memory side, it must be a snoop request
1199 // and we should only forward it if we are forwarding snoops
1200 cpuSidePort
->sendFunctionalSnoop(pkt
);
1206 /////////////////////////////////////////////////////
1208 // Response handling: responses from the memory side
1210 /////////////////////////////////////////////////////
1214 Cache::handleUncacheableWriteResp(PacketPtr pkt
)
1216 Tick completion_time
= clockEdge(responseLatency
) +
1217 pkt
->headerDelay
+ pkt
->payloadDelay
;
1219 // Reset the bus additional time as it is now accounted for
1220 pkt
->headerDelay
= pkt
->payloadDelay
= 0;
1222 cpuSidePort
->schedTimingResp(pkt
, completion_time
, true);
1226 Cache::recvTimingResp(PacketPtr pkt
)
1228 assert(pkt
->isResponse());
1230 // all header delay should be paid for by the crossbar, unless
1231 // this is a prefetch response from above
1232 panic_if(pkt
->headerDelay
!= 0 && pkt
->cmd
!= MemCmd::HardPFResp
,
1233 "%s saw a non-zero packet delay\n", name());
1235 bool is_error
= pkt
->isError();
1238 DPRINTF(Cache
, "%s: Cache received %s with error\n", __func__
,
1242 DPRINTF(Cache
, "%s: Handling response %s\n", __func__
,
1245 // if this is a write, we should be looking at an uncacheable
1247 if (pkt
->isWrite()) {
1248 assert(pkt
->req
->isUncacheable());
1249 handleUncacheableWriteResp(pkt
);
1253 // we have dealt with any (uncacheable) writes above, from here on
1254 // we know we are dealing with an MSHR due to a miss or a prefetch
1255 MSHR
*mshr
= dynamic_cast<MSHR
*>(pkt
->popSenderState());
1258 if (mshr
== noTargetMSHR
) {
1259 // we always clear at least one target
1260 clearBlocked(Blocked_NoTargets
);
1261 noTargetMSHR
= nullptr;
1264 // Initial target is used just for stats
1265 MSHR::Target
*initial_tgt
= mshr
->getTarget();
1266 int stats_cmd_idx
= initial_tgt
->pkt
->cmdToIndex();
1267 Tick miss_latency
= curTick() - initial_tgt
->recvTime
;
1269 if (pkt
->req
->isUncacheable()) {
1270 assert(pkt
->req
->masterId() < system
->maxMasters());
1271 mshr_uncacheable_lat
[stats_cmd_idx
][pkt
->req
->masterId()] +=
1274 assert(pkt
->req
->masterId() < system
->maxMasters());
1275 mshr_miss_latency
[stats_cmd_idx
][pkt
->req
->masterId()] +=
1279 bool wasFull
= mshrQueue
.isFull();
1281 PacketList writebacks
;
1283 Tick forward_time
= clockEdge(forwardLatency
) + pkt
->headerDelay
;
1285 // upgrade deferred targets if the response has no sharers, and is
1286 // thus passing writable
1287 if (!pkt
->hasSharers()) {
1288 mshr
->promoteWritable();
1291 bool is_fill
= !mshr
->isForward
&&
1292 (pkt
->isRead() || pkt
->cmd
== MemCmd::UpgradeResp
);
1294 CacheBlk
*blk
= tags
->findBlock(pkt
->getAddr(), pkt
->isSecure());
1296 if (is_fill
&& !is_error
) {
1297 DPRINTF(Cache
, "Block for addr %#llx being updated in Cache\n",
1300 blk
= handleFill(pkt
, blk
, writebacks
, mshr
->allocOnFill());
1301 assert(blk
!= nullptr);
1304 // allow invalidation responses originating from write-line
1305 // requests to be discarded
1306 bool is_invalidate
= pkt
->isInvalidate();
1308 // First offset for critical word first calculations
1309 int initial_offset
= initial_tgt
->pkt
->getOffset(blkSize
);
1311 bool from_cache
= false;
1312 MSHR::TargetList targets
= mshr
->extractServiceableTargets(pkt
);
1313 for (auto &target
: targets
) {
1314 Packet
*tgt_pkt
= target
.pkt
;
1315 switch (target
.source
) {
1316 case MSHR::Target::FromCPU
:
1317 Tick completion_time
;
1318 // Here we charge on completion_time the delay of the xbar if the
1319 // packet comes from it, charged on headerDelay.
1320 completion_time
= pkt
->headerDelay
;
1322 // Software prefetch handling for cache closest to core
1323 if (tgt_pkt
->cmd
.isSWPrefetch()) {
1324 // a software prefetch would have already been ack'd
1325 // immediately with dummy data so the core would be able to
1326 // retire it. This request completes right here, so we
1328 delete tgt_pkt
->req
;
1330 break; // skip response
1333 // keep track of whether we have responded to another
1335 from_cache
= from_cache
|| tgt_pkt
->fromCache();
1337 // unlike the other packet flows, where data is found in other
1338 // caches or memory and brought back, write-line requests always
1339 // have the data right away, so the above check for "is fill?"
1340 // cannot actually be determined until examining the stored MSHR
1341 // state. We "catch up" with that logic here, which is duplicated
1343 if (tgt_pkt
->cmd
== MemCmd::WriteLineReq
) {
1345 // we got the block in a writable state, so promote
1346 // any deferred targets if possible
1347 mshr
->promoteWritable();
1348 // NB: we use the original packet here and not the response!
1349 blk
= handleFill(tgt_pkt
, blk
, writebacks
,
1350 targets
.allocOnFill
);
1351 assert(blk
!= nullptr);
1353 // treat as a fill, and discard the invalidation
1356 is_invalidate
= false;
1360 satisfyRequest(tgt_pkt
, blk
, true, mshr
->hasPostDowngrade());
1362 // How many bytes past the first request is this one
1363 int transfer_offset
=
1364 tgt_pkt
->getOffset(blkSize
) - initial_offset
;
1365 if (transfer_offset
< 0) {
1366 transfer_offset
+= blkSize
;
1369 // If not critical word (offset) return payloadDelay.
1370 // responseLatency is the latency of the return path
1371 // from lower level caches/memory to an upper level cache or
1373 completion_time
+= clockEdge(responseLatency
) +
1374 (transfer_offset
? pkt
->payloadDelay
: 0);
1376 assert(!tgt_pkt
->req
->isUncacheable());
1378 assert(tgt_pkt
->req
->masterId() < system
->maxMasters());
1379 missLatency
[tgt_pkt
->cmdToIndex()][tgt_pkt
->req
->masterId()] +=
1380 completion_time
- target
.recvTime
;
1381 } else if (pkt
->cmd
== MemCmd::UpgradeFailResp
) {
1382 // failed StoreCond upgrade
1383 assert(tgt_pkt
->cmd
== MemCmd::StoreCondReq
||
1384 tgt_pkt
->cmd
== MemCmd::StoreCondFailReq
||
1385 tgt_pkt
->cmd
== MemCmd::SCUpgradeFailReq
);
1386 // responseLatency is the latency of the return path
1387 // from lower level caches/memory to an upper level cache or
1389 completion_time
+= clockEdge(responseLatency
) +
1391 tgt_pkt
->req
->setExtraData(0);
1393 // We are about to send a response to a cache above
1394 // that asked for an invalidation; we need to
1395 // invalidate our copy immediately as the most
1396 // up-to-date copy of the block will now be in the
1397 // cache above. It will also prevent this cache from
1398 // responding (if the block was previously dirty) to
1399 // snoops as they should snoop the caches above where
1400 // they will get the response from.
1401 if (is_invalidate
&& blk
&& blk
->isValid()) {
1402 invalidateBlock(blk
);
1404 // not a cache fill, just forwarding response
1405 // responseLatency is the latency of the return path
1406 // from lower level cahces/memory to the core.
1407 completion_time
+= clockEdge(responseLatency
) +
1409 if (pkt
->isRead() && !is_error
) {
1411 assert(pkt
->getAddr() == tgt_pkt
->getAddr());
1412 assert(pkt
->getSize() >= tgt_pkt
->getSize());
1414 tgt_pkt
->setData(pkt
->getConstPtr
<uint8_t>());
1417 tgt_pkt
->makeTimingResponse();
1418 // if this packet is an error copy that to the new packet
1420 tgt_pkt
->copyError(pkt
);
1421 if (tgt_pkt
->cmd
== MemCmd::ReadResp
&&
1422 (is_invalidate
|| mshr
->hasPostInvalidate())) {
1423 // If intermediate cache got ReadRespWithInvalidate,
1424 // propagate that. Response should not have
1425 // isInvalidate() set otherwise.
1426 tgt_pkt
->cmd
= MemCmd::ReadRespWithInvalidate
;
1427 DPRINTF(Cache
, "%s: updated cmd to %s\n", __func__
,
1430 // Reset the bus additional time as it is now accounted for
1431 tgt_pkt
->headerDelay
= tgt_pkt
->payloadDelay
= 0;
1432 cpuSidePort
->schedTimingResp(tgt_pkt
, completion_time
, true);
1435 case MSHR::Target::FromPrefetcher
:
1436 assert(tgt_pkt
->cmd
== MemCmd::HardPFReq
);
1438 blk
->status
|= BlkHWPrefetched
;
1439 delete tgt_pkt
->req
;
1443 case MSHR::Target::FromSnoop
:
1444 // I don't believe that a snoop can be in an error state
1446 // response to snoop request
1447 DPRINTF(Cache
, "processing deferred snoop...\n");
1448 // If the response is invalidating, a snooping target can
1449 // be satisfied if it is also invalidating. If the reponse is, not
1450 // only invalidating, but more specifically an InvalidateResp, the
1451 // MSHR was created due to an InvalidateReq and a cache above is
1452 // waiting to satisfy a WriteLineReq. In this case even an
1453 // non-invalidating snoop is added as a target here since this is
1454 // the ordering point. When the InvalidateResp reaches this cache,
1455 // the snooping target will snoop further the cache above with the
1457 assert(!(is_invalidate
&&
1458 pkt
->cmd
!= MemCmd::InvalidateResp
&&
1459 !mshr
->hasPostInvalidate()));
1460 handleSnoop(tgt_pkt
, blk
, true, true, mshr
->hasPostInvalidate());
1464 panic("Illegal target->source enum %d\n", target
.source
);
1468 maintainClusivity(from_cache
, blk
);
1470 if (blk
&& blk
->isValid()) {
1471 // an invalidate response stemming from a write line request
1472 // should not invalidate the block, so check if the
1473 // invalidation should be discarded
1474 if (is_invalidate
|| mshr
->hasPostInvalidate()) {
1475 invalidateBlock(blk
);
1476 } else if (mshr
->hasPostDowngrade()) {
1477 blk
->status
&= ~BlkWritable
;
1481 if (mshr
->promoteDeferredTargets()) {
1482 // avoid later read getting stale data while write miss is
1483 // outstanding.. see comment in timingAccess()
1485 blk
->status
&= ~BlkReadable
;
1487 mshrQueue
.markPending(mshr
);
1488 schedMemSideSendEvent(clockEdge() + pkt
->payloadDelay
);
1490 mshrQueue
.deallocate(mshr
);
1491 if (wasFull
&& !mshrQueue
.isFull()) {
1492 clearBlocked(Blocked_NoMSHRs
);
1495 // Request the bus for a prefetch if this deallocation freed enough
1496 // MSHRs for a prefetch to take place
1497 if (prefetcher
&& mshrQueue
.canPrefetch()) {
1498 Tick next_pf_time
= std::max(prefetcher
->nextPrefetchReadyTime(),
1500 if (next_pf_time
!= MaxTick
)
1501 schedMemSideSendEvent(next_pf_time
);
1504 // reset the xbar additional timinig as it is now accounted for
1505 pkt
->headerDelay
= pkt
->payloadDelay
= 0;
1507 // copy writebacks to write buffer
1508 doWritebacks(writebacks
, forward_time
);
1510 // if we used temp block, check to see if its valid and then clear it out
1511 if (blk
== tempBlock
&& tempBlock
->isValid()) {
1512 // We use forwardLatency here because we are copying
1513 // Writebacks/CleanEvicts to write buffer. It specifies the latency to
1514 // allocate an internal buffer and to schedule an event to the
1516 if (blk
->isDirty() || writebackClean
) {
1517 PacketPtr wbPkt
= writebackBlk(blk
);
1518 allocateWriteBuffer(wbPkt
, forward_time
);
1519 // Set BLOCK_CACHED flag if cached above.
1520 if (isCachedAbove(wbPkt
))
1521 wbPkt
->setBlockCached();
1523 PacketPtr wcPkt
= cleanEvictBlk(blk
);
1524 // Check to see if block is cached above. If not allocate
1526 if (isCachedAbove(wcPkt
))
1529 allocateWriteBuffer(wcPkt
, forward_time
);
1531 invalidateBlock(blk
);
1534 DPRINTF(CacheVerbose
, "%s: Leaving with %s\n", __func__
, pkt
->print());
1539 Cache::writebackBlk(CacheBlk
*blk
)
1541 chatty_assert(!isReadOnly
|| writebackClean
,
1542 "Writeback from read-only cache");
1543 assert(blk
&& blk
->isValid() && (blk
->isDirty() || writebackClean
));
1545 writebacks
[Request::wbMasterId
]++;
1547 Request
*req
= new Request(tags
->regenerateBlkAddr(blk
->tag
, blk
->set
),
1548 blkSize
, 0, Request::wbMasterId
);
1549 if (blk
->isSecure())
1550 req
->setFlags(Request::SECURE
);
1552 req
->taskId(blk
->task_id
);
1553 blk
->task_id
= ContextSwitchTaskId::Unknown
;
1554 blk
->tickInserted
= curTick();
1557 new Packet(req
, blk
->isDirty() ?
1558 MemCmd::WritebackDirty
: MemCmd::WritebackClean
);
1560 DPRINTF(Cache
, "Create Writeback %s writable: %d, dirty: %d\n",
1561 pkt
->print(), blk
->isWritable(), blk
->isDirty());
1563 if (blk
->isWritable()) {
1564 // not asserting shared means we pass the block in modified
1565 // state, mark our own block non-writeable
1566 blk
->status
&= ~BlkWritable
;
1568 // we are in the Owned state, tell the receiver
1569 pkt
->setHasSharers();
1572 // make sure the block is not marked dirty
1573 blk
->status
&= ~BlkDirty
;
1576 std::memcpy(pkt
->getPtr
<uint8_t>(), blk
->data
, blkSize
);
1582 Cache::cleanEvictBlk(CacheBlk
*blk
)
1584 assert(!writebackClean
);
1585 assert(blk
&& blk
->isValid() && !blk
->isDirty());
1586 // Creating a zero sized write, a message to the snoop filter
1588 new Request(tags
->regenerateBlkAddr(blk
->tag
, blk
->set
), blkSize
, 0,
1589 Request::wbMasterId
);
1590 if (blk
->isSecure())
1591 req
->setFlags(Request::SECURE
);
1593 req
->taskId(blk
->task_id
);
1594 blk
->task_id
= ContextSwitchTaskId::Unknown
;
1595 blk
->tickInserted
= curTick();
1597 PacketPtr pkt
= new Packet(req
, MemCmd::CleanEvict
);
1599 DPRINTF(Cache
, "Create CleanEvict %s\n", pkt
->print());
1605 Cache::memWriteback()
1607 CacheBlkVisitorWrapper
visitor(*this, &Cache::writebackVisitor
);
1608 tags
->forEachBlk(visitor
);
1612 Cache::memInvalidate()
1614 CacheBlkVisitorWrapper
visitor(*this, &Cache::invalidateVisitor
);
1615 tags
->forEachBlk(visitor
);
1619 Cache::isDirty() const
1621 CacheBlkIsDirtyVisitor visitor
;
1622 tags
->forEachBlk(visitor
);
1624 return visitor
.isDirty();
1628 Cache::writebackVisitor(CacheBlk
&blk
)
1630 if (blk
.isDirty()) {
1631 assert(blk
.isValid());
1633 Request
request(tags
->regenerateBlkAddr(blk
.tag
, blk
.set
),
1634 blkSize
, 0, Request::funcMasterId
);
1635 request
.taskId(blk
.task_id
);
1636 if (blk
.isSecure()) {
1637 request
.setFlags(Request::SECURE
);
1640 Packet
packet(&request
, MemCmd::WriteReq
);
1641 packet
.dataStatic(blk
.data
);
1643 memSidePort
->sendFunctional(&packet
);
1645 blk
.status
&= ~BlkDirty
;
1652 Cache::invalidateVisitor(CacheBlk
&blk
)
1656 warn_once("Invalidating dirty cache lines. Expect things to break.\n");
1658 if (blk
.isValid()) {
1659 assert(!blk
.isDirty());
1660 invalidateBlock(&blk
);
1667 Cache::allocateBlock(Addr addr
, bool is_secure
, PacketList
&writebacks
)
1669 CacheBlk
*blk
= tags
->findVictim(addr
);
1671 // It is valid to return nullptr if there is no victim
1675 if (blk
->isValid()) {
1676 Addr repl_addr
= tags
->regenerateBlkAddr(blk
->tag
, blk
->set
);
1677 MSHR
*repl_mshr
= mshrQueue
.findMatch(repl_addr
, blk
->isSecure());
1679 // must be an outstanding upgrade request
1680 // on a block we're about to replace...
1681 assert(!blk
->isWritable() || blk
->isDirty());
1682 assert(repl_mshr
->needsWritable());
1683 // too hard to replace block with transient state
1684 // allocation failed, block not inserted
1687 DPRINTF(Cache
, "replacement: replacing %#llx (%s) with %#llx "
1688 "(%s): %s\n", repl_addr
, blk
->isSecure() ? "s" : "ns",
1689 addr
, is_secure
? "s" : "ns",
1690 blk
->isDirty() ? "writeback" : "clean");
1692 if (blk
->wasPrefetched()) {
1695 // Will send up Writeback/CleanEvict snoops via isCachedAbove
1696 // when pushing this writeback list into the write buffer.
1697 if (blk
->isDirty() || writebackClean
) {
1698 // Save writeback packet for handling by caller
1699 writebacks
.push_back(writebackBlk(blk
));
1701 writebacks
.push_back(cleanEvictBlk(blk
));
1710 Cache::invalidateBlock(CacheBlk
*blk
)
1712 if (blk
!= tempBlock
)
1713 tags
->invalidate(blk
);
1717 // Note that the reason we return a list of writebacks rather than
1718 // inserting them directly in the write buffer is that this function
1719 // is called by both atomic and timing-mode accesses, and in atomic
1720 // mode we don't mess with the write buffer (we just perform the
1721 // writebacks atomically once the original request is complete).
1723 Cache::handleFill(PacketPtr pkt
, CacheBlk
*blk
, PacketList
&writebacks
,
1726 assert(pkt
->isResponse() || pkt
->cmd
== MemCmd::WriteLineReq
);
1727 Addr addr
= pkt
->getAddr();
1728 bool is_secure
= pkt
->isSecure();
1730 CacheBlk::State old_state
= blk
? blk
->status
: 0;
1733 // When handling a fill, we should have no writes to this line.
1734 assert(addr
== blockAlign(addr
));
1735 assert(!writeBuffer
.findMatch(addr
, is_secure
));
1737 if (blk
== nullptr) {
1738 // better have read new data...
1739 assert(pkt
->hasData());
1741 // only read responses and write-line requests have data;
1742 // note that we don't write the data here for write-line - that
1743 // happens in the subsequent call to satisfyRequest
1744 assert(pkt
->isRead() || pkt
->cmd
== MemCmd::WriteLineReq
);
1746 // need to do a replacement if allocating, otherwise we stick
1747 // with the temporary storage
1748 blk
= allocate
? allocateBlock(addr
, is_secure
, writebacks
) : nullptr;
1750 if (blk
== nullptr) {
1751 // No replaceable block or a mostly exclusive
1752 // cache... just use temporary storage to complete the
1753 // current request and then get rid of it
1754 assert(!tempBlock
->isValid());
1756 tempBlock
->set
= tags
->extractSet(addr
);
1757 tempBlock
->tag
= tags
->extractTag(addr
);
1758 // @todo: set security state as well...
1759 DPRINTF(Cache
, "using temp block for %#llx (%s)\n", addr
,
1760 is_secure
? "s" : "ns");
1762 tags
->insertBlock(pkt
, blk
);
1765 // we should never be overwriting a valid block
1766 assert(!blk
->isValid());
1768 // existing block... probably an upgrade
1769 assert(blk
->tag
== tags
->extractTag(addr
));
1770 // either we're getting new data or the block should already be valid
1771 assert(pkt
->hasData() || blk
->isValid());
1772 // don't clear block status... if block is already dirty we
1773 // don't want to lose that
1777 blk
->status
|= BlkSecure
;
1778 blk
->status
|= BlkValid
| BlkReadable
;
1780 // sanity check for whole-line writes, which should always be
1781 // marked as writable as part of the fill, and then later marked
1782 // dirty as part of satisfyRequest
1783 if (pkt
->cmd
== MemCmd::WriteLineReq
) {
1784 assert(!pkt
->hasSharers());
1787 // here we deal with setting the appropriate state of the line,
1788 // and we start by looking at the hasSharers flag, and ignore the
1789 // cacheResponding flag (normally signalling dirty data) if the
1790 // packet has sharers, thus the line is never allocated as Owned
1791 // (dirty but not writable), and always ends up being either
1792 // Shared, Exclusive or Modified, see Packet::setCacheResponding
1794 if (!pkt
->hasSharers()) {
1795 // we could get a writable line from memory (rather than a
1796 // cache) even in a read-only cache, note that we set this bit
1797 // even for a read-only cache, possibly revisit this decision
1798 blk
->status
|= BlkWritable
;
1800 // check if we got this via cache-to-cache transfer (i.e., from a
1801 // cache that had the block in Modified or Owned state)
1802 if (pkt
->cacheResponding()) {
1803 // we got the block in Modified state, and invalidated the
1805 blk
->status
|= BlkDirty
;
1807 chatty_assert(!isReadOnly
, "Should never see dirty snoop response "
1808 "in read-only cache %s\n", name());
1812 DPRINTF(Cache
, "Block addr %#llx (%s) moving from state %x to %s\n",
1813 addr
, is_secure
? "s" : "ns", old_state
, blk
->print());
1815 // if we got new data, copy it in (checking for a read response
1816 // and a response that has data is the same in the end)
1817 if (pkt
->isRead()) {
1819 assert(pkt
->hasData());
1820 assert(pkt
->getSize() == blkSize
);
1822 std::memcpy(blk
->data
, pkt
->getConstPtr
<uint8_t>(), blkSize
);
1824 // We pay for fillLatency here.
1825 blk
->whenReady
= clockEdge() + fillLatency
* clockPeriod() +
1832 /////////////////////////////////////////////////////
1834 // Snoop path: requests coming in from the memory side
1836 /////////////////////////////////////////////////////
1839 Cache::doTimingSupplyResponse(PacketPtr req_pkt
, const uint8_t *blk_data
,
1840 bool already_copied
, bool pending_inval
)
1843 assert(req_pkt
->isRequest());
1844 assert(req_pkt
->needsResponse());
1846 DPRINTF(Cache
, "%s: for %s\n", __func__
, req_pkt
->print());
1847 // timing-mode snoop responses require a new packet, unless we
1848 // already made a copy...
1849 PacketPtr pkt
= req_pkt
;
1850 if (!already_copied
)
1851 // do not clear flags, and allocate space for data if the
1852 // packet needs it (the only packets that carry data are read
1854 pkt
= new Packet(req_pkt
, false, req_pkt
->isRead());
1856 assert(req_pkt
->req
->isUncacheable() || req_pkt
->isInvalidate() ||
1858 pkt
->makeTimingResponse();
1859 if (pkt
->isRead()) {
1860 pkt
->setDataFromBlock(blk_data
, blkSize
);
1862 if (pkt
->cmd
== MemCmd::ReadResp
&& pending_inval
) {
1863 // Assume we defer a response to a read from a far-away cache
1864 // A, then later defer a ReadExcl from a cache B on the same
1865 // bus as us. We'll assert cacheResponding in both cases, but
1866 // in the latter case cacheResponding will keep the
1867 // invalidation from reaching cache A. This special response
1868 // tells cache A that it gets the block to satisfy its read,
1869 // but must immediately invalidate it.
1870 pkt
->cmd
= MemCmd::ReadRespWithInvalidate
;
1872 // Here we consider forward_time, paying for just forward latency and
1873 // also charging the delay provided by the xbar.
1874 // forward_time is used as send_time in next allocateWriteBuffer().
1875 Tick forward_time
= clockEdge(forwardLatency
) + pkt
->headerDelay
;
1876 // Here we reset the timing of the packet.
1877 pkt
->headerDelay
= pkt
->payloadDelay
= 0;
1878 DPRINTF(CacheVerbose
, "%s: created response: %s tick: %lu\n", __func__
,
1879 pkt
->print(), forward_time
);
1880 memSidePort
->schedTimingSnoopResp(pkt
, forward_time
, true);
1884 Cache::handleSnoop(PacketPtr pkt
, CacheBlk
*blk
, bool is_timing
,
1885 bool is_deferred
, bool pending_inval
)
1887 DPRINTF(CacheVerbose
, "%s: for %s\n", __func__
, pkt
->print());
1888 // deferred snoops can only happen in timing mode
1889 assert(!(is_deferred
&& !is_timing
));
1890 // pending_inval only makes sense on deferred snoops
1891 assert(!(pending_inval
&& !is_deferred
));
1892 assert(pkt
->isRequest());
1894 // the packet may get modified if we or a forwarded snooper
1895 // responds in atomic mode, so remember a few things about the
1896 // original packet up front
1897 bool invalidate
= pkt
->isInvalidate();
1898 bool M5_VAR_USED needs_writable
= pkt
->needsWritable();
1900 // at the moment we could get an uncacheable write which does not
1901 // have the invalidate flag, and we need a suitable way of dealing
1903 panic_if(invalidate
&& pkt
->req
->isUncacheable(),
1904 "%s got an invalidating uncacheable snoop request %s",
1905 name(), pkt
->print());
1907 uint32_t snoop_delay
= 0;
1909 if (forwardSnoops
) {
1910 // first propagate snoop upward to see if anyone above us wants to
1911 // handle it. save & restore packet src since it will get
1912 // rewritten to be relative to cpu-side bus (if any)
1913 bool alreadyResponded
= pkt
->cacheResponding();
1915 // copy the packet so that we can clear any flags before
1916 // forwarding it upwards, we also allocate data (passing
1917 // the pointer along in case of static data), in case
1918 // there is a snoop hit in upper levels
1919 Packet
snoopPkt(pkt
, true, true);
1920 snoopPkt
.setExpressSnoop();
1921 // the snoop packet does not need to wait any additional
1923 snoopPkt
.headerDelay
= snoopPkt
.payloadDelay
= 0;
1924 cpuSidePort
->sendTimingSnoopReq(&snoopPkt
);
1926 // add the header delay (including crossbar and snoop
1927 // delays) of the upward snoop to the snoop delay for this
1929 snoop_delay
+= snoopPkt
.headerDelay
;
1931 if (snoopPkt
.cacheResponding()) {
1932 // cache-to-cache response from some upper cache
1933 assert(!alreadyResponded
);
1934 pkt
->setCacheResponding();
1936 // upstream cache has the block, or has an outstanding
1937 // MSHR, pass the flag on
1938 if (snoopPkt
.hasSharers()) {
1939 pkt
->setHasSharers();
1941 // If this request is a prefetch or clean evict and an upper level
1942 // signals block present, make sure to propagate the block
1943 // presence to the requester.
1944 if (snoopPkt
.isBlockCached()) {
1945 pkt
->setBlockCached();
1948 cpuSidePort
->sendAtomicSnoop(pkt
);
1949 if (!alreadyResponded
&& pkt
->cacheResponding()) {
1950 // cache-to-cache response from some upper cache:
1951 // forward response to original requester
1952 assert(pkt
->isResponse());
1957 if (!blk
|| !blk
->isValid()) {
1958 DPRINTF(CacheVerbose
, "%s: snoop miss for %s\n", __func__
,
1961 // we no longer have the block, and will not respond, but a
1962 // packet was allocated in MSHR::handleSnoop and we have
1964 assert(pkt
->needsResponse());
1966 // we have passed the block to a cache upstream, that
1967 // cache should be responding
1968 assert(pkt
->cacheResponding());
1974 DPRINTF(Cache
, "%s: snoop hit for %s, old state is %s\n", __func__
,
1975 pkt
->print(), blk
->print());
1978 chatty_assert(!(isReadOnly
&& blk
->isDirty()),
1979 "Should never have a dirty block in a read-only cache %s\n",
1982 // We may end up modifying both the block state and the packet (if
1983 // we respond in atomic mode), so just figure out what to do now
1984 // and then do it later. We respond to all snoops that need
1985 // responses provided we have the block in dirty state. The
1986 // invalidation itself is taken care of below.
1987 bool respond
= blk
->isDirty() && pkt
->needsResponse();
1988 bool have_writable
= blk
->isWritable();
1990 // Invalidate any prefetch's from below that would strip write permissions
1991 // MemCmd::HardPFReq is only observed by upstream caches. After missing
1992 // above and in it's own cache, a new MemCmd::ReadReq is created that
1993 // downstream caches observe.
1994 if (pkt
->mustCheckAbove()) {
1995 DPRINTF(Cache
, "Found addr %#llx in upper level cache for snoop %s "
1996 "from lower cache\n", pkt
->getAddr(), pkt
->print());
1997 pkt
->setBlockCached();
2001 if (pkt
->isRead() && !invalidate
) {
2002 // reading without requiring the line in a writable state
2003 assert(!needs_writable
);
2004 pkt
->setHasSharers();
2006 // if the requesting packet is uncacheable, retain the line in
2007 // the current state, otherwhise unset the writable flag,
2008 // which means we go from Modified to Owned (and will respond
2009 // below), remain in Owned (and will respond below), from
2010 // Exclusive to Shared, or remain in Shared
2011 if (!pkt
->req
->isUncacheable())
2012 blk
->status
&= ~BlkWritable
;
2016 // prevent anyone else from responding, cache as well as
2017 // memory, and also prevent any memory from even seeing the
2019 pkt
->setCacheResponding();
2020 if (have_writable
) {
2021 // inform the cache hierarchy that this cache had the line
2022 // in the Modified state so that we avoid unnecessary
2023 // invalidations (see Packet::setResponderHadWritable)
2024 pkt
->setResponderHadWritable();
2026 // in the case of an uncacheable request there is no point
2027 // in setting the responderHadWritable flag, but since the
2028 // recipient does not care there is no harm in doing so
2030 // if the packet has needsWritable set we invalidate our
2031 // copy below and all other copies will be invalidates
2032 // through express snoops, and if needsWritable is not set
2033 // we already called setHasSharers above
2036 // if we are returning a writable and dirty (Modified) line,
2037 // we should be invalidating the line
2038 panic_if(!invalidate
&& !pkt
->hasSharers(),
2039 "%s is passing a Modified line through %s, "
2040 "but keeping the block", name(), pkt
->print());
2043 doTimingSupplyResponse(pkt
, blk
->data
, is_deferred
, pending_inval
);
2045 pkt
->makeAtomicResponse();
2046 // packets such as upgrades do not actually have any data
2049 pkt
->setDataFromBlock(blk
->data
, blkSize
);
2053 if (!respond
&& is_deferred
) {
2054 assert(pkt
->needsResponse());
2056 // if we copied the deferred packet with the intention to
2057 // respond, but are not responding, then a cache above us must
2058 // be, and we can use this as the indication of whether this
2059 // is a packet where we created a copy of the request or not
2060 if (!pkt
->cacheResponding()) {
2067 // Do this last in case it deallocates block data or something
2070 invalidateBlock(blk
);
2073 DPRINTF(Cache
, "new state is %s\n", blk
->print());
2080 Cache::recvTimingSnoopReq(PacketPtr pkt
)
2082 DPRINTF(CacheVerbose
, "%s: for %s\n", __func__
, pkt
->print());
2084 // Snoops shouldn't happen when bypassing caches
2085 assert(!system
->bypassCaches());
2087 // no need to snoop requests that are not in range
2088 if (!inRange(pkt
->getAddr())) {
2092 bool is_secure
= pkt
->isSecure();
2093 CacheBlk
*blk
= tags
->findBlock(pkt
->getAddr(), is_secure
);
2095 Addr blk_addr
= blockAlign(pkt
->getAddr());
2096 MSHR
*mshr
= mshrQueue
.findMatch(blk_addr
, is_secure
);
2098 // Update the latency cost of the snoop so that the crossbar can
2099 // account for it. Do not overwrite what other neighbouring caches
2100 // have already done, rather take the maximum. The update is
2101 // tentative, for cases where we return before an upward snoop
2103 pkt
->snoopDelay
= std::max
<uint32_t>(pkt
->snoopDelay
,
2104 lookupLatency
* clockPeriod());
2106 // Inform request(Prefetch, CleanEvict or Writeback) from below of
2107 // MSHR hit, set setBlockCached.
2108 if (mshr
&& pkt
->mustCheckAbove()) {
2109 DPRINTF(Cache
, "Setting block cached for %s from lower cache on "
2110 "mshr hit\n", pkt
->print());
2111 pkt
->setBlockCached();
2115 // Let the MSHR itself track the snoop and decide whether we want
2116 // to go ahead and do the regular cache snoop
2117 if (mshr
&& mshr
->handleSnoop(pkt
, order
++)) {
2118 DPRINTF(Cache
, "Deferring snoop on in-service MSHR to blk %#llx (%s)."
2119 "mshrs: %s\n", blk_addr
, is_secure
? "s" : "ns",
2122 if (mshr
->getNumTargets() > numTarget
)
2123 warn("allocating bonus target for snoop"); //handle later
2127 //We also need to check the writeback buffers and handle those
2128 WriteQueueEntry
*wb_entry
= writeBuffer
.findMatch(blk_addr
, is_secure
);
2130 DPRINTF(Cache
, "Snoop hit in writeback to addr %#llx (%s)\n",
2131 pkt
->getAddr(), is_secure
? "s" : "ns");
2132 // Expect to see only Writebacks and/or CleanEvicts here, both of
2133 // which should not be generated for uncacheable data.
2134 assert(!wb_entry
->isUncacheable());
2135 // There should only be a single request responsible for generating
2136 // Writebacks/CleanEvicts.
2137 assert(wb_entry
->getNumTargets() == 1);
2138 PacketPtr wb_pkt
= wb_entry
->getTarget()->pkt
;
2139 assert(wb_pkt
->isEviction());
2141 if (pkt
->isEviction()) {
2142 // if the block is found in the write queue, set the BLOCK_CACHED
2143 // flag for Writeback/CleanEvict snoop. On return the snoop will
2144 // propagate the BLOCK_CACHED flag in Writeback packets and prevent
2145 // any CleanEvicts from travelling down the memory hierarchy.
2146 pkt
->setBlockCached();
2147 DPRINTF(Cache
, "%s: Squashing %s from lower cache on writequeue "
2148 "hit\n", __func__
, pkt
->print());
2152 // conceptually writebacks are no different to other blocks in
2153 // this cache, so the behaviour is modelled after handleSnoop,
2154 // the difference being that instead of querying the block
2155 // state to determine if it is dirty and writable, we use the
2156 // command and fields of the writeback packet
2157 bool respond
= wb_pkt
->cmd
== MemCmd::WritebackDirty
&&
2158 pkt
->needsResponse();
2159 bool have_writable
= !wb_pkt
->hasSharers();
2160 bool invalidate
= pkt
->isInvalidate();
2162 if (!pkt
->req
->isUncacheable() && pkt
->isRead() && !invalidate
) {
2163 assert(!pkt
->needsWritable());
2164 pkt
->setHasSharers();
2165 wb_pkt
->setHasSharers();
2169 pkt
->setCacheResponding();
2171 if (have_writable
) {
2172 pkt
->setResponderHadWritable();
2175 doTimingSupplyResponse(pkt
, wb_pkt
->getConstPtr
<uint8_t>(),
2180 // Invalidation trumps our writeback... discard here
2181 // Note: markInService will remove entry from writeback buffer.
2182 markInService(wb_entry
);
2187 // If this was a shared writeback, there may still be
2188 // other shared copies above that require invalidation.
2189 // We could be more selective and return here if the
2190 // request is non-exclusive or if the writeback is
2192 uint32_t snoop_delay
= handleSnoop(pkt
, blk
, true, false, false);
2194 // Override what we did when we first saw the snoop, as we now
2195 // also have the cost of the upwards snoops to account for
2196 pkt
->snoopDelay
= std::max
<uint32_t>(pkt
->snoopDelay
, snoop_delay
+
2197 lookupLatency
* clockPeriod());
2201 Cache::CpuSidePort::recvTimingSnoopResp(PacketPtr pkt
)
2203 // Express snoop responses from master to slave, e.g., from L1 to L2
2204 cache
->recvTimingSnoopResp(pkt
);
2209 Cache::recvAtomicSnoop(PacketPtr pkt
)
2211 // Snoops shouldn't happen when bypassing caches
2212 assert(!system
->bypassCaches());
2214 // no need to snoop requests that are not in range.
2215 if (!inRange(pkt
->getAddr())) {
2219 CacheBlk
*blk
= tags
->findBlock(pkt
->getAddr(), pkt
->isSecure());
2220 uint32_t snoop_delay
= handleSnoop(pkt
, blk
, false, false, false);
2221 return snoop_delay
+ lookupLatency
* clockPeriod();
2226 Cache::getNextQueueEntry()
2228 // Check both MSHR queue and write buffer for potential requests,
2229 // note that null does not mean there is no request, it could
2230 // simply be that it is not ready
2231 MSHR
*miss_mshr
= mshrQueue
.getNext();
2232 WriteQueueEntry
*wq_entry
= writeBuffer
.getNext();
2234 // If we got a write buffer request ready, first priority is a
2235 // full write buffer, otherwise we favour the miss requests
2236 if (wq_entry
&& (writeBuffer
.isFull() || !miss_mshr
)) {
2237 // need to search MSHR queue for conflicting earlier miss.
2238 MSHR
*conflict_mshr
=
2239 mshrQueue
.findPending(wq_entry
->blkAddr
,
2240 wq_entry
->isSecure
);
2242 if (conflict_mshr
&& conflict_mshr
->order
< wq_entry
->order
) {
2243 // Service misses in order until conflict is cleared.
2244 return conflict_mshr
;
2246 // @todo Note that we ignore the ready time of the conflict here
2249 // No conflicts; issue write
2251 } else if (miss_mshr
) {
2252 // need to check for conflicting earlier writeback
2253 WriteQueueEntry
*conflict_mshr
=
2254 writeBuffer
.findPending(miss_mshr
->blkAddr
,
2255 miss_mshr
->isSecure
);
2256 if (conflict_mshr
) {
2257 // not sure why we don't check order here... it was in the
2258 // original code but commented out.
2260 // The only way this happens is if we are
2261 // doing a write and we didn't have permissions
2262 // then subsequently saw a writeback (owned got evicted)
2263 // We need to make sure to perform the writeback first
2264 // To preserve the dirty data, then we can issue the write
2266 // should we return wq_entry here instead? I.e. do we
2267 // have to flush writes in order? I don't think so... not
2268 // for Alpha anyway. Maybe for x86?
2269 return conflict_mshr
;
2271 // @todo Note that we ignore the ready time of the conflict here
2274 // No conflicts; issue read
2278 // fall through... no pending requests. Try a prefetch.
2279 assert(!miss_mshr
&& !wq_entry
);
2280 if (prefetcher
&& mshrQueue
.canPrefetch()) {
2281 // If we have a miss queue slot, we can try a prefetch
2282 PacketPtr pkt
= prefetcher
->getPacket();
2284 Addr pf_addr
= blockAlign(pkt
->getAddr());
2285 if (!tags
->findBlock(pf_addr
, pkt
->isSecure()) &&
2286 !mshrQueue
.findMatch(pf_addr
, pkt
->isSecure()) &&
2287 !writeBuffer
.findMatch(pf_addr
, pkt
->isSecure())) {
2288 // Update statistic on number of prefetches issued
2289 // (hwpf_mshr_misses)
2290 assert(pkt
->req
->masterId() < system
->maxMasters());
2291 mshr_misses
[pkt
->cmdToIndex()][pkt
->req
->masterId()]++;
2293 // allocate an MSHR and return it, note
2294 // that we send the packet straight away, so do not
2295 // schedule the send
2296 return allocateMissBuffer(pkt
, curTick(), false);
2298 // free the request and packet
2309 Cache::isCachedAbove(PacketPtr pkt
, bool is_timing
) const
2313 // Mirroring the flow of HardPFReqs, the cache sends CleanEvict and
2314 // Writeback snoops into upper level caches to check for copies of the
2315 // same block. Using the BLOCK_CACHED flag with the Writeback/CleanEvict
2316 // packet, the cache can inform the crossbar below of presence or absence
2319 Packet
snoop_pkt(pkt
, true, false);
2320 snoop_pkt
.setExpressSnoop();
2321 // Assert that packet is either Writeback or CleanEvict and not a
2322 // prefetch request because prefetch requests need an MSHR and may
2323 // generate a snoop response.
2324 assert(pkt
->isEviction());
2325 snoop_pkt
.senderState
= nullptr;
2326 cpuSidePort
->sendTimingSnoopReq(&snoop_pkt
);
2327 // Writeback/CleanEvict snoops do not generate a snoop response.
2328 assert(!(snoop_pkt
.cacheResponding()));
2329 return snoop_pkt
.isBlockCached();
2331 cpuSidePort
->sendAtomicSnoop(pkt
);
2332 return pkt
->isBlockCached();
2337 Cache::nextQueueReadyTime() const
2339 Tick nextReady
= std::min(mshrQueue
.nextReadyTime(),
2340 writeBuffer
.nextReadyTime());
2342 // Don't signal prefetch ready time if no MSHRs available
2343 // Will signal once enoguh MSHRs are deallocated
2344 if (prefetcher
&& mshrQueue
.canPrefetch()) {
2345 nextReady
= std::min(nextReady
,
2346 prefetcher
->nextPrefetchReadyTime());
2353 Cache::sendMSHRQueuePacket(MSHR
* mshr
)
2357 // use request from 1st target
2358 PacketPtr tgt_pkt
= mshr
->getTarget()->pkt
;
2360 DPRINTF(Cache
, "%s: MSHR %s\n", __func__
, tgt_pkt
->print());
2362 CacheBlk
*blk
= tags
->findBlock(mshr
->blkAddr
, mshr
->isSecure
);
2364 if (tgt_pkt
->cmd
== MemCmd::HardPFReq
&& forwardSnoops
) {
2365 // we should never have hardware prefetches to allocated
2367 assert(blk
== nullptr);
2369 // We need to check the caches above us to verify that
2370 // they don't have a copy of this block in the dirty state
2371 // at the moment. Without this check we could get a stale
2372 // copy from memory that might get used in place of the
2374 Packet
snoop_pkt(tgt_pkt
, true, false);
2375 snoop_pkt
.setExpressSnoop();
2376 // We are sending this packet upwards, but if it hits we will
2377 // get a snoop response that we end up treating just like a
2378 // normal response, hence it needs the MSHR as its sender
2380 snoop_pkt
.senderState
= mshr
;
2381 cpuSidePort
->sendTimingSnoopReq(&snoop_pkt
);
2383 // Check to see if the prefetch was squashed by an upper cache (to
2384 // prevent us from grabbing the line) or if a Check to see if a
2385 // writeback arrived between the time the prefetch was placed in
2386 // the MSHRs and when it was selected to be sent or if the
2387 // prefetch was squashed by an upper cache.
2389 // It is important to check cacheResponding before
2390 // prefetchSquashed. If another cache has committed to
2391 // responding, it will be sending a dirty response which will
2392 // arrive at the MSHR allocated for this request. Checking the
2393 // prefetchSquash first may result in the MSHR being
2394 // prematurely deallocated.
2395 if (snoop_pkt
.cacheResponding()) {
2396 auto M5_VAR_USED r
= outstandingSnoop
.insert(snoop_pkt
.req
);
2399 // if we are getting a snoop response with no sharers it
2400 // will be allocated as Modified
2401 bool pending_modified_resp
= !snoop_pkt
.hasSharers();
2402 markInService(mshr
, pending_modified_resp
);
2404 DPRINTF(Cache
, "Upward snoop of prefetch for addr"
2406 tgt_pkt
->getAddr(), tgt_pkt
->isSecure()? "s": "ns");
2410 if (snoop_pkt
.isBlockCached()) {
2411 DPRINTF(Cache
, "Block present, prefetch squashed by cache. "
2412 "Deallocating mshr target %#x.\n",
2415 // Deallocate the mshr target
2416 if (mshrQueue
.forceDeallocateTarget(mshr
)) {
2417 // Clear block if this deallocation resulted freed an
2418 // mshr when all had previously been utilized
2419 clearBlocked(Blocked_NoMSHRs
);
2425 // either a prefetch that is not present upstream, or a normal
2426 // MSHR request, proceed to get the packet to send downstream
2427 PacketPtr pkt
= createMissPacket(tgt_pkt
, blk
, mshr
->needsWritable());
2429 mshr
->isForward
= (pkt
== nullptr);
2431 if (mshr
->isForward
) {
2432 // not a cache block request, but a response is expected
2433 // make copy of current packet to forward, keep current
2434 // copy for response handling
2435 pkt
= new Packet(tgt_pkt
, false, true);
2436 assert(!pkt
->isWrite());
2439 // play it safe and append (rather than set) the sender state,
2440 // as forwarded packets may already have existing state
2441 pkt
->pushSenderState(mshr
);
2443 if (!memSidePort
->sendTimingReq(pkt
)) {
2444 // we are awaiting a retry, but we
2445 // delete the packet and will be creating a new packet
2446 // when we get the opportunity
2449 // note that we have now masked any requestBus and
2450 // schedSendEvent (we will wait for a retry before
2451 // doing anything), and this is so even if we do not
2452 // care about this packet and might override it before
2456 // As part of the call to sendTimingReq the packet is
2457 // forwarded to all neighbouring caches (and any caches
2458 // above them) as a snoop. Thus at this point we know if
2459 // any of the neighbouring caches are responding, and if
2460 // so, we know it is dirty, and we can determine if it is
2461 // being passed as Modified, making our MSHR the ordering
2463 bool pending_modified_resp
= !pkt
->hasSharers() &&
2464 pkt
->cacheResponding();
2465 markInService(mshr
, pending_modified_resp
);
2471 Cache::sendWriteQueuePacket(WriteQueueEntry
* wq_entry
)
2475 // always a single target for write queue entries
2476 PacketPtr tgt_pkt
= wq_entry
->getTarget()->pkt
;
2478 DPRINTF(Cache
, "%s: write %s\n", __func__
, tgt_pkt
->print());
2480 // forward as is, both for evictions and uncacheable writes
2481 if (!memSidePort
->sendTimingReq(tgt_pkt
)) {
2482 // note that we have now masked any requestBus and
2483 // schedSendEvent (we will wait for a retry before
2484 // doing anything), and this is so even if we do not
2485 // care about this packet and might override it before
2489 markInService(wq_entry
);
2495 Cache::serialize(CheckpointOut
&cp
) const
2497 bool dirty(isDirty());
2500 warn("*** The cache still contains dirty data. ***\n");
2501 warn(" Make sure to drain the system using the correct flags.\n");
2502 warn(" This checkpoint will not restore correctly and dirty data "
2503 " in the cache will be lost!\n");
2506 // Since we don't checkpoint the data in the cache, any dirty data
2507 // will be lost when restoring from a checkpoint of a system that
2508 // wasn't drained properly. Flag the checkpoint as invalid if the
2509 // cache contains dirty data.
2510 bool bad_checkpoint(dirty
);
2511 SERIALIZE_SCALAR(bad_checkpoint
);
2515 Cache::unserialize(CheckpointIn
&cp
)
2517 bool bad_checkpoint
;
2518 UNSERIALIZE_SCALAR(bad_checkpoint
);
2519 if (bad_checkpoint
) {
2520 fatal("Restoring from checkpoints with dirty caches is not supported "
2521 "in the classic memory system. Please remove any caches or "
2522 " drain them properly before taking checkpoints.\n");
2533 Cache::CpuSidePort::getAddrRanges() const
2535 return cache
->getAddrRanges();
2539 Cache::CpuSidePort::recvTimingReq(PacketPtr pkt
)
2541 assert(!cache
->system
->bypassCaches());
2543 bool success
= false;
2545 // always let express snoop packets through if even if blocked
2546 if (pkt
->isExpressSnoop()) {
2547 // do not change the current retry state
2548 bool M5_VAR_USED bypass_success
= cache
->recvTimingReq(pkt
);
2549 assert(bypass_success
);
2551 } else if (blocked
|| mustSendRetry
) {
2552 // either already committed to send a retry, or blocked
2555 // pass it on to the cache, and let the cache decide if we
2556 // have to retry or not
2557 success
= cache
->recvTimingReq(pkt
);
2560 // remember if we have to retry
2561 mustSendRetry
= !success
;
2566 Cache::CpuSidePort::recvAtomic(PacketPtr pkt
)
2568 return cache
->recvAtomic(pkt
);
2572 Cache::CpuSidePort::recvFunctional(PacketPtr pkt
)
2574 // functional request
2575 cache
->functionalAccess(pkt
, true);
2579 CpuSidePort::CpuSidePort(const std::string
&_name
, Cache
*_cache
,
2580 const std::string
&_label
)
2581 : BaseCache::CacheSlavePort(_name
, _cache
, _label
), cache(_cache
)
2586 CacheParams::create()
2590 return new Cache(this);
2599 Cache::MemSidePort::recvTimingResp(PacketPtr pkt
)
2601 cache
->recvTimingResp(pkt
);
2605 // Express snooping requests to memside port
2607 Cache::MemSidePort::recvTimingSnoopReq(PacketPtr pkt
)
2609 // handle snooping requests
2610 cache
->recvTimingSnoopReq(pkt
);
2614 Cache::MemSidePort::recvAtomicSnoop(PacketPtr pkt
)
2616 return cache
->recvAtomicSnoop(pkt
);
2620 Cache::MemSidePort::recvFunctionalSnoop(PacketPtr pkt
)
2622 // functional snoop (note that in contrast to atomic we don't have
2623 // a specific functionalSnoop method, as they have the same
2624 // behaviour regardless)
2625 cache
->functionalAccess(pkt
, false);
2629 Cache::CacheReqPacketQueue::sendDeferredPacket()
2632 assert(!waitingOnRetry
);
2634 // there should never be any deferred request packets in the
2635 // queue, instead we resly on the cache to provide the packets
2636 // from the MSHR queue or write queue
2637 assert(deferredPacketReadyTime() == MaxTick
);
2639 // check for request packets (requests & writebacks)
2640 QueueEntry
* entry
= cache
.getNextQueueEntry();
2643 // can happen if e.g. we attempt a writeback and fail, but
2644 // before the retry, the writeback is eliminated because
2645 // we snoop another cache's ReadEx.
2647 // let our snoop responses go first if there are responses to
2648 // the same addresses
2649 if (checkConflictingSnoop(entry
->blkAddr
)) {
2652 waitingOnRetry
= entry
->sendPacket(cache
);
2655 // if we succeeded and are not waiting for a retry, schedule the
2656 // next send considering when the next queue is ready, note that
2657 // snoop responses have their own packet queue and thus schedule
2659 if (!waitingOnRetry
) {
2660 schedSendEvent(cache
.nextQueueReadyTime());
2665 MemSidePort::MemSidePort(const std::string
&_name
, Cache
*_cache
,
2666 const std::string
&_label
)
2667 : BaseCache::CacheMasterPort(_name
, _cache
, _reqQueue
, _snoopRespQueue
),
2668 _reqQueue(*_cache
, *this, _snoopRespQueue
, _label
),
2669 _snoopRespQueue(*_cache
, *this, _label
), cache(_cache
)