2 * Copyright (c) 2003-2005 The Regents of The University of Michigan
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28 * Authors: Erik Hallnor
31 #ifndef __UNI_COHERENCE_HH__
32 #define __UNI_COHERENCE_HH__
34 #include "base/trace.hh"
35 #include "base/misc.hh"
36 #include "mem/cache/cache_blk.hh"
37 #include "mem/cache/miss/mshr_queue.hh"
38 #include "mem/packet.hh"
45 /** Buffers to hold forwarded invalidates. */
47 /** Pointer to the parent cache. */
52 * Construct and initialize this coherence policy.
57 * Set the pointer to the parent cache.
58 * @param _cache The parent cache.
60 void setCache(BaseCache *_cache)
66 * Register statistics.
67 * @param name The name to prepend to stat descriptions.
69 void regStats(const std::string &name)
75 * @param cmd The request's command.
76 * @param state The current state of the cache block.
77 * @return The proper bus command, as determined by the protocol.
78 * @todo Make changes so writebacks don't get here.
80 Packet::Command getBusCmd(Packet::Command &cmd, CacheBlk::State state)
82 if (cmd == Packet::HardPFReq && state)
83 warn("Trying to issue a prefetch to a block we already have\n");
84 if (cmd == Packet::Writeback)
85 return Packet::Writeback;
86 return Packet::ReadReq;
90 * Just return readable and writeable.
91 * @param pkt The bus response.
92 * @param current The current block state.
93 * @return The new state.
95 CacheBlk::State getNewState(Packet * &pkt, CacheBlk::State current)
97 if (pkt->senderState) //Blocking Buffers don't get mshrs
99 if (((MSHR *)(pkt->senderState))->originalCmd == Packet::HardPFReq) {
100 DPRINTF(HWPrefetch, "Marking a hardware prefetch as such in the state\n");
101 return BlkHWPrefetched | BlkValid | BlkWritable;
104 return BlkValid | BlkWritable;
107 //@todo What about prefetching with blocking buffers
109 return BlkValid | BlkWritable;
113 * Return outstanding invalidate to forward.
114 * @return The next invalidate to forward to lower levels of cache.
116 Packet * getPacket();
119 * Was the CSHR request was sent successfully?
120 * @param pkt The request.
121 * @param success True if the request was sent successfully.
123 void sendResult(Packet * &pkt, MSHR* cshr, bool success);
126 * Handle snooped bus requests.
127 * @param pkt The snooped bus request.
128 * @param blk The cache block corresponding to the request, if any.
129 * @param mshr The MSHR corresponding to the request, if any.
130 * @param new_state The new coherence state of the block.
131 * @return True if the request should be satisfied locally.
133 bool handleBusRequest(Packet * &pkt, CacheBlk *blk, MSHR *mshr,
134 CacheBlk::State &new_state);
137 * Return true if this coherence policy can handle fast cache writes.
139 bool allowFastWrites() { return true; }
141 bool hasProtocol() { return false; }
144 #endif //__UNI_COHERENCE_HH__