src/mem/cache/miss/mshr.cc

   1 /*
   2  * Copyright (c) 2002-2005 The Regents of The University of Michigan
   3  * All rights reserved.
   4  *
   5  * Redistribution and use in source and binary forms, with or without
   6  * modification, are permitted provided that the following conditions are
   7  * met: redistributions of source code must retain the above copyright
   8  * notice, this list of conditions and the following disclaimer;
   9  * redistributions in binary form must reproduce the above copyright
  10  * notice, this list of conditions and the following disclaimer in the
  11  * documentation and/or other materials provided with the distribution;
  12  * neither the name of the copyright holders nor the names of its
  13  * contributors may be used to endorse or promote products derived from
  14  * this software without specific prior written permission.
  15  *
  16  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  17  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  18  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  19  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  20  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  21  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  22  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  23  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  24  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  25  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  26  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  27  *
  28  * Authors: Erik Hallnor
  29  *          Dave Greene
  30  */
  31
  32 /**
  33  * @file
  34  * Miss Status and Handling Register (MSHR) definitions.
  35  */
  36
  37 #include <assert.h>
  38 #include <string>
  39 #include <vector>
  40
  41 #include "mem/cache/miss/mshr.hh"
  42 #include "sim/root.hh" // for curTick
  43 #include "sim/host.hh"
  44 #include "base/misc.hh"
  45 #include "mem/cache/cache.hh"
  46
  47 using namespace std;
  48
  49 MSHR::MSHR()
  50 {
  51     inService = false;
  52     ntargets = 0;
  53     threadNum = -1;
  54 }
  55
  56 void
  57 MSHR::allocate(Packet::Command cmd, Addr _addr, int size,
  58                Packet * &target)
  59 {
  60     addr = _addr;
  61     if (target)
  62     {
  63         //Have a request, just use it
  64         pkt = new Packet(target->req, cmd, Packet::Broadcast, size);
  65         pkt->time = curTick;
  66         pkt->allocate();
  67         pkt->senderState = (Packet::SenderState *)this;
  68         allocateTarget(target);
  69     }
  70     else
  71     {
  72         //need a request first
  73         Request * req = new Request();
  74         req->setPhys(addr, size, 0);
  75         //Thread context??
  76         pkt = new Packet(req, cmd, Packet::Broadcast, size);
  77         pkt->time = curTick;
  78         pkt->allocate();
  79         pkt->senderState = (Packet::SenderState *)this;
  80     }
  81 }
  82
  83 // Since we aren't sure if data is being used, don't copy here.
  84 /**
  85  * @todo When we have a "global" data flag, might want to copy data here.
  86  */
  87 void
  88 MSHR::allocateAsBuffer(Packet * &target)
  89 {
  90     addr = target->getAddr();
  91     threadNum = 0/*target->req->getThreadNum()*/;
  92     pkt = new Packet(target->req, target->cmd, -1);
  93     pkt->allocate();
  94     pkt->senderState = (Packet::SenderState*)this;
  95     pkt->time = curTick;
  96 }
  97
  98 void
  99 MSHR::deallocate()
 100 {
 101     assert(targets.empty());
 102     assert(ntargets == 0);
 103     pkt = NULL;
 104     inService = false;
 105     //allocIter = NULL;
 106     //readyIter = NULL;
 107 }
 108
 109 /*
 110  * Adds a target to an MSHR
 111  */
 112 void
 113 MSHR::allocateTarget(Packet * &target)
 114 {
 115     //If we append an invalidate and we issued a read to the bus,
 116     //but now have some pending writes, we need to move
 117     //the invalidate to before the first non-read
 118     if (inService && pkt->isRead() && target->isInvalidate()) {
 119         std::list<Packet *> temp;
 120
 121         while (!targets.empty()) {
 122             if (!targets.front()->isRead()) break;
 123             //Place on top of temp stack
 124             temp.push_front(targets.front());
 125             //Remove from targets
 126             targets.pop_front();
 127         }
 128
 129         //Now that we have all the reads off until first non-read, we can
 130         //place the invalidate on
 131         targets.push_front(target);
 132
 133         //Now we pop off the temp_stack and put them back
 134         while (!temp.empty()) {
 135             targets.push_front(temp.front());
 136             temp.pop_front();
 137         }
 138     }
 139     else {
 140         targets.push_back(target);
 141     }
 142
 143     ++ntargets;
 144     assert(targets.size() == ntargets);
 145     /**
 146      * @todo really prioritize the target commands.
 147      */
 148
 149     if (!inService && target->isWrite()) {
 150         pkt->cmd = Packet::WriteReq;
 151     }
 152 }
 153
 154
 155
 156 void
 157 MSHR::dump()
 158 {
 159     ccprintf(cerr,
 160              "inService: %d thread: %d\n"
 161              "Addr: %x ntargets %d\n"
 162              "Targets:\n",
 163              inService, threadNum, addr, ntargets);
 164
 165     TargetListIterator tar_it = targets.begin();
 166     for (int i = 0; i < ntargets; i++) {
 167         assert(tar_it != targets.end());
 168
 169         ccprintf(cerr, "\t%d: Addr: %x cmd: %d\n",
 170                  i, (*tar_it)->getAddr(), (*tar_it)->cmdToIndex());
 171
 172         tar_it++;
 173     }
 174     ccprintf(cerr, "\n");
 175 }
 176
 177 MSHR::~MSHR()
 178 {
 179     if (pkt)
 180         pkt = NULL;
 181 }