misc: Replaced master/slave terminology
[gem5.git] / src / mem / cache / prefetch / Prefetcher.py
1 # Copyright (c) 2012, 2014, 2019 ARM Limited
2 # All rights reserved.
3 #
4 # The license below extends only to copyright in the software and shall
5 # not be construed as granting a license to any other intellectual
6 # property including but not limited to intellectual property relating
7 # to a hardware implementation of the functionality of the software
8 # licensed hereunder. You may use the software subject to the license
9 # terms below provided that you ensure that this notice is replicated
10 # unmodified and in its entirety in all distributions of the software,
11 # modified or unmodified, in source code or in binary form.
12 #
13 # Copyright (c) 2005 The Regents of The University of Michigan
14 # All rights reserved.
15 #
16 # Redistribution and use in source and binary forms, with or without
17 # modification, are permitted provided that the following conditions are
18 # met: redistributions of source code must retain the above copyright
19 # notice, this list of conditions and the following disclaimer;
20 # redistributions in binary form must reproduce the above copyright
21 # notice, this list of conditions and the following disclaimer in the
22 # documentation and/or other materials provided with the distribution;
23 # neither the name of the copyright holders nor the names of its
24 # contributors may be used to endorse or promote products derived from
25 # this software without specific prior written permission.
26 #
27 # THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 # "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 # LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
30 # A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
31 # OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
32 # SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
33 # LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
34 # DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
35 # THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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37 # OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
38
39 from m5.SimObject import *
40 from m5.params import *
41 from m5.proxy import *
42
43 from m5.objects.ClockedObject import ClockedObject
44 from m5.objects.IndexingPolicies import *
45 from m5.objects.ReplacementPolicies import *
46
47 class HWPProbeEvent(object):
48 def __init__(self, prefetcher, obj, *listOfNames):
49 self.obj = obj
50 self.prefetcher = prefetcher
51 self.names = listOfNames
52
53 def register(self):
54 if self.obj:
55 for name in self.names:
56 self.prefetcher.getCCObject().addEventProbe(
57 self.obj.getCCObject(), name)
58
59 class BasePrefetcher(ClockedObject):
60 type = 'BasePrefetcher'
61 abstract = True
62 cxx_class = 'Prefetcher::Base'
63 cxx_header = "mem/cache/prefetch/base.hh"
64 cxx_exports = [
65 PyBindMethod("addEventProbe"),
66 PyBindMethod("addTLB"),
67 ]
68 sys = Param.System(Parent.any, "System this prefetcher belongs to")
69
70 # Get the block size from the parent (system)
71 block_size = Param.Int(Parent.cache_line_size, "Block size in bytes")
72
73 on_miss = Param.Bool(False, "Only notify prefetcher on misses")
74 on_read = Param.Bool(True, "Notify prefetcher on reads")
75 on_write = Param.Bool(True, "Notify prefetcher on writes")
76 on_data = Param.Bool(True, "Notify prefetcher on data accesses")
77 on_inst = Param.Bool(True, "Notify prefetcher on instruction accesses")
78 prefetch_on_access = Param.Bool(Parent.prefetch_on_access,
79 "Notify the hardware prefetcher on every access (not just misses)")
80 use_virtual_addresses = Param.Bool(False,
81 "Use virtual addresses for prefetching")
82
83 def __init__(self, **kwargs):
84 super(BasePrefetcher, self).__init__(**kwargs)
85 self._events = []
86 self._tlbs = []
87
88 def addEvent(self, newObject):
89 self._events.append(newObject)
90
91 # Override the normal SimObject::regProbeListeners method and
92 # register deferred event handlers.
93 def regProbeListeners(self):
94 for tlb in self._tlbs:
95 self.getCCObject().addTLB(tlb.getCCObject())
96 for event in self._events:
97 event.register()
98 self.getCCObject().regProbeListeners()
99
100 def listenFromProbe(self, simObj, *probeNames):
101 if not isinstance(simObj, SimObject):
102 raise TypeError("argument must be of SimObject type")
103 if len(probeNames) <= 0:
104 raise TypeError("probeNames must have at least one element")
105 self.addEvent(HWPProbeEvent(self, simObj, *probeNames))
106
107 def registerTLB(self, simObj):
108 if not isinstance(simObj, SimObject):
109 raise TypeError("argument must be a SimObject type")
110 self._tlbs.append(simObj)
111
112 class MultiPrefetcher(BasePrefetcher):
113 type = 'MultiPrefetcher'
114 cxx_class = 'Prefetcher::Multi'
115 cxx_header = 'mem/cache/prefetch/multi.hh'
116
117 prefetchers = VectorParam.BasePrefetcher([], "Array of prefetchers")
118
119 class QueuedPrefetcher(BasePrefetcher):
120 type = "QueuedPrefetcher"
121 abstract = True
122 cxx_class = "Prefetcher::Queued"
123 cxx_header = "mem/cache/prefetch/queued.hh"
124 latency = Param.Int(1, "Latency for generated prefetches")
125 queue_size = Param.Int(32, "Maximum number of queued prefetches")
126 max_prefetch_requests_with_pending_translation = Param.Int(32,
127 "Maximum number of queued prefetches that have a missing translation")
128 queue_squash = Param.Bool(True, "Squash queued prefetch on demand access")
129 queue_filter = Param.Bool(True, "Don't queue redundant prefetches")
130 cache_snoop = Param.Bool(False, "Snoop cache to eliminate redundant request")
131
132 tag_prefetch = Param.Bool(True, "Tag prefetch with PC of generating access")
133
134 # The throttle_control_percentage controls how many of the candidate
135 # addresses generated by the prefetcher will be finally turned into
136 # prefetch requests
137 # - If set to 100, all candidates can be discarded (one request
138 # will always be allowed to be generated)
139 # - Setting it to 0 will disable the throttle control, so requests are
140 # created for all candidates
141 # - If set to 60, 40% of candidates will generate a request, and the
142 # remaining 60% will be generated depending on the current accuracy
143 throttle_control_percentage = Param.Percent(0, "Percentage of requests \
144 that can be throttled depending on the accuracy of the prefetcher.")
145
146 class StridePrefetcherHashedSetAssociative(SetAssociative):
147 type = 'StridePrefetcherHashedSetAssociative'
148 cxx_class = 'Prefetcher::StridePrefetcherHashedSetAssociative'
149 cxx_header = "mem/cache/prefetch/stride.hh"
150
151 class StridePrefetcher(QueuedPrefetcher):
152 type = 'StridePrefetcher'
153 cxx_class = 'Prefetcher::Stride'
154 cxx_header = "mem/cache/prefetch/stride.hh"
155
156 # Do not consult stride prefetcher on instruction accesses
157 on_inst = False
158
159 confidence_counter_bits = Param.Unsigned(3,
160 "Number of bits of the confidence counter")
161 initial_confidence = Param.Unsigned(4,
162 "Starting confidence of new entries")
163 confidence_threshold = Param.Percent(50,
164 "Prefetch generation confidence threshold")
165
166 use_requestor_id = Param.Bool(True, "Use requestor id based history")
167
168 degree = Param.Int(4, "Number of prefetches to generate")
169
170 table_assoc = Param.Int(4, "Associativity of the PC table")
171 table_entries = Param.MemorySize("64", "Number of entries of the PC table")
172 table_indexing_policy = Param.BaseIndexingPolicy(
173 StridePrefetcherHashedSetAssociative(entry_size = 1,
174 assoc = Parent.table_assoc, size = Parent.table_entries),
175 "Indexing policy of the PC table")
176 table_replacement_policy = Param.BaseReplacementPolicy(RandomRP(),
177 "Replacement policy of the PC table")
178
179 class TaggedPrefetcher(QueuedPrefetcher):
180 type = 'TaggedPrefetcher'
181 cxx_class = 'Prefetcher::Tagged'
182 cxx_header = "mem/cache/prefetch/tagged.hh"
183
184 degree = Param.Int(2, "Number of prefetches to generate")
185
186 class IndirectMemoryPrefetcher(QueuedPrefetcher):
187 type = 'IndirectMemoryPrefetcher'
188 cxx_class = 'Prefetcher::IndirectMemory'
189 cxx_header = "mem/cache/prefetch/indirect_memory.hh"
190 pt_table_entries = Param.MemorySize("16",
191 "Number of entries of the Prefetch Table")
192 pt_table_assoc = Param.Unsigned(16, "Associativity of the Prefetch Table")
193 pt_table_indexing_policy = Param.BaseIndexingPolicy(
194 SetAssociative(entry_size = 1, assoc = Parent.pt_table_assoc,
195 size = Parent.pt_table_entries),
196 "Indexing policy of the pattern table")
197 pt_table_replacement_policy = Param.BaseReplacementPolicy(LRURP(),
198 "Replacement policy of the pattern table")
199 max_prefetch_distance = Param.Unsigned(16, "Maximum prefetch distance")
200 num_indirect_counter_bits = Param.Unsigned(3,
201 "Number of bits of the indirect counter")
202 ipd_table_entries = Param.MemorySize("4",
203 "Number of entries of the Indirect Pattern Detector")
204 ipd_table_assoc = Param.Unsigned(4,
205 "Associativity of the Indirect Pattern Detector")
206 ipd_table_indexing_policy = Param.BaseIndexingPolicy(
207 SetAssociative(entry_size = 1, assoc = Parent.ipd_table_assoc,
208 size = Parent.ipd_table_entries),
209 "Indexing policy of the Indirect Pattern Detector")
210 ipd_table_replacement_policy = Param.BaseReplacementPolicy(LRURP(),
211 "Replacement policy of the Indirect Pattern Detector")
212 shift_values = VectorParam.Int([2, 3, 4, -3], "Shift values to evaluate")
213 addr_array_len = Param.Unsigned(4, "Number of misses tracked")
214 prefetch_threshold = Param.Unsigned(2,
215 "Counter threshold to start the indirect prefetching")
216 stream_counter_threshold = Param.Unsigned(4,
217 "Counter threshold to enable the stream prefetcher")
218 streaming_distance = Param.Unsigned(4,
219 "Number of prefetches to generate when using the stream prefetcher")
220
221 class SignaturePathPrefetcher(QueuedPrefetcher):
222 type = 'SignaturePathPrefetcher'
223 cxx_class = 'Prefetcher::SignaturePath'
224 cxx_header = "mem/cache/prefetch/signature_path.hh"
225
226 signature_shift = Param.UInt8(3,
227 "Number of bits to shift when calculating a new signature");
228 signature_bits = Param.UInt16(12,
229 "Size of the signature, in bits");
230 signature_table_entries = Param.MemorySize("1024",
231 "Number of entries of the signature table")
232 signature_table_assoc = Param.Unsigned(2,
233 "Associativity of the signature table")
234 signature_table_indexing_policy = Param.BaseIndexingPolicy(
235 SetAssociative(entry_size = 1, assoc = Parent.signature_table_assoc,
236 size = Parent.signature_table_entries),
237 "Indexing policy of the signature table")
238 signature_table_replacement_policy = Param.BaseReplacementPolicy(LRURP(),
239 "Replacement policy of the signature table")
240
241 num_counter_bits = Param.UInt8(3,
242 "Number of bits of the saturating counters")
243 pattern_table_entries = Param.MemorySize("4096",
244 "Number of entries of the pattern table")
245 pattern_table_assoc = Param.Unsigned(1,
246 "Associativity of the pattern table")
247 strides_per_pattern_entry = Param.Unsigned(4,
248 "Number of strides stored in each pattern entry")
249 pattern_table_indexing_policy = Param.BaseIndexingPolicy(
250 SetAssociative(entry_size = 1, assoc = Parent.pattern_table_assoc,
251 size = Parent.pattern_table_entries),
252 "Indexing policy of the pattern table")
253 pattern_table_replacement_policy = Param.BaseReplacementPolicy(LRURP(),
254 "Replacement policy of the pattern table")
255
256 prefetch_confidence_threshold = Param.Float(0.5,
257 "Minimum confidence to issue prefetches")
258 lookahead_confidence_threshold = Param.Float(0.75,
259 "Minimum confidence to continue exploring lookahead entries")
260
261 class SignaturePathPrefetcherV2(SignaturePathPrefetcher):
262 type = 'SignaturePathPrefetcherV2'
263 cxx_class = 'Prefetcher::SignaturePathV2'
264 cxx_header = "mem/cache/prefetch/signature_path_v2.hh"
265
266 signature_table_entries = "256"
267 signature_table_assoc = 1
268 pattern_table_entries = "512"
269 pattern_table_assoc = 1
270 num_counter_bits = 4
271 prefetch_confidence_threshold = 0.25
272 lookahead_confidence_threshold = 0.25
273
274 global_history_register_entries = Param.MemorySize("8",
275 "Number of entries of global history register")
276 global_history_register_indexing_policy = Param.BaseIndexingPolicy(
277 SetAssociative(entry_size = 1,
278 assoc = Parent.global_history_register_entries,
279 size = Parent.global_history_register_entries),
280 "Indexing policy of the global history register")
281 global_history_register_replacement_policy = Param.BaseReplacementPolicy(
282 LRURP(), "Replacement policy of the global history register")
283
284 class AccessMapPatternMatching(ClockedObject):
285 type = 'AccessMapPatternMatching'
286 cxx_class = 'Prefetcher::AccessMapPatternMatching'
287 cxx_header = "mem/cache/prefetch/access_map_pattern_matching.hh"
288
289 block_size = Param.Unsigned(Parent.block_size,
290 "Cacheline size used by the prefetcher using this object")
291
292 limit_stride = Param.Unsigned(0,
293 "Limit the strides checked up to -X/X, if 0, disable the limit")
294 start_degree = Param.Unsigned(4,
295 "Initial degree (Maximum number of prefetches generated")
296 hot_zone_size = Param.MemorySize("2kB", "Memory covered by a hot zone")
297 access_map_table_entries = Param.MemorySize("256",
298 "Number of entries in the access map table")
299 access_map_table_assoc = Param.Unsigned(8,
300 "Associativity of the access map table")
301 access_map_table_indexing_policy = Param.BaseIndexingPolicy(
302 SetAssociative(entry_size = 1, assoc = Parent.access_map_table_assoc,
303 size = Parent.access_map_table_entries),
304 "Indexing policy of the access map table")
305 access_map_table_replacement_policy = Param.BaseReplacementPolicy(LRURP(),
306 "Replacement policy of the access map table")
307 high_coverage_threshold = Param.Float(0.25,
308 "A prefetch coverage factor bigger than this is considered high")
309 low_coverage_threshold = Param.Float(0.125,
310 "A prefetch coverage factor smaller than this is considered low")
311 high_accuracy_threshold = Param.Float(0.5,
312 "A prefetch accuracy factor bigger than this is considered high")
313 low_accuracy_threshold = Param.Float(0.25,
314 "A prefetch accuracy factor smaller than this is considered low")
315 high_cache_hit_threshold = Param.Float(0.875,
316 "A cache hit ratio bigger than this is considered high")
317 low_cache_hit_threshold = Param.Float(0.75,
318 "A cache hit ratio smaller than this is considered low")
319 epoch_cycles = Param.Cycles(256000, "Cycles in an epoch period")
320 offchip_memory_latency = Param.Latency("30ns",
321 "Memory latency used to compute the required memory bandwidth")
322
323 class AMPMPrefetcher(QueuedPrefetcher):
324 type = 'AMPMPrefetcher'
325 cxx_class = 'Prefetcher::AMPM'
326 cxx_header = "mem/cache/prefetch/access_map_pattern_matching.hh"
327 ampm = Param.AccessMapPatternMatching( AccessMapPatternMatching(),
328 "Access Map Pattern Matching object")
329
330 class DeltaCorrelatingPredictionTables(SimObject):
331 type = 'DeltaCorrelatingPredictionTables'
332 cxx_class = 'Prefetcher::DeltaCorrelatingPredictionTables'
333 cxx_header = "mem/cache/prefetch/delta_correlating_prediction_tables.hh"
334 deltas_per_entry = Param.Unsigned(20,
335 "Number of deltas stored in each table entry")
336 delta_bits = Param.Unsigned(12, "Bits per delta")
337 delta_mask_bits = Param.Unsigned(8,
338 "Lower bits to mask when comparing deltas")
339 table_entries = Param.MemorySize("128",
340 "Number of entries in the table")
341 table_assoc = Param.Unsigned(128,
342 "Associativity of the table")
343 table_indexing_policy = Param.BaseIndexingPolicy(
344 SetAssociative(entry_size = 1, assoc = Parent.table_assoc,
345 size = Parent.table_entries),
346 "Indexing policy of the table")
347 table_replacement_policy = Param.BaseReplacementPolicy(LRURP(),
348 "Replacement policy of the table")
349
350 class DCPTPrefetcher(QueuedPrefetcher):
351 type = 'DCPTPrefetcher'
352 cxx_class = 'Prefetcher::DCPT'
353 cxx_header = "mem/cache/prefetch/delta_correlating_prediction_tables.hh"
354 dcpt = Param.DeltaCorrelatingPredictionTables(
355 DeltaCorrelatingPredictionTables(),
356 "Delta Correlating Prediction Tables object")
357
358 class IrregularStreamBufferPrefetcher(QueuedPrefetcher):
359 type = "IrregularStreamBufferPrefetcher"
360 cxx_class = "Prefetcher::IrregularStreamBuffer"
361 cxx_header = "mem/cache/prefetch/irregular_stream_buffer.hh"
362
363 num_counter_bits = Param.Unsigned(2,
364 "Number of bits of the confidence counter")
365 chunk_size = Param.Unsigned(256,
366 "Maximum number of addresses in a temporal stream")
367 degree = Param.Unsigned(4, "Number of prefetches to generate")
368 training_unit_assoc = Param.Unsigned(128,
369 "Associativity of the training unit")
370 training_unit_entries = Param.MemorySize("128",
371 "Number of entries of the training unit")
372 training_unit_indexing_policy = Param.BaseIndexingPolicy(
373 SetAssociative(entry_size = 1, assoc = Parent.training_unit_assoc,
374 size = Parent.training_unit_entries),
375 "Indexing policy of the training unit")
376 training_unit_replacement_policy = Param.BaseReplacementPolicy(LRURP(),
377 "Replacement policy of the training unit")
378
379 prefetch_candidates_per_entry = Param.Unsigned(16,
380 "Number of prefetch candidates stored in a SP-AMC entry")
381 address_map_cache_assoc = Param.Unsigned(128,
382 "Associativity of the PS/SP AMCs")
383 address_map_cache_entries = Param.MemorySize("128",
384 "Number of entries of the PS/SP AMCs")
385 ps_address_map_cache_indexing_policy = Param.BaseIndexingPolicy(
386 SetAssociative(entry_size = 1,
387 assoc = Parent.address_map_cache_assoc,
388 size = Parent.address_map_cache_entries),
389 "Indexing policy of the Physical-to-Structural Address Map Cache")
390 ps_address_map_cache_replacement_policy = Param.BaseReplacementPolicy(
391 LRURP(),
392 "Replacement policy of the Physical-to-Structural Address Map Cache")
393 sp_address_map_cache_indexing_policy = Param.BaseIndexingPolicy(
394 SetAssociative(entry_size = 1,
395 assoc = Parent.address_map_cache_assoc,
396 size = Parent.address_map_cache_entries),
397 "Indexing policy of the Structural-to-Physical Address Mao Cache")
398 sp_address_map_cache_replacement_policy = Param.BaseReplacementPolicy(
399 LRURP(),
400 "Replacement policy of the Structural-to-Physical Address Map Cache")
401
402 class SlimAccessMapPatternMatching(AccessMapPatternMatching):
403 start_degree = 2
404 limit_stride = 4
405
406 class SlimDeltaCorrelatingPredictionTables(DeltaCorrelatingPredictionTables):
407 table_entries = "256"
408 table_assoc = 256
409 deltas_per_entry = 9
410
411 class SlimAMPMPrefetcher(QueuedPrefetcher):
412 type = 'SlimAMPMPrefetcher'
413 cxx_class = 'Prefetcher::SlimAMPM'
414 cxx_header = "mem/cache/prefetch/slim_ampm.hh"
415
416 ampm = Param.AccessMapPatternMatching(SlimAccessMapPatternMatching(),
417 "Access Map Pattern Matching object")
418 dcpt = Param.DeltaCorrelatingPredictionTables(
419 SlimDeltaCorrelatingPredictionTables(),
420 "Delta Correlating Prediction Tables object")
421
422 class BOPPrefetcher(QueuedPrefetcher):
423 type = "BOPPrefetcher"
424 cxx_class = "Prefetcher::BOP"
425 cxx_header = "mem/cache/prefetch/bop.hh"
426 score_max = Param.Unsigned(31, "Max. score to update the best offset")
427 round_max = Param.Unsigned(100, "Max. round to update the best offset")
428 bad_score = Param.Unsigned(10, "Score at which the HWP is disabled")
429 rr_size = Param.Unsigned(64, "Number of entries of each RR bank")
430 tag_bits = Param.Unsigned(12, "Bits used to store the tag")
431 offset_list_size = Param.Unsigned(46,
432 "Number of entries in the offsets list")
433 negative_offsets_enable = Param.Bool(True,
434 "Initialize the offsets list also with negative values \
435 (i.e. the table will have half of the entries with positive \
436 offsets and the other half with negative ones)")
437 delay_queue_enable = Param.Bool(True, "Enable the delay queue")
438 delay_queue_size = Param.Unsigned(15,
439 "Number of entries in the delay queue")
440 delay_queue_cycles = Param.Cycles(60,
441 "Cycles to delay a write in the left RR table from the delay \
442 queue")
443
444 class SBOOEPrefetcher(QueuedPrefetcher):
445 type = 'SBOOEPrefetcher'
446 cxx_class = 'Prefetcher::SBOOE'
447 cxx_header = "mem/cache/prefetch/sbooe.hh"
448 latency_buffer_size = Param.Int(32, "Entries in the latency buffer")
449 sequential_prefetchers = Param.Int(9, "Number of sequential prefetchers")
450 sandbox_entries = Param.Int(1024, "Size of the address buffer")
451 score_threshold_pct = Param.Percent(25, "Min. threshold to issue a \
452 prefetch. The value is the percentage of sandbox entries to use")
453
454 class STeMSPrefetcher(QueuedPrefetcher):
455 type = "STeMSPrefetcher"
456 cxx_class = "Prefetcher::STeMS"
457 cxx_header = "mem/cache/prefetch/spatio_temporal_memory_streaming.hh"
458
459 spatial_region_size = Param.MemorySize("2kB",
460 "Memory covered by a hot zone")
461 active_generation_table_entries = Param.MemorySize("64",
462 "Number of entries in the active generation table")
463 active_generation_table_assoc = Param.Unsigned(64,
464 "Associativity of the active generation table")
465 active_generation_table_indexing_policy = Param.BaseIndexingPolicy(
466 SetAssociative(entry_size = 1,
467 assoc = Parent.active_generation_table_assoc,
468 size = Parent.active_generation_table_entries),
469 "Indexing policy of the active generation table")
470 active_generation_table_replacement_policy = Param.BaseReplacementPolicy(
471 LRURP(), "Replacement policy of the active generation table")
472
473 pattern_sequence_table_entries = Param.MemorySize("16384",
474 "Number of entries in the pattern sequence table")
475 pattern_sequence_table_assoc = Param.Unsigned(16384,
476 "Associativity of the pattern sequence table")
477 pattern_sequence_table_indexing_policy = Param.BaseIndexingPolicy(
478 SetAssociative(entry_size = 1,
479 assoc = Parent.pattern_sequence_table_assoc,
480 size = Parent.pattern_sequence_table_entries),
481 "Indexing policy of the pattern sequence table")
482 pattern_sequence_table_replacement_policy = Param.BaseReplacementPolicy(
483 LRURP(), "Replacement policy of the pattern sequence table")
484
485 region_miss_order_buffer_entries = Param.Unsigned(131072,
486 "Number of entries of the Region Miss Order Buffer")
487 reconstruction_entries = Param.Unsigned(256,
488 "Number of reconstruction entries")
489
490 class HWPProbeEventRetiredInsts(HWPProbeEvent):
491 def register(self):
492 if self.obj:
493 for name in self.names:
494 self.prefetcher.getCCObject().addEventProbeRetiredInsts(
495 self.obj.getCCObject(), name)
496
497 class PIFPrefetcher(QueuedPrefetcher):
498 type = 'PIFPrefetcher'
499 cxx_class = 'Prefetcher::PIF'
500 cxx_header = "mem/cache/prefetch/pif.hh"
501 cxx_exports = [
502 PyBindMethod("addEventProbeRetiredInsts"),
503 ]
504
505 prec_spatial_region_bits = Param.Unsigned(2,
506 "Number of preceding addresses in the spatial region")
507 succ_spatial_region_bits = Param.Unsigned(8,
508 "Number of subsequent addresses in the spatial region")
509 compactor_entries = Param.Unsigned(2, "Entries in the temp. compactor")
510 stream_address_buffer_entries = Param.Unsigned(7, "Entries in the SAB")
511 history_buffer_size = Param.Unsigned(16, "Entries in the history buffer")
512
513 index_entries = Param.MemorySize("64",
514 "Number of entries in the index")
515 index_assoc = Param.Unsigned(64,
516 "Associativity of the index")
517 index_indexing_policy = Param.BaseIndexingPolicy(
518 SetAssociative(entry_size = 1, assoc = Parent.index_assoc,
519 size = Parent.index_entries),
520 "Indexing policy of the index")
521 index_replacement_policy = Param.BaseReplacementPolicy(LRURP(),
522 "Replacement policy of the index")
523
524 def listenFromProbeRetiredInstructions(self, simObj):
525 if not isinstance(simObj, SimObject):
526 raise TypeError("argument must be of SimObject type")
527 self.addEvent(HWPProbeEventRetiredInsts(self, simObj,"RetiredInstsPC"))