sim: Include object header files in SWIG interfaces
[gem5.git] / src / mem / cache / prefetch / Prefetcher.py
1 # Copyright (c) 2012 ARM Limited
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7 # to a hardware implementation of the functionality of the software
8 # licensed hereunder. You may use the software subject to the license
9 # terms below provided that you ensure that this notice is replicated
10 # unmodified and in its entirety in all distributions of the software,
11 # modified or unmodified, in source code or in binary form.
12 #
13 # Copyright (c) 2005 The Regents of The University of Michigan
14 # All rights reserved.
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16 # Redistribution and use in source and binary forms, with or without
17 # modification, are permitted provided that the following conditions are
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25 # this software without specific prior written permission.
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27 # THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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38 #
39 # Authors: Ron Dreslinski
40
41 from ClockedObject import ClockedObject
42 from m5.params import *
43 from m5.proxy import *
44
45 class BasePrefetcher(ClockedObject):
46 type = 'BasePrefetcher'
47 abstract = True
48 cxx_header = "mem/cache/prefetch/base.hh"
49 size = Param.Int(100,
50 "Number of entries in the hardware prefetch queue")
51 cross_pages = Param.Bool(False,
52 "Allow prefetches to cross virtual page boundaries")
53 serial_squash = Param.Bool(False,
54 "Squash prefetches with a later time on a subsequent miss")
55 degree = Param.Int(1,
56 "Degree of the prefetch depth")
57 latency = Param.Cycles('1', "Latency of the prefetcher")
58 use_master_id = Param.Bool(True,
59 "Use the master id to separate calculations of prefetches")
60 data_accesses_only = Param.Bool(False,
61 "Only prefetch on data not on instruction accesses")
62 sys = Param.System(Parent.any, "System this device belongs to")
63
64 class GHBPrefetcher(BasePrefetcher):
65 type = 'GHBPrefetcher'
66 cxx_class = 'GHBPrefetcher'
67 cxx_header = "mem/cache/prefetch/ghb.hh"
68
69 class StridePrefetcher(BasePrefetcher):
70 type = 'StridePrefetcher'
71 cxx_class = 'StridePrefetcher'
72 cxx_header = "mem/cache/prefetch/stride.hh"
73
74 class TaggedPrefetcher(BasePrefetcher):
75 type = 'TaggedPrefetcher'
76 cxx_class = 'TaggedPrefetcher'
77 cxx_header = "mem/cache/prefetch/tagged.hh"
78
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