Merge ktlim@zamp:./local/clean/tmp/test-regress
[gem5.git] / src / mem / cache / prefetch / tagged_prefetcher.hh
1 /*
2 * Copyright (c) 2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Ron Dreslinski
29 */
30
31 /**
32 * @file
33 * Describes a tagged prefetcher based on template policies.
34 */
35
36 #ifndef __MEM_CACHE_PREFETCH_TAGGED_PREFETCHER_HH__
37 #define __MEM_CACHE_PREFETCH_TAGGED_PREFETCHER_HH__
38
39 #include "mem/cache/prefetch/prefetcher.hh"
40
41 /**
42 * A template-policy based cache. The behavior of the cache can be altered by
43 * supplying different template policies. TagStore handles all tag and data
44 * storage @sa TagStore. Buffering handles all misses and writes/writebacks
45 * @sa MissQueue. Coherence handles all coherence policy details @sa
46 * UniCoherence, SimpleMultiCoherence.
47 */
48 template <class TagStore, class Buffering>
49 class TaggedPrefetcher : public Prefetcher<TagStore, Buffering>
50 {
51 protected:
52
53 Buffering* mq;
54 TagStore* tags;
55
56 Tick latency;
57 int degree;
58
59 public:
60
61 TaggedPrefetcher(int size, bool pageStop, bool serialSquash,
62 bool cacheCheckPush, bool onlyData,
63 Tick latency, int degree);
64
65 ~TaggedPrefetcher() {}
66
67 void calculatePrefetch(PacketPtr &pkt, std::list<Addr> &addresses,
68 std::list<Tick> &delays);
69 };
70
71 #endif // __MEM_CACHE_PREFETCH_TAGGED_PREFETCHER_HH__