2 * Copyright (c) 2003-2005 The Regents of The University of Michigan
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14 * this software without specific prior written permission.
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28 * Authors: Erik Hallnor
33 * Definitions a fully associative LRU tagstore.
39 #include "base/intmath.hh"
40 #include "base/misc.hh"
41 #include "mem/cache/tags/fa_lru.hh"
45 FALRU::FALRU(unsigned _blkSize
, unsigned _size
, unsigned hit_latency
)
46 : blkSize(_blkSize
), size(_size
), hitLatency(hit_latency
)
48 if (!isPowerOf2(blkSize
))
49 fatal("cache block size (in bytes) `%d' must be a power of two",
51 if (!(hitLatency
> 0))
52 fatal("Access latency in cycles must be at least one cycle");
53 if (!isPowerOf2(size
))
54 fatal("Cache Size must be power of 2 for now");
56 // Track all cache sizes from 128K up by powers of 2
57 numCaches
= floorLog2(size
) - 17;
59 cacheBoundaries
= new FALRUBlk
*[numCaches
];
60 cacheMask
= (1 << numCaches
) - 1;
66 warmupBound
= size
/blkSize
;
67 numBlocks
= size
/blkSize
;
69 blks
= new FALRUBlk
[numBlocks
];
71 tail
= &(blks
[numBlocks
-1]);
74 head
->next
= &(blks
[1]);
75 head
->inCache
= cacheMask
;
77 tail
->prev
= &(blks
[numBlocks
-2]);
81 unsigned index
= (1 << 17) / blkSize
;
83 int flags
= cacheMask
;
84 for (unsigned i
= 1; i
< numBlocks
- 1; i
++) {
85 blks
[i
].inCache
= flags
;
87 cacheBoundaries
[j
] = &(blks
[i
]);
92 blks
[i
].prev
= &(blks
[i
-1]);
93 blks
[i
].next
= &(blks
[i
+1]);
94 blks
[i
].isTouched
= false;
96 assert(j
== numCaches
);
97 assert(index
== numBlocks
);
102 FALRU::regStats(const string
&name
)
104 using namespace Stats
;
105 BaseTags::regStats(name
);
108 .name(name
+ ".falru_hits")
109 .desc("The number of hits in each cache size.")
113 .name(name
+ ".falru_misses")
114 .desc("The number of misses in each cache size.")
117 .name(name
+ ".falru_accesses")
118 .desc("The number of accesses to the FA LRU cache.")
121 for (unsigned i
= 0; i
<= numCaches
; ++i
) {
122 stringstream size_str
;
124 size_str
<< (1<<(i
+7)) <<"K";
126 size_str
<< (1<<(i
-3)) <<"M";
129 hits
.subname(i
, size_str
.str());
130 hits
.subdesc(i
, "Hits in a " + size_str
.str() +" cache");
131 misses
.subname(i
, size_str
.str());
132 misses
.subdesc(i
, "Misses in a " + size_str
.str() +" cache");
137 FALRU::hashLookup(Addr addr
) const
139 tagIterator iter
= tagHash
.find(addr
);
140 if (iter
!= tagHash
.end()) {
141 return (*iter
).second
;
147 FALRU::invalidateBlk(FALRU::BlkType
*blk
)
151 blk
->isTouched
= false;
157 FALRU::accessBlock(Addr addr
, int &lat
, int context_src
, int *inCache
)
160 int tmp_in_cache
= 0;
161 Addr blkAddr
= blkAlign(addr
);
162 FALRUBlk
* blk
= hashLookup(blkAddr
);
164 if (blk
&& blk
->isValid()) {
165 assert(blk
->tag
== blkAddr
);
166 tmp_in_cache
= blk
->inCache
;
167 for (unsigned i
= 0; i
< numCaches
; i
++) {
168 if (1<<i
& blk
->inCache
) {
180 for (unsigned i
= 0; i
<= numCaches
; ++i
) {
185 *inCache
= tmp_in_cache
;
195 FALRU::findBlock(Addr addr
) const
197 Addr blkAddr
= blkAlign(addr
);
198 FALRUBlk
* blk
= hashLookup(blkAddr
);
200 if (blk
&& blk
->isValid()) {
201 assert(blk
->tag
== blkAddr
);
209 FALRU::findVictim(Addr addr
, PacketList
&writebacks
)
211 FALRUBlk
* blk
= tail
;
212 assert(blk
->inCache
== 0);
214 tagHash
.erase(blk
->tag
);
215 tagHash
[blkAlign(addr
)] = blk
;
216 if (blk
->isValid()) {
220 blk
->isTouched
= true;
221 if (!warmedUp
&& tagsInUse
.value() >= warmupBound
) {
223 warmupCycle
= curTick();
231 FALRU::insertBlock(Addr addr
, FALRU::BlkType
*blk
, int context_src
)
236 FALRU::moveToHead(FALRUBlk
*blk
)
238 int updateMask
= blk
->inCache
^ cacheMask
;
239 for (unsigned i
= 0; i
< numCaches
; i
++){
240 if ((1<<i
) & updateMask
) {
241 cacheBoundaries
[i
]->inCache
&= ~(1<<i
);
242 cacheBoundaries
[i
] = cacheBoundaries
[i
]->prev
;
243 } else if (cacheBoundaries
[i
] == blk
) {
244 cacheBoundaries
[i
] = blk
->prev
;
247 blk
->inCache
= cacheMask
;
250 assert(blk
->next
== NULL
);
254 blk
->prev
->next
= blk
->next
;
255 blk
->next
->prev
= blk
->prev
;
267 FALRUBlk
* blk
= head
;
269 int boundary
= 1<<17;
271 int flags
= cacheMask
;
274 if (blk
->inCache
!= flags
) {
277 if (size
== boundary
&& blk
!= tail
) {
278 if (cacheBoundaries
[j
] != blk
) {
282 boundary
= boundary
<<1;
293 for (int i
= 0; i
< numBlocks
; i
++){
294 blks
[i
].clearLoadLocks();