2 * Copyright (c) 2003-2005 The Regents of The University of Michigan
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28 * Authors: Erik Hallnor
33 * Declaration of a fully associative LRU tag store.
41 #include "mem/cache/cache_blk.hh"
42 #include "mem/packet.hh"
43 #include "base/hashmap.hh"
44 #include "mem/cache/tags/base_tags.hh"
47 * A fully associative cache block.
49 class FALRUBlk : public CacheBlk
52 /** The previous block in LRU order. */
54 /** The next block in LRU order. */
56 /** Has this block been touched? */
60 * A bit mask of the sizes of cache that this block is resident in.
61 * Each bit represents a power of 2 in MB size cache.
62 * If bit 0 is set, this block is in a 1MB cache
63 * If bit 2 is set, this block is in a 4MB cache, etc.
64 * There is one bit for each cache smaller than the full size (default
71 * A fully associative LRU cache. Keeps statistics for accesses to a number of
72 * cache sizes at once.
74 class FALRU : public BaseTags
77 /** Typedef the block type used in this class. */
78 typedef FALRUBlk BlkType;
79 /** Typedef a list of pointers to the local block type. */
80 typedef std::list<FALRUBlk*> BlkList;
82 /** The block size of the cache. */
84 /** The size of the cache. */
86 /** The number of blocks in the cache. */
87 const int numBlks; // calculated internally
88 /** The hit latency of the cache. */
91 /** Array of pointers to blocks at the cache size boundaries. */
92 FALRUBlk **cacheBoundaries;
93 /** A mask for the FALRUBlk::inCache bits. */
95 /** The number of different size caches being tracked. */
98 /** The cache blocks. */
101 /** The MRU block. */
103 /** The LRU block. */
106 /** Hash table type mapping addresses to cache block pointers. */
107 typedef m5::hash_map<Addr, FALRUBlk *, m5::hash<Addr> > hash_t;
108 /** Iterator into the address hash table. */
109 typedef hash_t::const_iterator tagIterator;
111 /** The address hash table. */
115 * Find the cache block for the given address.
116 * @param addr The address to find.
117 * @return The cache block of the address, if any.
119 FALRUBlk * hashLookup(Addr addr) const;
122 * Move a cache block to the MRU position.
123 * @param blk The block to promote.
125 void moveToHead(FALRUBlk *blk);
128 * Check to make sure all the cache boundaries are still where they should
129 * be. Used for debugging.
130 * @return True if everything is correct.
135 * @defgroup FALRUStats Fully Associative LRU specific statistics
136 * The FA lru stack lets us track multiple cache sizes at once. These
137 * statistics track the hits and misses for different cache sizes.
141 /** Hits in each cache size >= 128K. */
142 Stats::Vector<> hits;
143 /** Misses in each cache size >= 128K. */
144 Stats::Vector<> misses;
145 /** Total number of accesses. */
146 Stats::Scalar<> accesses;
154 * Construct and initialize this cache tagstore.
155 * @param blkSize The block size of the cache.
156 * @param size The size of the cache.
157 * @param hit_latency The hit latency of the cache.
159 FALRU(int blkSize, int size, int hit_latency);
162 * Register the stats for this object.
163 * @param name The name to prepend to the stats name.
165 void regStats(const std::string &name);
168 * Return true if the address is found in the cache.
169 * @param asid The address space ID.
170 * @param addr The address to look for.
171 * @return True if the address is in the cache.
173 bool probe(Addr addr) const;
176 * Invalidate the cache block that contains the given addr.
177 * @param asid The address space ID.
178 * @param addr The address to invalidate.
180 void invalidateBlk(Addr addr);
183 * Find the block in the cache and update the replacement data. Returns
184 * the access latency and the in cache flags as a side effect
185 * @param addr The address to look for.
186 * @param asid The address space ID.
187 * @param lat The latency of the access.
188 * @param inCache The FALRUBlk::inCache flags.
189 * @return Pointer to the cache block.
191 FALRUBlk* findBlock(Addr addr, int &lat, int *inCache = 0);
194 * Find the block in the cache and update the replacement data. Returns
195 * the access latency and the in cache flags as a side effect
196 * @param pkt The req whose block to find
197 * @param lat The latency of the access.
198 * @param inCache The FALRUBlk::inCache flags.
199 * @return Pointer to the cache block.
201 FALRUBlk* findBlock(Packet * &pkt, int &lat, int *inCache = 0);
204 * Find the block in the cache, do not update the replacement data.
205 * @param addr The address to look for.
206 * @param asid The address space ID.
207 * @return Pointer to the cache block.
209 FALRUBlk* findBlock(Addr addr) const;
212 * Find a replacement block for the address provided.
213 * @param pkt The request to a find a replacement candidate for.
214 * @param writebacks List for any writebacks to be performed.
215 * @param compress_blocks List of blocks to compress, for adaptive comp.
216 * @return The block to place the replacement in.
218 FALRUBlk* findReplacement(Packet * &pkt, PacketList & writebacks,
219 BlkList &compress_blocks);
222 * Return the hit latency of this cache.
223 * @return The hit latency.
225 int getHitLatency() const
231 * Return the block size of this cache.
232 * @return The block size.
240 * Return the subblock size of this cache, always the block size.
241 * @return The block size.
243 int getSubBlockSize()
249 * Align an address to the block size.
250 * @param addr the address to align.
251 * @return The aligned address.
253 Addr blkAlign(Addr addr) const
255 return (addr & ~(Addr)(blkSize-1));
259 * Generate the tag from the addres. For fully associative this is just the
261 * @param addr The address to get the tag from.
262 * @param blk ignored here
265 Addr extractTag(Addr addr, FALRUBlk *blk) const
267 return blkAlign(addr);
271 * Return the set of an address. Only one set in a fully associative cache.
272 * @param addr The address to get the set from.
275 int extractSet(Addr addr) const
281 * Calculate the block offset of an address.
282 * @param addr the address to get the offset of.
283 * @return the block offset.
285 int extractBlkOffset(Addr addr) const
287 return (addr & (Addr)(blkSize-1));
291 * Regenerate the block address from the tag and the set.
292 * @param tag The tag of the block.
293 * @param set The set the block belongs to.
294 * @return the block address.
296 Addr regenerateBlkAddr(Addr tag, int set) const
302 * Read the data out of the internal storage of a cache block. FALRU
303 * currently doesn't support data storage.
304 * @param blk The cache block to read.
305 * @param data The buffer to read the data into.
306 * @return The data from the cache block.
308 void readData(FALRUBlk *blk, uint8_t *data)
313 * Write data into the internal storage of a cache block. FALRU
314 * currently doesn't support data storage.
315 * @param blk The cache block to be written.
316 * @param data The data to write.
317 * @param size The number of bytes to write.
318 * @param writebacks A list for any writebacks to be performed. May be
319 * needed when writing to a compressed block.
321 void writeData(FALRUBlk *blk, uint8_t *data, int size,
322 PacketList &writebacks)
327 * Unimplemented. Perform a cache block copy from block aligned addresses.
328 * @param source The block aligned source address.
329 * @param dest The block aligned destination adddress.
330 * @param asid The address space ID.
331 * @param writebacks List for any generated writeback pktuests.
333 void doCopy(Addr source, Addr dest, PacketList &writebacks)
340 void fixCopy(Packet * &pkt, PacketList &writebacks)