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40 * Authors: Erik Hallnor
45 * Declaration of a fully associative LRU tag store.
48 #ifndef __MEM_CACHE_TAGS_FA_LRU_HH__
49 #define __MEM_CACHE_TAGS_FA_LRU_HH__
52 #include <unordered_map>
54 #include "mem/cache/base.hh"
55 #include "mem/cache/blk.hh"
56 #include "mem/cache/tags/base.hh"
57 #include "mem/packet.hh"
58 #include "params/FALRU.hh"
61 * A fully associative cache block.
63 class FALRUBlk : public CacheBlk
66 /** The previous block in LRU order. */
68 /** The next block in LRU order. */
70 /** Has this block been touched? */
74 * A bit mask of the sizes of cache that this block is resident in.
75 * Each bit represents a power of 2 in MB size cache.
76 * If bit 0 is set, this block is in a 1MB cache
77 * If bit 2 is set, this block is in a 4MB cache, etc.
78 * There is one bit for each cache smaller than the full size (default
85 * A fully associative LRU cache. Keeps statistics for accesses to a number of
86 * cache sizes at once.
88 class FALRU : public BaseTags
91 /** Typedef the block type used in this class. */
92 typedef FALRUBlk BlkType;
95 /** Array of pointers to blocks at the cache size boundaries. */
96 FALRUBlk **cacheBoundaries;
97 /** A mask for the FALRUBlk::inCache bits. */
99 /** The number of different size caches being tracked. */
102 /** The cache blocks. */
105 /** The MRU block. */
107 /** The LRU block. */
110 /** Hash table type mapping addresses to cache block pointers. */
111 typedef std::unordered_map<Addr, FALRUBlk *, std::hash<Addr> > hash_t;
112 /** Iterator into the address hash table. */
113 typedef hash_t::const_iterator tagIterator;
115 /** The address hash table. */
119 * Find the cache block for the given address.
120 * @param addr The address to find.
121 * @return The cache block of the address, if any.
123 FALRUBlk * hashLookup(Addr addr) const;
126 * Move a cache block to the MRU position.
127 * @param blk The block to promote.
129 void moveToHead(FALRUBlk *blk);
132 * Check to make sure all the cache boundaries are still where they should
133 * be. Used for debugging.
134 * @return True if everything is correct.
139 * @defgroup FALRUStats Fully Associative LRU specific statistics
140 * The FA lru stack lets us track multiple cache sizes at once. These
141 * statistics track the hits and misses for different cache sizes.
145 /** Hits in each cache size >= 128K. */
147 /** Misses in each cache size >= 128K. */
148 Stats::Vector misses;
149 /** Total number of accesses. */
150 Stats::Scalar accesses;
158 typedef FALRUParams Params;
161 * Construct and initialize this cache tagstore.
163 FALRU(const Params *p);
167 * Register the stats for this object.
168 * @param name The name to prepend to the stats name.
170 void regStats() override;
173 * Invalidate a cache block.
174 * @param blk The block to invalidate.
176 void invalidate(CacheBlk *blk) override;
179 * Access block and update replacement data. May not succeed, in which
180 * case nullptr pointer is returned. This has all the implications of a
181 * cache access and should only be used as such.
182 * Returns the access latency and inCache flags as a side effect.
183 * @param addr The address to look for.
184 * @param is_secure True if the target memory space is secure.
185 * @param lat The latency of the access.
186 * @param inCache The FALRUBlk::inCache flags.
187 * @return Pointer to the cache block.
189 CacheBlk* accessBlock(Addr addr, bool is_secure, Cycles &lat,
193 * Just a wrapper of above function to conform with the base interface.
195 CacheBlk* accessBlock(Addr addr, bool is_secure, Cycles &lat) override;
198 * Find the block in the cache, do not update the replacement data.
199 * @param addr The address to look for.
200 * @param is_secure True if the target memory space is secure.
201 * @param asid The address space ID.
202 * @return Pointer to the cache block.
204 CacheBlk* findBlock(Addr addr, bool is_secure) const override;
207 * Find a replacement block for the address provided.
208 * @param pkt The request to a find a replacement candidate for.
209 * @return The block to place the replacement in.
211 CacheBlk* findVictim(Addr addr) override;
213 void insertBlock(PacketPtr pkt, CacheBlk *blk) override;
216 * Find the cache block given set and way
217 * @param set The set of the block.
218 * @param way The way of the block.
219 * @return The cache block.
221 CacheBlk* findBlockBySetAndWay(int set, int way) const override;
224 * Generate the tag from the addres. For fully associative this is just the
226 * @param addr The address to get the tag from.
229 Addr extractTag(Addr addr) const override
231 return blkAlign(addr);
235 * Return the set of an address. Only one set in a fully associative cache.
236 * @param addr The address to get the set from.
239 int extractSet(Addr addr) const override
245 * Regenerate the block address from the tag and the set.
246 * @param tag The tag of the block.
247 * @param set The set the block belongs to.
248 * @return the block address.
250 Addr regenerateBlkAddr(Addr tag, unsigned set) const override
256 * @todo Implement as in lru. Currently not used
258 virtual std::string print() const override { return ""; }
261 * Visit each block in the tag store and apply a visitor to the
264 * The visitor should be a function (or object that behaves like a
265 * function) that takes a cache block reference as its parameter
266 * and returns a bool. A visitor can request the traversal to be
267 * stopped by returning false, returning true causes it to be
268 * called for the next block in the tag store.
270 * \param visitor Visitor to call on each block.
272 void forEachBlk(CacheBlkVisitor &visitor) override {
273 for (int i = 0; i < numBlocks; i++) {
274 if (!visitor(blks[i]))
281 #endif // __MEM_CACHE_TAGS_FA_LRU_HH__