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40 * Authors: Erik Hallnor
45 * Declaration of a fully associative LRU tag store.
48 #ifndef __MEM_CACHE_TAGS_FA_LRU_HH__
49 #define __MEM_CACHE_TAGS_FA_LRU_HH__
52 #include <unordered_map>
54 #include "mem/cache/base.hh"
55 #include "mem/cache/blk.hh"
56 #include "mem/cache/tags/base.hh"
57 #include "mem/packet.hh"
58 #include "params/FALRU.hh"
61 * A fully associative cache block.
63 class FALRUBlk : public CacheBlk
66 /** The previous block in LRU order. */
68 /** The next block in LRU order. */
70 /** Has this block been touched? */
74 * A bit mask of the sizes of cache that this block is resident in.
75 * Each bit represents a power of 2 in MB size cache.
76 * If bit 0 is set, this block is in a 1MB cache
77 * If bit 2 is set, this block is in a 4MB cache, etc.
78 * There is one bit for each cache smaller than the full size (default
85 * A fully associative LRU cache. Keeps statistics for accesses to a number of
86 * cache sizes at once.
88 class FALRU : public BaseTags
91 /** Typedef the block type used in this class. */
92 typedef FALRUBlk BlkType;
93 /** Typedef a list of pointers to the local block type. */
94 typedef std::list<FALRUBlk*> BlkList;
97 /** Array of pointers to blocks at the cache size boundaries. */
98 FALRUBlk **cacheBoundaries;
99 /** A mask for the FALRUBlk::inCache bits. */
101 /** The number of different size caches being tracked. */
104 /** The cache blocks. */
107 /** The MRU block. */
109 /** The LRU block. */
112 /** Hash table type mapping addresses to cache block pointers. */
113 typedef std::unordered_map<Addr, FALRUBlk *, std::hash<Addr> > hash_t;
114 /** Iterator into the address hash table. */
115 typedef hash_t::const_iterator tagIterator;
117 /** The address hash table. */
121 * Find the cache block for the given address.
122 * @param addr The address to find.
123 * @return The cache block of the address, if any.
125 FALRUBlk * hashLookup(Addr addr) const;
128 * Move a cache block to the MRU position.
129 * @param blk The block to promote.
131 void moveToHead(FALRUBlk *blk);
134 * Check to make sure all the cache boundaries are still where they should
135 * be. Used for debugging.
136 * @return True if everything is correct.
141 * @defgroup FALRUStats Fully Associative LRU specific statistics
142 * The FA lru stack lets us track multiple cache sizes at once. These
143 * statistics track the hits and misses for different cache sizes.
147 /** Hits in each cache size >= 128K. */
149 /** Misses in each cache size >= 128K. */
150 Stats::Vector misses;
151 /** Total number of accesses. */
152 Stats::Scalar accesses;
160 typedef FALRUParams Params;
163 * Construct and initialize this cache tagstore.
165 FALRU(const Params *p);
169 * Register the stats for this object.
170 * @param name The name to prepend to the stats name.
172 void regStats() override;
175 * Invalidate a cache block.
176 * @param blk The block to invalidate.
178 void invalidate(CacheBlk *blk) override;
181 * Access block and update replacement data. May not succeed, in which
182 * case nullptr pointer is returned. This has all the implications of a
183 * cache access and should only be used as such.
184 * Returns the access latency and inCache flags as a side effect.
185 * @param addr The address to look for.
186 * @param is_secure True if the target memory space is secure.
187 * @param asid The address space ID.
188 * @param lat The latency of the access.
189 * @param inCache The FALRUBlk::inCache flags.
190 * @return Pointer to the cache block.
192 CacheBlk* accessBlock(Addr addr, bool is_secure, Cycles &lat,
193 int context_src, int *inCache);
196 * Just a wrapper of above function to conform with the base interface.
198 CacheBlk* accessBlock(Addr addr, bool is_secure, Cycles &lat,
199 int context_src) override;
202 * Find the block in the cache, do not update the replacement data.
203 * @param addr The address to look for.
204 * @param is_secure True if the target memory space is secure.
205 * @param asid The address space ID.
206 * @return Pointer to the cache block.
208 CacheBlk* findBlock(Addr addr, bool is_secure) const override;
211 * Find a replacement block for the address provided.
212 * @param pkt The request to a find a replacement candidate for.
213 * @return The block to place the replacement in.
215 CacheBlk* findVictim(Addr addr) override;
217 void insertBlock(PacketPtr pkt, CacheBlk *blk) override;
220 * Find the cache block given set and way
221 * @param set The set of the block.
222 * @param way The way of the block.
223 * @return The cache block.
225 CacheBlk* findBlockBySetAndWay(int set, int way) const override;
228 * Align an address to the block size.
229 * @param addr the address to align.
230 * @return The aligned address.
232 Addr blkAlign(Addr addr) const
234 return (addr & ~(Addr)(blkSize-1));
238 * Generate the tag from the addres. For fully associative this is just the
240 * @param addr The address to get the tag from.
243 Addr extractTag(Addr addr) const override
245 return blkAlign(addr);
249 * Return the set of an address. Only one set in a fully associative cache.
250 * @param addr The address to get the set from.
253 int extractSet(Addr addr) const override
259 * Regenerate the block address from the tag and the set.
260 * @param tag The tag of the block.
261 * @param set The set the block belongs to.
262 * @return the block address.
264 Addr regenerateBlkAddr(Addr tag, unsigned set) const override
270 * @todo Implement as in lru. Currently not used
272 virtual std::string print() const override { return ""; }
275 * Visit each block in the tag store and apply a visitor to the
278 * The visitor should be a function (or object that behaves like a
279 * function) that takes a cache block reference as its parameter
280 * and returns a bool. A visitor can request the traversal to be
281 * stopped by returning false, returning true causes it to be
282 * called for the next block in the tag store.
284 * \param visitor Visitor to call on each block.
286 void forEachBlk(CacheBlkVisitor &visitor) override {
287 for (int i = 0; i < numBlocks; i++) {
288 if (!visitor(blks[i]))
295 #endif // __MEM_CACHE_TAGS_FA_LRU_HH__