src/mem/cache/tags/lru.cc

   1 /*
   2  * Copyright (c) 2003-2005 The Regents of The University of Michigan
   3  * All rights reserved.
   4  *
   5  * Redistribution and use in source and binary forms, with or without
   6  * modification, are permitted provided that the following conditions are
   7  * met: redistributions of source code must retain the above copyright
   8  * notice, this list of conditions and the following disclaimer;
   9  * redistributions in binary form must reproduce the above copyright
  10  * notice, this list of conditions and the following disclaimer in the
  11  * documentation and/or other materials provided with the distribution;
  12  * neither the name of the copyright holders nor the names of its
  13  * contributors may be used to endorse or promote products derived from
  14  * this software without specific prior written permission.
  15  *
  16  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  17  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  18  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  19  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  20  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  21  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  22  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  23  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  24  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  25  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  26  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  27  *
  28  * Authors: Erik Hallnor
  29  */
  30
  31 /**
  32  * @file
  33  * Definitions of LRU tag store.
  34  */
  35
  36 #include <string>
  37
  38 #include "mem/cache/base_cache.hh"
  39 #include "base/intmath.hh"
  40 #include "mem/cache/tags/lru.hh"
  41 #include "sim/core.hh"
  42
  43 using namespace std;
  44
  45 LRUBlk*
  46 CacheSet::findBlk(Addr tag) const
  47 {
  48     for (int i = 0; i < assoc; ++i) {
  49         if (blks[i]->tag == tag && blks[i]->isValid()) {
  50             return blks[i];
  51         }
  52     }
  53     return 0;
  54 }
  55
  56
  57 void
  58 CacheSet::moveToHead(LRUBlk *blk)
  59 {
  60     // nothing to do if blk is already head
  61     if (blks[0] == blk)
  62         return;
  63
  64     // write 'next' block into blks[i], moving up from MRU toward LRU
  65     // until we overwrite the block we moved to head.
  66
  67     // start by setting up to write 'blk' into blks[0]
  68     int i = 0;
  69     LRUBlk *next = blk;
  70
  71     do {
  72         assert(i < assoc);
  73         // swap blks[i] and next
  74         LRUBlk *tmp = blks[i];
  75         blks[i] = next;
  76         next = tmp;
  77         ++i;
  78     } while (next != blk);
  79 }
  80
  81
  82 // create and initialize a LRU/MRU cache structure
  83 LRU::LRU(int _numSets, int _blkSize, int _assoc, int _hit_latency) :
  84     numSets(_numSets), blkSize(_blkSize), assoc(_assoc), hitLatency(_hit_latency)
  85 {
  86     // Check parameters
  87     if (blkSize < 4 || !isPowerOf2(blkSize)) {
  88         fatal("Block size must be at least 4 and a power of 2");
  89     }
  90     if (numSets <= 0 || !isPowerOf2(numSets)) {
  91         fatal("# of sets must be non-zero and a power of 2");
  92     }
  93     if (assoc <= 0) {
  94         fatal("associativity must be greater than zero");
  95     }
  96     if (hitLatency <= 0) {
  97         fatal("access latency must be greater than zero");
  98     }
  99
 100     LRUBlk  *blk;
 101     int i, j, blkIndex;
 102
 103     blkMask = blkSize - 1;
 104     setShift = floorLog2(blkSize);
 105     setMask = numSets - 1;
 106     tagShift = setShift + floorLog2(numSets);
 107     warmedUp = false;
 108     /** @todo Make warmup percentage a parameter. */
 109     warmupBound = numSets * assoc;
 110
 111     sets = new CacheSet[numSets];
 112     blks = new LRUBlk[numSets * assoc];
 113     // allocate data storage in one big chunk
 114     dataBlks = new uint8_t[numSets*assoc*blkSize];
 115
 116     blkIndex = 0;       // index into blks array
 117     for (i = 0; i < numSets; ++i) {
 118         sets[i].assoc = assoc;
 119
 120         sets[i].blks = new LRUBlk*[assoc];
 121
 122         // link in the data blocks
 123         for (j = 0; j < assoc; ++j) {
 124             // locate next cache block
 125             blk = &blks[blkIndex];
 126             blk->data = &dataBlks[blkSize*blkIndex];
 127             ++blkIndex;
 128
 129             // invalidate new cache block
 130             blk->status = 0;
 131
 132             //EGH Fix Me : do we need to initialize blk?
 133
 134             // Setting the tag to j is just to prevent long chains in the hash
 135             // table; won't matter because the block is invalid
 136             blk->tag = j;
 137             blk->whenReady = 0;
 138             blk->isTouched = false;
 139             blk->size = blkSize;
 140             sets[i].blks[j]=blk;
 141             blk->set = i;
 142         }
 143     }
 144 }
 145
 146 LRU::~LRU()
 147 {
 148     delete [] dataBlks;
 149     delete [] blks;
 150     delete [] sets;
 151 }
 152
 153 // probe cache for presence of given block.
 154 bool
 155 LRU::probe(Addr addr) const
 156 {
 157     //  return(findBlock(Read, addr, asid) != 0);
 158     Addr tag = extractTag(addr);
 159     unsigned myset = extractSet(addr);
 160
 161     LRUBlk *blk = sets[myset].findBlk(tag);
 162
 163     return (blk != NULL);       // true if in cache
 164 }
 165
 166 LRUBlk*
 167 LRU::findBlock(Addr addr, int &lat)
 168 {
 169     Addr tag = extractTag(addr);
 170     unsigned set = extractSet(addr);
 171     LRUBlk *blk = sets[set].findBlk(tag);
 172     lat = hitLatency;
 173     if (blk != NULL) {
 174         // move this block to head of the MRU list
 175         sets[set].moveToHead(blk);
 176         if (blk->whenReady > curTick
 177             && blk->whenReady - curTick > hitLatency) {
 178             lat = blk->whenReady - curTick;
 179         }
 180         blk->refCount += 1;
 181     }
 182
 183     return blk;
 184 }
 185
 186
 187 LRUBlk*
 188 LRU::findBlock(Addr addr) const
 189 {
 190     Addr tag = extractTag(addr);
 191     unsigned set = extractSet(addr);
 192     LRUBlk *blk = sets[set].findBlk(tag);
 193     return blk;
 194 }
 195
 196 LRUBlk*
 197 LRU::findReplacement(PacketPtr &pkt, PacketList &writebacks,
 198                      BlkList &compress_blocks)
 199 {
 200     unsigned set = extractSet(pkt->getAddr());
 201     // grab a replacement candidate
 202     LRUBlk *blk = sets[set].blks[assoc-1];
 203     sets[set].moveToHead(blk);
 204     if (blk->isValid()) {
 205         replacements[0]++;
 206         totalRefs += blk->refCount;
 207         ++sampledRefs;
 208         blk->refCount = 0;
 209     } else if (!blk->isTouched) {
 210         tagsInUse++;
 211         blk->isTouched = true;
 212         if (!warmedUp && tagsInUse.value() >= warmupBound) {
 213             warmedUp = true;
 214             warmupCycle = curTick;
 215         }
 216     }
 217
 218     return blk;
 219 }
 220
 221 void
 222 LRU::invalidateBlk(LRU::BlkType *blk)
 223 {
 224     if (blk) {
 225         blk->status = 0;
 226         blk->isTouched = false;
 227         blk->clearLoadLocks();
 228         tagsInUse--;
 229     }
 230 }
 231
 232 void
 233 LRU::cleanupRefs()
 234 {
 235     for (int i = 0; i < numSets*assoc; ++i) {
 236         if (blks[i].isValid()) {
 237             totalRefs += blks[i].refCount;
 238             ++sampledRefs;
 239         }
 240     }
 241 }