Automated merge with ssh://hg@m5sim.org/m5
[gem5.git] / src / mem / cache / tags / lru.hh
1 /*
2 * Copyright (c) 2003-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Erik Hallnor
29 */
30
31 /**
32 * @file
33 * Declaration of a LRU tag store.
34 */
35
36 #ifndef __MEM_CACHE_TAGS_LRU_HH__
37 #define __MEM_CACHE_TAGS_LRU_HH__
38
39 #include <cassert>
40 #include <cstring>
41 #include <list>
42
43 #include "mem/cache/blk.hh"
44 #include "mem/cache/tags/base.hh"
45 #include "mem/packet.hh"
46
47 class BaseCache;
48
49 /**
50 * LRU cache block.
51 */
52 class LRUBlk : public CacheBlk {
53 public:
54 /** Has this block been touched? Used to aid calculation of warmup time. */
55 bool isTouched;
56 };
57
58 /**
59 * An associative set of cache blocks.
60 */
61 class CacheSet
62 {
63 public:
64 /** The associativity of this set. */
65 int assoc;
66
67 /** Cache blocks in this set, maintained in LRU order 0 = MRU. */
68 LRUBlk **blks;
69
70 /**
71 * Find a block matching the tag in this set.
72 * @param asid The address space ID.
73 * @param tag The Tag to find.
74 * @return Pointer to the block if found.
75 */
76 LRUBlk* findBlk(Addr tag) const;
77
78 /**
79 * Move the given block to the head of the list.
80 * @param blk The block to move.
81 */
82 void moveToHead(LRUBlk *blk);
83 };
84
85 /**
86 * A LRU cache tag store.
87 */
88 class LRU : public BaseTags
89 {
90 public:
91 /** Typedef the block type used in this tag store. */
92 typedef LRUBlk BlkType;
93 /** Typedef for a list of pointers to the local block class. */
94 typedef std::list<LRUBlk*> BlkList;
95
96 protected:
97 /** The number of sets in the cache. */
98 const unsigned numSets;
99 /** The number of bytes in a block. */
100 const unsigned blkSize;
101 /** The associativity of the cache. */
102 const unsigned assoc;
103 /** The hit latency. */
104 const unsigned hitLatency;
105
106 /** The cache sets. */
107 CacheSet *sets;
108
109 /** The cache blocks. */
110 LRUBlk *blks;
111 /** The data blocks, 1 per cache block. */
112 uint8_t *dataBlks;
113
114 /** The amount to shift the address to get the set. */
115 int setShift;
116 /** The amount to shift the address to get the tag. */
117 int tagShift;
118 /** Mask out all bits that aren't part of the set index. */
119 unsigned setMask;
120 /** Mask out all bits that aren't part of the block offset. */
121 unsigned blkMask;
122
123 public:
124 /**
125 * Construct and initialize this tag store.
126 * @param _numSets The number of sets in the cache.
127 * @param _blkSize The number of bytes in a block.
128 * @param _assoc The associativity of the cache.
129 * @param _hit_latency The latency in cycles for a hit.
130 */
131 LRU(unsigned _numSets, unsigned _blkSize, unsigned _assoc,
132 unsigned _hit_latency);
133
134 /**
135 * Destructor
136 */
137 virtual ~LRU();
138
139 /**
140 * Return the block size.
141 * @return the block size.
142 */
143 unsigned
144 getBlockSize() const
145 {
146 return blkSize;
147 }
148
149 /**
150 * Return the subblock size. In the case of LRU it is always the block
151 * size.
152 * @return The block size.
153 */
154 unsigned
155 getSubBlockSize() const
156 {
157 return blkSize;
158 }
159
160 /**
161 * Invalidate the given block.
162 * @param blk The block to invalidate.
163 */
164 void invalidateBlk(BlkType *blk);
165
166 /**
167 * Access block and update replacement data. May not succeed, in which case
168 * NULL pointer is returned. This has all the implications of a cache
169 * access and should only be used as such. Returns the access latency as a side effect.
170 * @param addr The address to find.
171 * @param asid The address space ID.
172 * @param lat The access latency.
173 * @return Pointer to the cache block if found.
174 */
175 LRUBlk* accessBlock(Addr addr, int &lat, int context_src);
176
177 /**
178 * Finds the given address in the cache, do not update replacement data.
179 * i.e. This is a no-side-effect find of a block.
180 * @param addr The address to find.
181 * @param asid The address space ID.
182 * @return Pointer to the cache block if found.
183 */
184 LRUBlk* findBlock(Addr addr) const;
185
186 /**
187 * Find a block to evict for the address provided.
188 * @param addr The addr to a find a replacement candidate for.
189 * @param writebacks List for any writebacks to be performed.
190 * @return The candidate block.
191 */
192 LRUBlk* findVictim(Addr addr, PacketList &writebacks);
193
194 /**
195 * Insert the new block into the cache. For LRU this means inserting into
196 * the MRU position of the set.
197 * @param addr The address to update.
198 * @param blk The block to update.
199 */
200 void insertBlock(Addr addr, BlkType *blk, int context_src);
201
202 /**
203 * Generate the tag from the given address.
204 * @param addr The address to get the tag from.
205 * @return The tag of the address.
206 */
207 Addr extractTag(Addr addr) const
208 {
209 return (addr >> tagShift);
210 }
211
212 /**
213 * Calculate the set index from the address.
214 * @param addr The address to get the set from.
215 * @return The set index of the address.
216 */
217 int extractSet(Addr addr) const
218 {
219 return ((addr >> setShift) & setMask);
220 }
221
222 /**
223 * Get the block offset from an address.
224 * @param addr The address to get the offset of.
225 * @return The block offset.
226 */
227 int extractBlkOffset(Addr addr) const
228 {
229 return (addr & blkMask);
230 }
231
232 /**
233 * Align an address to the block size.
234 * @param addr the address to align.
235 * @return The block address.
236 */
237 Addr blkAlign(Addr addr) const
238 {
239 return (addr & ~(Addr)blkMask);
240 }
241
242 /**
243 * Regenerate the block address from the tag.
244 * @param tag The tag of the block.
245 * @param set The set of the block.
246 * @return The block address.
247 */
248 Addr regenerateBlkAddr(Addr tag, unsigned set) const
249 {
250 return ((tag << tagShift) | ((Addr)set << setShift));
251 }
252
253 /**
254 * Return the hit latency.
255 * @return the hit latency.
256 */
257 int getHitLatency() const
258 {
259 return hitLatency;
260 }
261
262 /**
263 * Called at end of simulation to complete average block reference stats.
264 */
265 virtual void cleanupRefs();
266 };
267
268 #endif // __MEM_CACHE_TAGS_LRU_HH__