2 * Copyright (c) 2003-2005 The Regents of The University of Michigan
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28 * Authors: Erik Hallnor
33 * Declaration of a LRU tag store.
41 #include "mem/cache/cache_blk.hh" // base class
42 #include "mem/packet.hh" // for inlined functions
44 #include "mem/cache/tags/base_tags.hh"
51 class LRUBlk : public CacheBlk {
53 /** Has this block been touched? Used to aid calculation of warmup time. */
58 * An associative set of cache blocks.
63 /** The associativity of this set. */
66 /** Cache blocks in this set, maintained in LRU order 0 = MRU. */
70 * Find a block matching the tag in this set.
71 * @param asid The address space ID.
72 * @param tag The Tag to find.
73 * @return Pointer to the block if found.
75 LRUBlk* findBlk(int asid, Addr tag) const;
78 * Move the given block to the head of the list.
79 * @param blk The block to move.
81 void moveToHead(LRUBlk *blk);
85 * A LRU cache tag store.
87 class LRU : public BaseTags
90 /** Typedef the block type used in this tag store. */
91 typedef LRUBlk BlkType;
92 /** Typedef for a list of pointers to the local block class. */
93 typedef std::list<LRUBlk*> BlkList;
95 /** The number of sets in the cache. */
97 /** The number of bytes in a block. */
99 /** The associativity of the cache. */
101 /** The hit latency. */
102 const int hitLatency;
104 /** The cache sets. */
107 /** The cache blocks. */
109 /** The data blocks, 1 per cache block. */
112 /** The amount to shift the address to get the set. */
114 /** The amount to shift the address to get the tag. */
116 /** Mask out all bits that aren't part of the set index. */
118 /** Mask out all bits that aren't part of the block offset. */
123 * Construct and initialize this tag store.
124 * @param _numSets The number of sets in the cache.
125 * @param _blkSize The number of bytes in a block.
126 * @param _assoc The associativity of the cache.
127 * @param _hit_latency The latency in cycles for a hit.
129 LRU(int _numSets, int _blkSize, int _assoc, int _hit_latency);
137 * Return the block size.
138 * @return the block size.
146 * Return the subblock size. In the case of LRU it is always the block
148 * @return The block size.
150 int getSubBlockSize()
156 * Search for the address in the cache.
157 * @param asid The address space ID.
158 * @param addr The address to find.
159 * @return True if the address is in the cache.
161 bool probe(int asid, Addr addr) const;
164 * Invalidate the block containing the given address.
165 * @param asid The address space ID.
166 * @param addr The address to invalidate.
168 void invalidateBlk(int asid, Addr addr);
171 * Finds the given address in the cache and update replacement data.
172 * Returns the access latency as a side effect.
173 * @param pkt The request whose block to find.
174 * @param lat The access latency.
175 * @return Pointer to the cache block if found.
177 LRUBlk* findBlock(Packet * &pkt, int &lat);
180 * Finds the given address in the cache and update replacement data.
181 * Returns the access latency as a side effect.
182 * @param addr The address to find.
183 * @param asid The address space ID.
184 * @param lat The access latency.
185 * @return Pointer to the cache block if found.
187 LRUBlk* findBlock(Addr addr, int asid, int &lat);
190 * Finds the given address in the cache, do not update replacement data.
191 * @param addr The address to find.
192 * @param asid The address space ID.
193 * @return Pointer to the cache block if found.
195 LRUBlk* findBlock(Addr addr, int asid) const;
198 * Find a replacement block for the address provided.
199 * @param pkt The request to a find a replacement candidate for.
200 * @param writebacks List for any writebacks to be performed.
201 * @param compress_blocks List of blocks to compress, for adaptive comp.
202 * @return The block to place the replacement in.
204 LRUBlk* findReplacement(Packet * &pkt, PacketList &writebacks,
205 BlkList &compress_blocks);
208 * Generate the tag from the given address.
209 * @param addr The address to get the tag from.
210 * @return The tag of the address.
212 Addr extractTag(Addr addr) const
214 return (addr >> tagShift);
218 * Generate the tag from the given address.
219 * @param addr The address to get the tag from.
220 * @param blk Ignored.
221 * @return The tag of the address.
223 Addr extractTag(Addr addr, LRUBlk *blk) const
225 return (addr >> tagShift);
229 * Calculate the set index from the address.
230 * @param addr The address to get the set from.
231 * @return The set index of the address.
233 int extractSet(Addr addr) const
235 return ((addr >> setShift) & setMask);
239 * Get the block offset from an address.
240 * @param addr The address to get the offset of.
241 * @return The block offset.
243 int extractBlkOffset(Addr addr) const
245 return (addr & blkMask);
249 * Align an address to the block size.
250 * @param addr the address to align.
251 * @return The block address.
253 Addr blkAlign(Addr addr) const
255 return (addr & ~(Addr)blkMask);
259 * Regenerate the block address from the tag.
260 * @param tag The tag of the block.
261 * @param set The set of the block.
262 * @return The block address.
264 Addr regenerateBlkAddr(Addr tag, unsigned set) const
266 return ((tag << tagShift) | ((Addr)set << setShift));
270 * Return the hit latency.
271 * @return the hit latency.
273 int getHitLatency() const
279 * Read the data out of the internal storage of the given cache block.
280 * @param blk The cache block to read.
281 * @param data The buffer to read the data into.
282 * @return The cache block's data.
284 void readData(LRUBlk *blk, uint8_t *data)
286 memcpy(data, blk->data, blk->size);
290 * Write data into the internal storage of the given cache block. Since in
291 * LRU does not store data differently this just needs to update the size.
292 * @param blk The cache block to write.
293 * @param data The data to write.
294 * @param size The number of bytes to write.
295 * @param writebacks A list for any writebacks to be performed. May be
296 * needed when writing to a compressed block.
298 void writeData(LRUBlk *blk, uint8_t *data, int size,
299 PacketList & writebacks)
301 assert(size <= blkSize);
306 * Perform a block aligned copy from the source address to the destination.
307 * @param source The block-aligned source address.
308 * @param dest The block-aligned destination address.
309 * @param asid The address space DI.
310 * @param writebacks List for any generated writeback pktuests.
312 void doCopy(Addr source, Addr dest, int asid, PacketList &writebacks);
317 void fixCopy(Packet * &pkt, PacketList &writebacks)
322 * Called at end of simulation to complete average block reference stats.
324 virtual void cleanupRefs();