Merge zizzer.eecs.umich.edu:/z/m5/Bitkeeper/newmem
[gem5.git] / src / mem / cache / tags / split_lru.hh
1 /*
2 * Copyright (c) 2004-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Lisa Hsu
29 */
30
31 /**
32 * @file
33 * Declaration of a LRU tag store for a partitioned cache.
34 */
35
36 #ifndef __SPLIT_LRU_HH__
37 #define __SPLIT_LRU_HH__
38
39 #include <cstring>
40 #include <list>
41
42 #include "mem/cache/cache_blk.hh" // base class
43 #include "mem/cache/tags/split_blk.hh"
44 #include "mem/packet.hh" // for inlined functions
45 #include <assert.h>
46 #include "mem/cache/tags/base_tags.hh"
47
48 class BaseCache;
49
50 /**
51 * An associative set of cache blocks.
52 */
53
54 class SplitCacheSet
55 {
56 public:
57 /** The associativity of this set. */
58 int assoc;
59
60 /** Cache blocks in this set, maintained in LRU order 0 = MRU. */
61 SplitBlk **blks;
62
63 /**
64 * Find a block matching the tag in this set.
65 * @param asid The address space ID.
66 * @param tag The Tag to find.
67 * @return Pointer to the block if found.
68 */
69 SplitBlk* findBlk(Addr tag) const;
70
71 /**
72 * Move the given block to the head of the list.
73 * @param blk The block to move.
74 */
75 void moveToHead(SplitBlk *blk);
76 };
77
78 /**
79 * A LRU cache tag store.
80 */
81 class SplitLRU : public BaseTags
82 {
83 public:
84 /** Typedef the block type used in this tag store. */
85 typedef SplitBlk BlkType;
86 /** Typedef for a list of pointers to the local block class. */
87 typedef std::list<SplitBlk*> BlkList;
88 protected:
89 /** The number of sets in the cache. */
90 const int numSets;
91 /** The number of bytes in a block. */
92 const int blkSize;
93 /** The associativity of the cache. */
94 const int assoc;
95 /** The hit latency. */
96 const int hitLatency;
97 /** indicator for which partition this is */
98 const int part;
99
100 /** The cache sets. */
101 SplitCacheSet *sets;
102
103 /** The cache blocks. */
104 SplitBlk *blks;
105 /** The data blocks, 1 per cache block. */
106 uint8_t *dataBlks;
107
108 /** The amount to shift the address to get the set. */
109 int setShift;
110 /** The amount to shift the address to get the tag. */
111 int tagShift;
112 /** Mask out all bits that aren't part of the set index. */
113 unsigned setMask;
114 /** Mask out all bits that aren't part of the block offset. */
115 unsigned blkMask;
116
117 /** number of hits in this partition */
118 Stats::Scalar<> hits;
119 /** number of blocks brought into this partition (i.e. misses) */
120 Stats::Scalar<> misses;
121
122 public:
123 /**
124 * Construct and initialize this tag store.
125 * @param _numSets The number of sets in the cache.
126 * @param _blkSize The number of bytes in a block.
127 * @param _assoc The associativity of the cache.
128 * @param _hit_latency The latency in cycles for a hit.
129 */
130 SplitLRU(int _numSets, int _blkSize, int _assoc, int _hit_latency, int _part);
131
132 /**
133 * Destructor
134 */
135 virtual ~SplitLRU();
136
137 /**
138 * Register the statistics for this object
139 * @param name The name to precede the stat
140 */
141 void regStats(const std::string &name);
142
143 /**
144 * Return the block size.
145 * @return the block size.
146 */
147 int getBlockSize()
148 {
149 return blkSize;
150 }
151
152 /**
153 * Return the subblock size. In the case of LRU it is always the block
154 * size.
155 * @return The block size.
156 */
157 int getSubBlockSize()
158 {
159 return blkSize;
160 }
161
162 /**
163 * Search for the address in the cache.
164 * @param asid The address space ID.
165 * @param addr The address to find.
166 * @return True if the address is in the cache.
167 */
168 bool probe(Addr addr) const;
169
170 /**
171 * Invalidate the given block.
172 * @param blk The block to invalidate.
173 */
174 void invalidateBlk(BlkType *blk);
175
176 /**
177 * Finds the given address in the cache and update replacement data.
178 * Returns the access latency as a side effect.
179 * @param addr The address to find.
180 * @param asid The address space ID.
181 * @param lat The access latency.
182 * @return Pointer to the cache block if found.
183 */
184 SplitBlk* findBlock(Addr addr, int &lat);
185
186 /**
187 * Finds the given address in the cache, do not update replacement data.
188 * @param addr The address to find.
189 * @param asid The address space ID.
190 * @return Pointer to the cache block if found.
191 */
192 SplitBlk* findBlock(Addr addr) const;
193
194 /**
195 * Find a replacement block for the address provided.
196 * @param pkt The request to a find a replacement candidate for.
197 * @param writebacks List for any writebacks to be performed.
198 * @param compress_blocks List of blocks to compress, for adaptive comp.
199 * @return The block to place the replacement in.
200 */
201 SplitBlk* findReplacement(PacketPtr &pkt, PacketList &writebacks,
202 BlkList &compress_blocks);
203
204 /**
205 * Generate the tag from the given address.
206 * @param addr The address to get the tag from.
207 * @return The tag of the address.
208 */
209 Addr extractTag(Addr addr) const
210 {
211 return (addr >> tagShift);
212 }
213
214 /**
215 * Generate the tag from the given address.
216 * @param addr The address to get the tag from.
217 * @param blk Ignored.
218 * @return The tag of the address.
219 */
220 Addr extractTag(Addr addr, SplitBlk *blk) const
221 {
222 return (addr >> tagShift);
223 }
224
225 /**
226 * Calculate the set index from the address.
227 * @param addr The address to get the set from.
228 * @return The set index of the address.
229 */
230 int extractSet(Addr addr) const
231 {
232 return ((addr >> setShift) & setMask);
233 }
234
235 /**
236 * Get the block offset from an address.
237 * @param addr The address to get the offset of.
238 * @return The block offset.
239 */
240 int extractBlkOffset(Addr addr) const
241 {
242 return (addr & blkMask);
243 }
244
245 /**
246 * Align an address to the block size.
247 * @param addr the address to align.
248 * @return The block address.
249 */
250 Addr blkAlign(Addr addr) const
251 {
252 return (addr & ~(Addr)blkMask);
253 }
254
255 /**
256 * Regenerate the block address from the tag.
257 * @param tag The tag of the block.
258 * @param set The set of the block.
259 * @return The block address.
260 */
261 Addr regenerateBlkAddr(Addr tag, unsigned set) const
262 {
263 return ((tag << tagShift) | ((Addr)set << setShift));
264 }
265
266 /**
267 * Return the hit latency.
268 * @return the hit latency.
269 */
270 int getHitLatency() const
271 {
272 return hitLatency;
273 }
274
275 /**
276 * Read the data out of the internal storage of the given cache block.
277 * @param blk The cache block to read.
278 * @param data The buffer to read the data into.
279 * @return The cache block's data.
280 */
281 void readData(SplitBlk *blk, uint8_t *data)
282 {
283 std::memcpy(data, blk->data, blk->size);
284 }
285
286 /**
287 * Write data into the internal storage of the given cache block. Since in
288 * LRU does not store data differently this just needs to update the size.
289 * @param blk The cache block to write.
290 * @param data The data to write.
291 * @param size The number of bytes to write.
292 * @param writebacks A list for any writebacks to be performed. May be
293 * needed when writing to a compressed block.
294 */
295 void writeData(SplitBlk *blk, uint8_t *data, int size,
296 PacketList & writebacks)
297 {
298 assert(size <= blkSize);
299 blk->size = size;
300 }
301
302 /**
303 * Called at end of simulation to complete average block reference stats.
304 */
305 virtual void cleanupRefs();
306 };
307
308 #endif