2 * Copyright (c) 2012-2013, 2015 ARM Limited
3 * Copyright (c) 2016 Google Inc.
4 * Copyright (c) 2017, Centre National de la Recherche Scientifique
7 * The license below extends only to copyright in the software and shall
8 * not be construed as granting a license to any other intellectual
9 * property including but not limited to intellectual property relating
10 * to a hardware implementation of the functionality of the software
11 * licensed hereunder. You may use the software subject to the license
12 * terms below provided that you ensure that this notice is replicated
13 * unmodified and in its entirety in all distributions of the software,
14 * modified or unmodified, in source code or in binary form.
16 * Redistribution and use in source and binary forms, with or without
17 * modification, are permitted provided that the following conditions are
18 * met: redistributions of source code must retain the above copyright
19 * notice, this list of conditions and the following disclaimer;
20 * redistributions in binary form must reproduce the above copyright
21 * notice, this list of conditions and the following disclaimer in the
22 * documentation and/or other materials provided with the distribution;
23 * neither the name of the copyright holders nor the names of its
24 * contributors may be used to endorse or promote products derived from
25 * this software without specific prior written permission.
27 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
30 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
31 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
32 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
33 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
34 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
35 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
36 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
37 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
39 * Authors: Thomas Grass
45 #ifndef __MEM_COMM_MONITOR_HH__
46 #define __MEM_COMM_MONITOR_HH__
48 #include "base/statistics.hh"
49 #include "mem/mem_object.hh"
50 #include "params/CommMonitor.hh"
51 #include "sim/probe/mem.hh"
54 * The communication monitor is a MemObject which can monitor statistics of
55 * the communication happening between two ports in the memory system.
57 * Currently the following stats are implemented: Histograms of read/write
58 * transactions, read/write burst lengths, read/write bandwidth,
59 * outstanding read/write requests, read latency and inter transaction time
60 * (read-read, write-write, read/write-read/write). Furthermore it allows
61 * to capture the number of accesses to an address over time ("heat map").
62 * All stats can be disabled from Python.
64 class CommMonitor : public MemObject
67 public: // Construction & SimObject interfaces
69 /** Parameters of communication monitor */
70 typedef CommMonitorParams Params;
71 const Params* params() const
72 { return reinterpret_cast<const Params*>(_params); }
75 * Constructor based on the Python params
77 * @param params Python parameters
79 CommMonitor(Params* params);
82 void regStats() override;
83 void startup() override;
84 void regProbePoints() override;
86 public: // MemObject interfaces
87 BaseMasterPort& getMasterPort(const std::string& if_name,
88 PortID idx = InvalidPortID) override;
90 BaseSlavePort& getSlavePort(const std::string& if_name,
91 PortID idx = InvalidPortID) override;
96 * Sender state class for the monitor so that we can annotate
97 * packets with a transmit time and receive time.
99 class CommMonitorSenderState : public Packet::SenderState
105 * Construct a new sender state and store the time so we can
106 * calculate round-trip latency.
108 * @param _transmitTime Time of packet transmission
110 CommMonitorSenderState(Tick _transmitTime)
111 : transmitTime(_transmitTime)
115 ~CommMonitorSenderState() { }
117 /** Tick when request is transmitted */
123 * This is the master port of the communication monitor. All recv
124 * functions call a function in CommMonitor, where the
125 * send function of the slave port is called. Besides this, these
126 * functions can also perform actions for capturing statistics.
128 class MonitorMasterPort : public MasterPort
133 MonitorMasterPort(const std::string& _name, CommMonitor& _mon)
134 : MasterPort(_name, &_mon), mon(_mon)
139 void recvFunctionalSnoop(PacketPtr pkt)
141 mon.recvFunctionalSnoop(pkt);
144 Tick recvAtomicSnoop(PacketPtr pkt)
146 return mon.recvAtomicSnoop(pkt);
149 bool recvTimingResp(PacketPtr pkt)
151 return mon.recvTimingResp(pkt);
154 void recvTimingSnoopReq(PacketPtr pkt)
156 mon.recvTimingSnoopReq(pkt);
159 void recvRangeChange()
161 mon.recvRangeChange();
164 bool isSnooping() const
166 return mon.isSnooping();
174 void recvRetrySnoopResp()
176 mon.recvRetrySnoopResp();
185 /** Instance of master port, facing the memory side */
186 MonitorMasterPort masterPort;
189 * This is the slave port of the communication monitor. All recv
190 * functions call a function in CommMonitor, where the
191 * send function of the master port is called. Besides this, these
192 * functions can also perform actions for capturing statistics.
194 class MonitorSlavePort : public SlavePort
199 MonitorSlavePort(const std::string& _name, CommMonitor& _mon)
200 : SlavePort(_name, &_mon), mon(_mon)
205 void recvFunctional(PacketPtr pkt)
207 mon.recvFunctional(pkt);
210 Tick recvAtomic(PacketPtr pkt)
212 return mon.recvAtomic(pkt);
215 bool recvTimingReq(PacketPtr pkt)
217 return mon.recvTimingReq(pkt);
220 bool recvTimingSnoopResp(PacketPtr pkt)
222 return mon.recvTimingSnoopResp(pkt);
225 AddrRangeList getAddrRanges() const
227 return mon.getAddrRanges();
241 /** Instance of slave port, i.e. on the CPU side */
242 MonitorSlavePort slavePort;
244 void recvFunctional(PacketPtr pkt);
246 void recvFunctionalSnoop(PacketPtr pkt);
248 Tick recvAtomic(PacketPtr pkt);
250 Tick recvAtomicSnoop(PacketPtr pkt);
252 bool recvTimingReq(PacketPtr pkt);
254 bool recvTimingResp(PacketPtr pkt);
256 void recvTimingSnoopReq(PacketPtr pkt);
258 bool recvTimingSnoopResp(PacketPtr pkt);
260 void recvRetrySnoopResp();
262 AddrRangeList getAddrRanges() const;
264 bool isSnooping() const;
268 void recvRespRetry();
270 void recvRangeChange();
272 /** Stats declarations, all in a struct for convenience. */
276 /** Disable flag for burst length histograms **/
277 bool disableBurstLengthHists;
279 /** Histogram of read burst lengths */
280 Stats::Histogram readBurstLengthHist;
282 /** Histogram of write burst lengths */
283 Stats::Histogram writeBurstLengthHist;
285 /** Disable flag for the bandwidth histograms */
286 bool disableBandwidthHists;
289 * Histogram for read bandwidth per sample window. The
290 * internal counter is an unsigned int rather than a stat.
292 unsigned int readBytes;
293 Stats::Histogram readBandwidthHist;
294 Stats::Formula averageReadBW;
295 Stats::Scalar totalReadBytes;
298 * Histogram for write bandwidth per sample window. The
299 * internal counter is an unsigned int rather than a stat.
301 unsigned int writtenBytes;
302 Stats::Histogram writeBandwidthHist;
303 Stats::Formula averageWriteBW;
304 Stats::Scalar totalWrittenBytes;
306 /** Disable flag for latency histograms. */
307 bool disableLatencyHists;
309 /** Histogram of read request-to-response latencies */
310 Stats::Histogram readLatencyHist;
312 /** Histogram of write request-to-response latencies */
313 Stats::Histogram writeLatencyHist;
315 /** Disable flag for ITT distributions. */
316 bool disableITTDists;
319 * Inter transaction time (ITT) distributions. There are
320 * histograms of the time between two read, write or arbitrary
321 * accesses. The time of a request is the tick at which the
322 * request is forwarded by the monitor.
324 Stats::Distribution ittReadRead;
325 Stats::Distribution ittWriteWrite;
326 Stats::Distribution ittReqReq;
328 Tick timeOfLastWrite;
331 /** Disable flag for outstanding histograms. */
332 bool disableOutstandingHists;
335 * Histogram of outstanding read requests. Counter for
336 * outstanding read requests is an unsigned integer because
337 * it should not be reset when stats are reset.
339 Stats::Histogram outstandingReadsHist;
340 unsigned int outstandingReadReqs;
343 * Histogram of outstanding write requests. Counter for
344 * outstanding write requests is an unsigned integer because
345 * it should not be reset when stats are reset.
347 Stats::Histogram outstandingWritesHist;
348 unsigned int outstandingWriteReqs;
350 /** Disable flag for transaction histograms. */
351 bool disableTransactionHists;
353 /** Histogram of number of read transactions per time bin */
354 Stats::Histogram readTransHist;
355 unsigned int readTrans;
357 /** Histogram of number of timing write transactions per time bin */
358 Stats::Histogram writeTransHist;
359 unsigned int writeTrans;
361 /** Disable flag for address distributions. */
362 bool disableAddrDists;
364 /** Address mask for sources of read accesses to be captured */
365 const Addr readAddrMask;
367 /** Address mask for sources of write accesses to be captured */
368 const Addr writeAddrMask;
371 * Histogram of number of read accesses to addresses over
374 Stats::SparseHistogram readAddrDist;
377 * Histogram of number of write accesses to addresses over
380 Stats::SparseHistogram writeAddrDist;
383 * Create the monitor stats and initialise all the members
384 * that are not statistics themselves, but used to control the
385 * stats or track values during a sample period.
387 MonitorStats(const CommMonitorParams* params) :
388 disableBurstLengthHists(params->disable_burst_length_hists),
389 disableBandwidthHists(params->disable_bandwidth_hists),
390 readBytes(0), writtenBytes(0),
391 disableLatencyHists(params->disable_latency_hists),
392 disableITTDists(params->disable_itt_dists),
393 timeOfLastRead(0), timeOfLastWrite(0), timeOfLastReq(0),
394 disableOutstandingHists(params->disable_outstanding_hists),
395 outstandingReadReqs(0), outstandingWriteReqs(0),
396 disableTransactionHists(params->disable_transaction_hists),
397 readTrans(0), writeTrans(0),
398 disableAddrDists(params->disable_addr_dists),
399 readAddrMask(params->read_addr_mask),
400 writeAddrMask(params->write_addr_mask)
403 void updateReqStats(const ProbePoints::PacketInfo& pkt, bool is_atomic,
404 bool expects_response);
405 void updateRespStats(const ProbePoints::PacketInfo& pkt, Tick latency,
409 /** This function is called periodically at the end of each time bin */
410 void samplePeriodic();
412 /** Periodic event called at the end of each simulation time bin */
413 EventFunctionWrapper samplePeriodicEvent;
417 * @name Configuration
420 /** Length of simulation time bin*/
421 const Tick samplePeriodTicks;
422 /** Sample period in seconds */
423 const double samplePeriod;
427 /** Instantiate stats */
430 protected: // Probe points
433 * @name Memory system probe points
436 /** Successfully forwarded request packet */
437 ProbePoints::PacketUPtr ppPktReq;
439 /** Successfully forwarded response packet */
440 ProbePoints::PacketUPtr ppPktResp;
445 #endif //__MEM_COMM_MONITOR_HH__