src/mem/comm_monitor.hh

   1 /*
   2  * Copyright (c) 2012-2013, 2015 ARM Limited
   3  * All rights reserved
   4  *
   5  * The license below extends only to copyright in the software and shall
   6  * not be construed as granting a license to any other intellectual
   7  * property including but not limited to intellectual property relating
   8  * to a hardware implementation of the functionality of the software
   9  * licensed hereunder.  You may use the software subject to the license
  10  * terms below provided that you ensure that this notice is replicated
  11  * unmodified and in its entirety in all distributions of the software,
  12  * modified or unmodified, in source code or in binary form.
  13  *
  14  * Redistribution and use in source and binary forms, with or without
  15  * modification, are permitted provided that the following conditions are
  16  * met: redistributions of source code must retain the above copyright
  17  * notice, this list of conditions and the following disclaimer;
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  19  * notice, this list of conditions and the following disclaimer in the
  20  * documentation and/or other materials provided with the distribution;
  21  * neither the name of the copyright holders nor the names of its
  22  * contributors may be used to endorse or promote products derived from
  23  * this software without specific prior written permission.
  24  *
  25  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  26  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  27  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  28  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  29  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  30  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  31  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  32  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  33  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  34  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  35  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  36  *
  37  * Authors: Thomas Grass
  38  *          Andreas Hansson
  39  */
  40
  41 #ifndef __MEM_COMM_MONITOR_HH__
  42 #define __MEM_COMM_MONITOR_HH__
  43
  44 #include "base/statistics.hh"
  45 #include "mem/mem_object.hh"
  46 #include "params/CommMonitor.hh"
  47 #include "sim/probe/mem.hh"
  48
  49 /**
  50  * The communication monitor is a MemObject which can monitor statistics of
  51  * the communication happening between two ports in the memory system.
  52  *
  53  * Currently the following stats are implemented: Histograms of read/write
  54  * transactions, read/write burst lengths, read/write bandwidth,
  55  * outstanding read/write requests, read latency and inter transaction time
  56  * (read-read, write-write, read/write-read/write). Furthermore it allows
  57  * to capture the number of accesses to an address over time ("heat map").
  58  * All stats can be disabled from Python.
  59  */
  60 class CommMonitor : public MemObject
  61 {
  62
  63   public: // Construction & SimObject interfaces
  64
  65     /** Parameters of communication monitor */
  66     typedef CommMonitorParams Params;
  67     const Params* params() const
  68     { return reinterpret_cast<const Params*>(_params); }
  69
  70     /**
  71      * Constructor based on the Python params
  72      *
  73      * @param params Python parameters
  74      */
  75     CommMonitor(Params* params);
  76
  77     void init() override;
  78     void regStats() override;
  79     void startup() override;
  80     void regProbePoints() override;
  81
  82   public: // MemObject interfaces
  83     BaseMasterPort& getMasterPort(const std::string& if_name,
  84                                   PortID idx = InvalidPortID) override;
  85
  86     BaseSlavePort& getSlavePort(const std::string& if_name,
  87                                 PortID idx = InvalidPortID) override;
  88
  89   private:
  90
  91     /**
  92      * Sender state class for the monitor so that we can annotate
  93      * packets with a transmit time and receive time.
  94      */
  95     class CommMonitorSenderState : public Packet::SenderState
  96     {
  97
  98       public:
  99
 100         /**
 101          * Construct a new sender state and store the time so we can
 102          * calculate round-trip latency.
 103          *
 104          * @param _transmitTime Time of packet transmission
 105          */
 106         CommMonitorSenderState(Tick _transmitTime)
 107             : transmitTime(_transmitTime)
 108         { }
 109
 110         /** Destructor */
 111         ~CommMonitorSenderState() { }
 112
 113         /** Tick when request is transmitted */
 114         Tick transmitTime;
 115
 116     };
 117
 118     /**
 119      * This is the master port of the communication monitor. All recv
 120      * functions call a function in CommMonitor, where the
 121      * send function of the slave port is called. Besides this, these
 122      * functions can also perform actions for capturing statistics.
 123      */
 124     class MonitorMasterPort : public MasterPort
 125     {
 126
 127       public:
 128
 129         MonitorMasterPort(const std::string& _name, CommMonitor& _mon)
 130             : MasterPort(_name, &_mon), mon(_mon)
 131         { }
 132
 133       protected:
 134
 135         void recvFunctionalSnoop(PacketPtr pkt)
 136         {
 137             mon.recvFunctionalSnoop(pkt);
 138         }
 139
 140         Tick recvAtomicSnoop(PacketPtr pkt)
 141         {
 142             return mon.recvAtomicSnoop(pkt);
 143         }
 144
 145         bool recvTimingResp(PacketPtr pkt)
 146         {
 147             return mon.recvTimingResp(pkt);
 148         }
 149
 150         void recvTimingSnoopReq(PacketPtr pkt)
 151         {
 152             mon.recvTimingSnoopReq(pkt);
 153         }
 154
 155         void recvRangeChange()
 156         {
 157             mon.recvRangeChange();
 158         }
 159
 160         bool isSnooping() const
 161         {
 162             return mon.isSnooping();
 163         }
 164
 165         void recvReqRetry()
 166         {
 167             mon.recvReqRetry();
 168         }
 169
 170         void recvRetrySnoopResp()
 171         {
 172             mon.recvRetrySnoopResp();
 173         }
 174
 175       private:
 176
 177         CommMonitor& mon;
 178
 179     };
 180
 181     /** Instance of master port, facing the memory side */
 182     MonitorMasterPort masterPort;
 183
 184     /**
 185      * This is the slave port of the communication monitor. All recv
 186      * functions call a function in CommMonitor, where the
 187      * send function of the master port is called. Besides this, these
 188      * functions can also perform actions for capturing statistics.
 189      */
 190     class MonitorSlavePort : public SlavePort
 191     {
 192
 193       public:
 194
 195         MonitorSlavePort(const std::string& _name, CommMonitor& _mon)
 196             : SlavePort(_name, &_mon), mon(_mon)
 197         { }
 198
 199       protected:
 200
 201         void recvFunctional(PacketPtr pkt)
 202         {
 203             mon.recvFunctional(pkt);
 204         }
 205
 206         Tick recvAtomic(PacketPtr pkt)
 207         {
 208             return mon.recvAtomic(pkt);
 209         }
 210
 211         bool recvTimingReq(PacketPtr pkt)
 212         {
 213             return mon.recvTimingReq(pkt);
 214         }
 215
 216         bool recvTimingSnoopResp(PacketPtr pkt)
 217         {
 218             return mon.recvTimingSnoopResp(pkt);
 219         }
 220
 221         AddrRangeList getAddrRanges() const
 222         {
 223             return mon.getAddrRanges();
 224         }
 225
 226         void recvRespRetry()
 227         {
 228             mon.recvRespRetry();
 229         }
 230
 231       private:
 232
 233         CommMonitor& mon;
 234
 235     };
 236
 237     /** Instance of slave port, i.e. on the CPU side */
 238     MonitorSlavePort slavePort;
 239
 240     void recvFunctional(PacketPtr pkt);
 241
 242     void recvFunctionalSnoop(PacketPtr pkt);
 243
 244     Tick recvAtomic(PacketPtr pkt);
 245
 246     Tick recvAtomicSnoop(PacketPtr pkt);
 247
 248     bool recvTimingReq(PacketPtr pkt);
 249
 250     bool recvTimingResp(PacketPtr pkt);
 251
 252     void recvTimingSnoopReq(PacketPtr pkt);
 253
 254     bool recvTimingSnoopResp(PacketPtr pkt);
 255
 256     void recvRetrySnoopResp();
 257
 258     AddrRangeList getAddrRanges() const;
 259
 260     bool isSnooping() const;
 261
 262     void recvReqRetry();
 263
 264     void recvRespRetry();
 265
 266     void recvRangeChange();
 267
 268     /** Stats declarations, all in a struct for convenience. */
 269     struct MonitorStats
 270     {
 271
 272         /** Disable flag for burst length historgrams **/
 273         bool disableBurstLengthHists;
 274
 275         /** Histogram of read burst lengths */
 276         Stats::Histogram readBurstLengthHist;
 277
 278         /** Histogram of write burst lengths */
 279         Stats::Histogram writeBurstLengthHist;
 280
 281         /** Disable flag for the bandwidth histograms */
 282         bool disableBandwidthHists;
 283
 284         /**
 285          * Histogram for read bandwidth per sample window. The
 286          * internal counter is an unsigned int rather than a stat.
 287          */
 288         unsigned int readBytes;
 289         Stats::Histogram readBandwidthHist;
 290         Stats::Formula averageReadBW;
 291         Stats::Scalar totalReadBytes;
 292
 293         /**
 294          * Histogram for write bandwidth per sample window. The
 295          * internal counter is an unsigned int rather than a stat.
 296          */
 297         unsigned int writtenBytes;
 298         Stats::Histogram writeBandwidthHist;
 299         Stats::Formula averageWriteBW;
 300         Stats::Scalar totalWrittenBytes;
 301
 302         /** Disable flag for latency histograms. */
 303         bool disableLatencyHists;
 304
 305         /** Histogram of read request-to-response latencies */
 306         Stats::Histogram readLatencyHist;
 307
 308         /** Histogram of write request-to-response latencies */
 309         Stats::Histogram writeLatencyHist;
 310
 311         /** Disable flag for ITT distributions. */
 312         bool disableITTDists;
 313
 314         /**
 315          * Inter transaction time (ITT) distributions. There are
 316          * histograms of the time between two read, write or arbitrary
 317          * accesses. The time of a request is the tick at which the
 318          * request is forwarded by the monitor.
 319          */
 320         Stats::Distribution ittReadRead;
 321         Stats::Distribution ittWriteWrite;
 322         Stats::Distribution ittReqReq;
 323         Tick timeOfLastRead;
 324         Tick timeOfLastWrite;
 325         Tick timeOfLastReq;
 326
 327         /** Disable flag for outstanding histograms. */
 328         bool disableOutstandingHists;
 329
 330         /**
 331          * Histogram of outstanding read requests. Counter for
 332          * outstanding read requests is an unsigned integer because
 333          * it should not be reset when stats are reset.
 334          */
 335         Stats::Histogram outstandingReadsHist;
 336         unsigned int outstandingReadReqs;
 337
 338         /**
 339          * Histogram of outstanding write requests. Counter for
 340          * outstanding write requests is an unsigned integer because
 341          * it should not be reset when stats are reset.
 342          */
 343         Stats::Histogram outstandingWritesHist;
 344         unsigned int outstandingWriteReqs;
 345
 346         /** Disable flag for transaction histograms. */
 347         bool disableTransactionHists;
 348
 349         /** Histogram of number of read transactions per time bin */
 350         Stats::Histogram readTransHist;
 351         unsigned int readTrans;
 352
 353         /** Histogram of number of timing write transactions per time bin */
 354         Stats::Histogram writeTransHist;
 355         unsigned int writeTrans;
 356
 357         /** Disable flag for address distributions. */
 358         bool disableAddrDists;
 359
 360         /**
 361          * Histogram of number of read accesses to addresses over
 362          * time.
 363          */
 364         Stats::SparseHistogram readAddrDist;
 365
 366         /**
 367          * Histogram of number of write accesses to addresses over
 368          * time.
 369          */
 370         Stats::SparseHistogram writeAddrDist;
 371
 372         /**
 373          * Create the monitor stats and initialise all the members
 374          * that are not statistics themselves, but used to control the
 375          * stats or track values during a sample period.
 376          */
 377         MonitorStats(const CommMonitorParams* params) :
 378             disableBurstLengthHists(params->disable_burst_length_hists),
 379             disableBandwidthHists(params->disable_bandwidth_hists),
 380             readBytes(0), writtenBytes(0),
 381             disableLatencyHists(params->disable_latency_hists),
 382             disableITTDists(params->disable_itt_dists),
 383             timeOfLastRead(0), timeOfLastWrite(0), timeOfLastReq(0),
 384             disableOutstandingHists(params->disable_outstanding_hists),
 385             outstandingReadReqs(0), outstandingWriteReqs(0),
 386             disableTransactionHists(params->disable_transaction_hists),
 387             readTrans(0), writeTrans(0),
 388             disableAddrDists(params->disable_addr_dists)
 389         { }
 390
 391     };
 392
 393     /** This function is called periodically at the end of each time bin */
 394     void samplePeriodic();
 395
 396     /** Periodic event called at the end of each simulation time bin */
 397     EventWrapper<CommMonitor, &CommMonitor::samplePeriodic> samplePeriodicEvent;
 398
 399     /**
 400      *@{
 401      * @name Configuration
 402      */
 403
 404     /** Length of simulation time bin*/
 405     const Tick samplePeriodTicks;
 406     /** Sample period in seconds */
 407     const double samplePeriod;
 408
 409     /** Address mask for sources of read accesses to be captured */
 410     const Addr readAddrMask;
 411
 412     /** Address mask for sources of write accesses to be captured */
 413     const Addr writeAddrMask;
 414
 415     /** @} */
 416
 417     /** Instantiate stats */
 418     MonitorStats stats;
 419
 420   protected: // Probe points
 421     /**
 422      * @{
 423      * @name Memory system probe points
 424      */
 425
 426     /** Successfully forwarded request packet */
 427     ProbePoints::PacketUPtr ppPktReq;
 428
 429     /** Successfully forwarded response packet */
 430     ProbePoints::PacketUPtr ppPktResp;
 431
 432     /** @} */
 433 };
 434
 435 #endif //__MEM_COMM_MONITOR_HH__