mem: Clean up Request initialisation
[gem5.git] / src / mem / dramsim2_wrapper.cc
1 /*
2 * Copyright (c) 2013 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder. You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated
11 * unmodified and in its entirety in all distributions of the software,
12 * modified or unmodified, in source code or in binary form.
13 *
14 * Redistribution and use in source and binary forms, with or without
15 * modification, are permitted provided that the following conditions are
16 * met: redistributions of source code must retain the above copyright
17 * notice, this list of conditions and the following disclaimer;
18 * redistributions in binary form must reproduce the above copyright
19 * notice, this list of conditions and the following disclaimer in the
20 * documentation and/or other materials provided with the distribution;
21 * neither the name of the copyright holders nor the names of its
22 * contributors may be used to endorse or promote products derived from
23 * this software without specific prior written permission.
24 *
25 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
26 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
27 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
28 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
29 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
30 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
31 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
32 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
33 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
34 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
35 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
36 *
37 * Authors: Andreas Hansson
38 */
39
40 #include <cassert>
41
42 /**
43 * When building the debug binary, we need to undo the command-line
44 * definition of DEBUG not to clash with DRAMSim2 print macros that
45 * are included for no obvious reason.
46 */
47 #ifdef DEBUG
48 #undef DEBUG
49 #endif
50
51 #include <fstream>
52
53 #include "DRAMSim2/MultiChannelMemorySystem.h"
54 #include "base/compiler.hh"
55 #include "base/misc.hh"
56 #include "mem/dramsim2_wrapper.hh"
57
58 /**
59 * DRAMSim2 requires SHOW_SIM_OUTPUT to be defined (declared extern in
60 * the DRAMSim2 print macros), otherwise we get linking errors due to
61 * undefined references
62 */
63 int SHOW_SIM_OUTPUT = 0;
64
65 DRAMSim2Wrapper::DRAMSim2Wrapper(const std::string& config_file,
66 const std::string& system_file,
67 const std::string& working_dir,
68 const std::string& trace_file,
69 unsigned int memory_size_mb,
70 bool enable_debug) :
71 dramsim(new DRAMSim::MultiChannelMemorySystem(config_file, system_file,
72 working_dir, trace_file,
73 memory_size_mb, NULL, NULL)),
74 _clockPeriod(0.0), _queueSize(0), _burstSize(0)
75 {
76 // tell DRAMSim2 to ignore its internal notion of a CPU frequency
77 dramsim->setCPUClockSpeed(0);
78
79 // switch on debug output if requested
80 if (enable_debug)
81 SHOW_SIM_OUTPUT = 1;
82
83 // there is no way of getting DRAMSim2 to tell us what frequency
84 // it is assuming, so we have to extract it ourselves
85 _clockPeriod = extractConfig<double>("tCK=",
86 working_dir + '/' + config_file);
87
88 if (!_clockPeriod)
89 fatal("DRAMSim2 wrapper failed to get clock\n");
90
91 // we also need to know what transaction queue size DRAMSim2 is
92 // using so we can stall when responses are blocked
93 _queueSize = extractConfig<unsigned int>("TRANS_QUEUE_DEPTH=",
94 working_dir + '/' + system_file);
95
96 if (!_queueSize)
97 fatal("DRAMSim2 wrapper failed to get queue size\n");
98
99
100 // finally, get the data bus bits and burst length so we can add a
101 // sanity check for the burst size
102 unsigned int dataBusBits =
103 extractConfig<unsigned int>("JEDEC_DATA_BUS_BITS=",
104 working_dir + '/' + system_file);
105 unsigned int burstLength =
106 extractConfig<unsigned int>("BL=", working_dir + '/' + config_file);
107
108 if (!dataBusBits || !burstLength)
109 fatal("DRAMSim22 wrapper failed to get burst size\n");
110
111 _burstSize = dataBusBits * burstLength / 8;
112 }
113
114 DRAMSim2Wrapper::~DRAMSim2Wrapper()
115 {
116 delete dramsim;
117 }
118
119 template <typename T>
120 T
121 DRAMSim2Wrapper::extractConfig(const std::string& field_name,
122 const std::string& file_name) const
123 {
124 std::ifstream file_stream(file_name.c_str(), ios::in);
125
126 if (!file_stream.good())
127 fatal("DRAMSim2 wrapper could not open %s for reading\n", file_name);
128
129 bool found = false;
130 T res;
131 std::string line;
132 while (!found && file_stream) {
133 getline(file_stream, line);
134 if (line.substr(0, field_name.size()) == field_name) {
135 found = true;
136 istringstream iss(line.substr(field_name.size()));
137 iss >> res;
138 }
139 }
140
141 file_stream.close();
142
143 if (!found)
144 fatal("DRAMSim2 wrapper could not find %s in %s\n", field_name,
145 file_name);
146
147 return res;
148 }
149
150 void
151 DRAMSim2Wrapper::printStats()
152 {
153 dramsim->printStats(true);
154 }
155
156 void
157 DRAMSim2Wrapper::setCallbacks(DRAMSim::TransactionCompleteCB* read_callback,
158 DRAMSim::TransactionCompleteCB* write_callback)
159 {
160 // simply pass it on, for now we ignore the power callback
161 dramsim->RegisterCallbacks(read_callback, write_callback, NULL);
162 }
163
164 bool
165 DRAMSim2Wrapper::canAccept() const
166 {
167 return dramsim->willAcceptTransaction();
168 }
169
170 void
171 DRAMSim2Wrapper::enqueue(bool is_write, uint64_t addr)
172 {
173 bool success M5_VAR_USED = dramsim->addTransaction(is_write, addr);
174 assert(success);
175 }
176
177 double
178 DRAMSim2Wrapper::clockPeriod() const
179 {
180 return _clockPeriod;
181 }
182
183 unsigned int
184 DRAMSim2Wrapper::queueSize() const
185 {
186 return _queueSize;
187 }
188
189 unsigned int
190 DRAMSim2Wrapper::burstSize() const
191 {
192 return _burstSize;
193 }
194
195 void
196 DRAMSim2Wrapper::tick()
197 {
198 dramsim->update();
199 }