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37 * Authors: Andreas Hansson
42 * DRAMSim2Wrapper declaration
45 #ifndef __MEM_DRAMSIM2_WRAPPER_HH__
46 #define __MEM_DRAMSIM2_WRAPPER_HH__
50 #include "DRAMSim2/Callback.h"
53 * Forward declaration to avoid includes
57 class MultiChannelMemorySystem;
62 * Wrapper class to avoid having DRAMSim2 names like ClockDomain etc
63 * clashing with the normal gem5 world. Many of the DRAMSim2 headers
64 * do not make use of namespaces, and quite a few also open up
65 * std. The only thing that needs to be exposed externally are the
66 * callbacks. This wrapper effectively avoids clashes by not including
67 * any of the conventional gem5 headers (e.g. Packet or SimObject).
74 DRAMSim::MultiChannelMemorySystem* dramsim;
78 unsigned int _queueSize;
80 unsigned int _burstSize;
83 T extractConfig(const std::string& field_name,
84 const std::string& file_name) const;
89 * Create an instance of the DRAMSim2 multi-channel memory
90 * controller using a specific config and system description.
92 * @param config_file Memory config file
93 * @param system_file Controller config file
94 * @param working_dir Path pre-pended to config files
95 * @param trace_file Output trace file
96 * @param memory_size_mb Total memory size in MByte
97 * @param enable_debug Enable debug output
99 DRAMSim2Wrapper(const std::string& config_file,
100 const std::string& system_file,
101 const std::string& working_dir,
102 const std::string& trace_file,
103 unsigned int memory_size_mb,
108 * Print the stats gathered in DRAMsim2.
113 * Set the callbacks to use for read and write completion.
115 * @param read_callback Callback used for read completions
116 * @param write_callback Callback used for write completions
118 void setCallbacks(DRAMSim::TransactionCompleteCB* read_callback,
119 DRAMSim::TransactionCompleteCB* write_callback);
122 * Determine if the controller can accept a new packet or not.
124 * @return true if the controller can accept transactions
126 bool canAccept() const;
129 * Enqueue a packet. This assumes that canAccept has returned true.
131 * @param pkt Packet to turn into a DRAMSim2 transaction
133 void enqueue(bool is_write, uint64_t addr);
136 * Get the internal clock period used by DRAMSim2, specified in
139 * @return The clock period of the DRAM interface in ns
141 double clockPeriod() const;
144 * Get the transaction queue size used by DRAMSim2.
146 * @return The queue size counted in number of transactions
148 unsigned int queueSize() const;
151 * Get the burst size in bytes used by DRAMSim2.
153 * @return The burst size in bytes (data width * burst length)
155 unsigned int burstSize() const;
158 * Progress the memory controller one cycle
163 #endif //__MEM_DRAMSIM2_WRAPPER_HH__