src/mem/dramsim2_wrapper.hh

   1 /*
   2  * Copyright (c) 2013 ARM Limited
   3  * All rights reserved
   4  *
   5  * The license below extends only to copyright in the software and shall
   6  * not be construed as granting a license to any other intellectual
   7  * property including but not limited to intellectual property relating
   8  * to a hardware implementation of the functionality of the software
   9  * licensed hereunder.  You may use the software subject to the license
  10  * terms below provided that you ensure that this notice is replicated
  11  * unmodified and in its entirety in all distributions of the software,
  12  * modified or unmodified, in source code or in binary form.
  13  *
  14  * Redistribution and use in source and binary forms, with or without
  15  * modification, are permitted provided that the following conditions are
  16  * met: redistributions of source code must retain the above copyright
  17  * notice, this list of conditions and the following disclaimer;
  18  * redistributions in binary form must reproduce the above copyright
  19  * notice, this list of conditions and the following disclaimer in the
  20  * documentation and/or other materials provided with the distribution;
  21  * neither the name of the copyright holders nor the names of its
  22  * contributors may be used to endorse or promote products derived from
  23  * this software without specific prior written permission.
  24  *
  25  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  26  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  27  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  28  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  29  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  30  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  31  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  32  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  33  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  34  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  35  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  36  */
  37
  38 /**
  39  * @file
  40  * DRAMSim2Wrapper declaration
  41  */
  42
  43 #ifndef __MEM_DRAMSIM2_WRAPPER_HH__
  44 #define __MEM_DRAMSIM2_WRAPPER_HH__
  45
  46 #include <string>
  47
  48 #include "DRAMSim2/Callback.h"
  49
  50 /**
  51  * Forward declaration to avoid includes
  52  */
  53 namespace DRAMSim {
  54
  55 class MultiChannelMemorySystem;
  56
  57 }
  58
  59 /**
  60  * Wrapper class to avoid having DRAMSim2 names like ClockDomain etc
  61  * clashing with the normal gem5 world. Many of the DRAMSim2 headers
  62  * do not make use of namespaces, and quite a few also open up
  63  * std. The only thing that needs to be exposed externally are the
  64  * callbacks. This wrapper effectively avoids clashes by not including
  65  * any of the conventional gem5 headers (e.g. Packet or SimObject).
  66  */
  67 class DRAMSim2Wrapper
  68 {
  69
  70   private:
  71
  72     DRAMSim::MultiChannelMemorySystem* dramsim;
  73
  74     double _clockPeriod;
  75
  76     unsigned int _queueSize;
  77
  78     unsigned int _burstSize;
  79
  80     template <typename T>
  81     T extractConfig(const std::string& field_name,
  82                     const std::string& file_name) const;
  83
  84   public:
  85
  86     /**
  87      * Create an instance of the DRAMSim2 multi-channel memory
  88      * controller using a specific config and system description.
  89      *
  90      * @param config_file Memory config file
  91      * @param system_file Controller config file
  92      * @param working_dir Path pre-pended to config files
  93      * @param trace_file Output trace file
  94      * @param memory_size_mb Total memory size in MByte
  95      * @param enable_debug Enable debug output
  96      */
  97     DRAMSim2Wrapper(const std::string& config_file,
  98                     const std::string& system_file,
  99                     const std::string& working_dir,
 100                     const std::string& trace_file,
 101                     unsigned int memory_size_mb,
 102                     bool enable_debug);
 103     ~DRAMSim2Wrapper();
 104
 105     /**
 106      * Print the stats gathered in DRAMsim2.
 107      */
 108     void printStats();
 109
 110     /**
 111      * Set the callbacks to use for read and write completion.
 112      *
 113      * @param read_callback Callback used for read completions
 114      * @param write_callback Callback used for write completions
 115      */
 116     void setCallbacks(DRAMSim::TransactionCompleteCB* read_callback,
 117                       DRAMSim::TransactionCompleteCB* write_callback);
 118
 119     /**
 120      * Determine if the controller can accept a new packet or not.
 121      *
 122      * @return true if the controller can accept transactions
 123      */
 124     bool canAccept() const;
 125
 126     /**
 127      * Enqueue a packet. This assumes that canAccept has returned true.
 128      *
 129      * @param pkt Packet to turn into a DRAMSim2 transaction
 130      */
 131     void enqueue(bool is_write, uint64_t addr);
 132
 133     /**
 134      * Get the internal clock period used by DRAMSim2, specified in
 135      * ns.
 136      *
 137      * @return The clock period of the DRAM interface in ns
 138      */
 139     double clockPeriod() const;
 140
 141     /**
 142      * Get the transaction queue size used by DRAMSim2.
 143      *
 144      * @return The queue size counted in number of transactions
 145      */
 146     unsigned int queueSize() const;
 147
 148     /**
 149      * Get the burst size in bytes used by DRAMSim2.
 150      *
 151      * @return The burst size in bytes (data width * burst length)
 152      */
 153     unsigned int burstSize() const;
 154
 155     /**
 156      * Progress the memory controller one cycle
 157      */
 158     void tick();
 159 };
 160
 161 #endif //__MEM_DRAMSIM2_WRAPPER_HH__