mem-cache: Add match functions to QueueEntry
[gem5.git] / src / mem / fs_translating_port_proxy.cc
1 /*
2 * Copyright (c) 2011,2013 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder. You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated
11 * unmodified and in its entirety in all distributions of the software,
12 * modified or unmodified, in source code or in binary form.
13 *
14 * Copyright (c) 2006 The Regents of The University of Michigan
15 * All rights reserved.
16 *
17 * Redistribution and use in source and binary forms, with or without
18 * modification, are permitted provided that the following conditions are
19 * met: redistributions of source code must retain the above copyright
20 * notice, this list of conditions and the following disclaimer;
21 * redistributions in binary form must reproduce the above copyright
22 * notice, this list of conditions and the following disclaimer in the
23 * documentation and/or other materials provided with the distribution;
24 * neither the name of the copyright holders nor the names of its
25 * contributors may be used to endorse or promote products derived from
26 * this software without specific prior written permission.
27 *
28 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
29 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
30 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
31 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
32 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
33 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
34 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
35 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
36 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
37 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
38 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
39 *
40 * Authors: Ali Saidi
41 * Andreas Hansson
42 */
43
44 /**
45 * @file
46 * Port object definitions.
47 */
48
49 #include "mem/fs_translating_port_proxy.hh"
50
51 #include "arch/vtophys.hh"
52 #include "base/chunk_generator.hh"
53 #include "cpu/base.hh"
54 #include "cpu/thread_context.hh"
55 #include "sim/system.hh"
56
57 FSTranslatingPortProxy::FSTranslatingPortProxy(ThreadContext *tc)
58 : PortProxy(tc->getCpuPtr()->getDataPort(),
59 tc->getSystemPtr()->cacheLineSize()), _tc(tc)
60 {
61 }
62
63 FSTranslatingPortProxy::FSTranslatingPortProxy(MasterPort &port,
64 unsigned int cacheLineSize)
65 : PortProxy(port, cacheLineSize), _tc(NULL)
66 {
67 }
68
69 FSTranslatingPortProxy::~FSTranslatingPortProxy()
70 {
71 }
72
73 void
74 FSTranslatingPortProxy::readBlob(Addr addr, uint8_t *p, int size) const
75 {
76 Addr paddr;
77 for (ChunkGenerator gen(addr, size, TheISA::PageBytes); !gen.done();
78 gen.next())
79 {
80 if (_tc)
81 paddr = TheISA::vtophys(_tc,gen.addr());
82 else
83 paddr = TheISA::vtophys(gen.addr());
84
85 PortProxy::readBlobPhys(paddr, 0, p, gen.size());
86 p += gen.size();
87 }
88 }
89
90 void
91 FSTranslatingPortProxy::writeBlob(Addr addr, const uint8_t *p, int size) const
92 {
93 Addr paddr;
94 for (ChunkGenerator gen(addr, size, TheISA::PageBytes); !gen.done();
95 gen.next())
96 {
97 if (_tc)
98 paddr = TheISA::vtophys(_tc,gen.addr());
99 else
100 paddr = TheISA::vtophys(gen.addr());
101
102 PortProxy::writeBlobPhys(paddr, 0, p, gen.size());
103 p += gen.size();
104 }
105 }
106
107 void
108 FSTranslatingPortProxy::memsetBlob(Addr address, uint8_t v, int size) const
109 {
110 Addr paddr;
111 for (ChunkGenerator gen(address, size, TheISA::PageBytes); !gen.done();
112 gen.next())
113 {
114 if (_tc)
115 paddr = TheISA::vtophys(_tc,gen.addr());
116 else
117 paddr = TheISA::vtophys(gen.addr());
118
119 PortProxy::memsetBlobPhys(paddr, 0, v, gen.size());
120 }
121 }
122
123 void
124 CopyOut(ThreadContext *tc, void *dest, Addr src, size_t cplen)
125 {
126 uint8_t *dst = (uint8_t *)dest;
127 tc->getVirtProxy().readBlob(src, dst, cplen);
128 }
129
130 void
131 CopyIn(ThreadContext *tc, Addr dest, const void *source, size_t cplen)
132 {
133 uint8_t *src = (uint8_t *)source;
134 tc->getVirtProxy().writeBlob(dest, src, cplen);
135 }
136
137 void
138 CopyStringOut(ThreadContext *tc, char *dst, Addr vaddr, size_t maxlen)
139 {
140 char *start = dst;
141 FSTranslatingPortProxy &vp = tc->getVirtProxy();
142
143 bool foundNull = false;
144 while ((dst - start + 1) < maxlen && !foundNull) {
145 vp.readBlob(vaddr++, (uint8_t*)dst, 1);
146 if (*dst == '\0')
147 foundNull = true;
148 dst++;
149 }
150
151 if (!foundNull)
152 *dst = '\0';
153 }
154
155 void
156 CopyStringIn(ThreadContext *tc, const char *src, Addr vaddr)
157 {
158 FSTranslatingPortProxy &vp = tc->getVirtProxy();
159 for (ChunkGenerator gen(vaddr, strlen(src), TheISA::PageBytes); !gen.done();
160 gen.next())
161 {
162 vp.writeBlob(gen.addr(), (uint8_t*)src, gen.size());
163 src += gen.size();
164 }
165 }