src/mem/mem_delay.hh

   1 /*
   2  * Copyright (c) 2018 ARM Limited
   3  * All rights reserved
   4  *
   5  * The license below extends only to copyright in the software and shall
   6  * not be construed as granting a license to any other intellectual
   7  * property including but not limited to intellectual property relating
   8  * to a hardware implementation of the functionality of the software
   9  * licensed hereunder.  You may use the software subject to the license
  10  * terms below provided that you ensure that this notice is replicated
  11  * unmodified and in its entirety in all distributions of the software,
  12  * modified or unmodified, in source code or in binary form.
  13  *
  14  * Redistribution and use in source and binary forms, with or without
  15  * modification, are permitted provided that the following conditions are
  16  * met: redistributions of source code must retain the above copyright
  17  * notice, this list of conditions and the following disclaimer;
  18  * redistributions in binary form must reproduce the above copyright
  19  * notice, this list of conditions and the following disclaimer in the
  20  * documentation and/or other materials provided with the distribution;
  21  * neither the name of the copyright holders nor the names of its
  22  * contributors may be used to endorse or promote products derived from
  23  * this software without specific prior written permission.
  24  *
  25  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  26  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  27  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  28  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  29  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  30  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  31  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  32  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  33  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  34  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  35  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  36  */
  37
  38 #ifndef __MEM_MEM_DELAY_HH__
  39 #define __MEM_MEM_DELAY_HH__
  40
  41 #include "mem/qport.hh"
  42 #include "sim/clocked_object.hh"
  43
  44 struct MemDelayParams;
  45 struct SimpleMemDelayParams;
  46
  47 /**
  48  * This abstract component provides a mechanism to delay
  49  * packets. It can be spliced between arbitrary ports of the memory
  50  * system and delays packets that pass through it.
  51  *
  52  * Specialisations of this abstract class should override at least one
  53  * of delayReq, delayResp, deleySnoopReq, delaySnoopResp. These
  54  * methods receive a PacketPtr as their argument and return a delay in
  55  * Ticks. The base class implements an infinite buffer to hold delayed
  56  * packets until they are ready. The intention is to use this
  57  * component for rapid prototyping of other memory system components
  58  * that introduce a packet processing delays.
  59  *
  60  * NOTE: Packets may be reordered if the delays aren't constant.
  61  */
  62 class MemDelay : public ClockedObject
  63 {
  64
  65   public:
  66     MemDelay(const MemDelayParams &params);
  67
  68     void init() override;
  69
  70   protected: // Port interface
  71     Port &getPort(const std::string &if_name,
  72                   PortID idx=InvalidPortID) override;
  73
  74     class RequestPort : public QueuedRequestPort
  75     {
  76       public:
  77         RequestPort(const std::string &_name, MemDelay &_parent);
  78
  79       protected:
  80         bool recvTimingResp(PacketPtr pkt) override;
  81
  82         void recvFunctionalSnoop(PacketPtr pkt) override;
  83
  84         Tick recvAtomicSnoop(PacketPtr pkt) override;
  85
  86         void recvTimingSnoopReq(PacketPtr pkt) override;
  87
  88         void recvRangeChange() override {
  89             parent.responsePort.sendRangeChange();
  90         }
  91
  92         bool isSnooping() const override {
  93             return parent.responsePort.isSnooping();
  94         }
  95
  96       private:
  97         MemDelay& parent;
  98     };
  99
 100     class ResponsePort : public QueuedResponsePort
 101     {
 102       public:
 103         ResponsePort(const std::string &_name, MemDelay &_parent);
 104
 105       protected:
 106         Tick recvAtomic(PacketPtr pkt) override;
 107         bool recvTimingReq(PacketPtr pkt) override;
 108         void recvFunctional(PacketPtr pkt) override;
 109         bool recvTimingSnoopResp(PacketPtr pkt) override;
 110
 111         AddrRangeList getAddrRanges() const override {
 112             return parent.requestPort.getAddrRanges();
 113         }
 114
 115         bool tryTiming(PacketPtr pkt) override { return true; }
 116
 117       private:
 118
 119         MemDelay& parent;
 120
 121     };
 122
 123     bool trySatisfyFunctional(PacketPtr pkt);
 124
 125     RequestPort requestPort;
 126     ResponsePort responsePort;
 127
 128     ReqPacketQueue reqQueue;
 129     RespPacketQueue respQueue;
 130     SnoopRespPacketQueue snoopRespQueue;
 131
 132   protected:
 133     /**
 134      * Delay a request by some number of ticks.
 135      *
 136      * @return Ticks to delay packet.
 137      */
 138     virtual Tick delayReq(PacketPtr pkt) { return 0; }
 139
 140     /**
 141      * Delay a response by some number of ticks.
 142      *
 143      * @return Ticks to delay packet.
 144      */
 145     virtual Tick delayResp(PacketPtr pkt) { return 0; }
 146
 147     /**
 148      * Delay a snoop response by some number of ticks.
 149      *
 150      * @return Ticks to delay packet.
 151      */
 152     virtual Tick delaySnoopResp(PacketPtr pkt) { return 0; }
 153 };
 154
 155 /**
 156  * Delay packets by a constant time. Delays can be specified
 157  * separately for read requests, read responses, write requests, and
 158  * write responses.
 159  *
 160  * This class does not delay snoops or requests/responses that are
 161  * neither reads or writes.
 162  */
 163 class SimpleMemDelay : public MemDelay
 164 {
 165   public:
 166     SimpleMemDelay(const SimpleMemDelayParams &params);
 167
 168   protected:
 169     Tick delayReq(PacketPtr pkt) override;
 170     Tick delayResp(PacketPtr pkt) override;
 171
 172   protected: // Params
 173     const Tick readReqDelay;
 174     const Tick readRespDelay;
 175
 176     const Tick writeReqDelay;
 177     const Tick writeRespDelay;
 178 };
 179
 180 #endif //__MEM_MEM_DELAY_HH__