2 * Copyright (c) 2012 ARM Limited
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder. You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated
11 * unmodified and in its entirety in all distributions of the software,
12 * modified or unmodified, in source code or in binary form.
14 * Copyright (c) 2002-2005 The Regents of The University of Michigan
15 * All rights reserved.
17 * Redistribution and use in source and binary forms, with or without
18 * modification, are permitted provided that the following conditions are
19 * met: redistributions of source code must retain the above copyright
20 * notice, this list of conditions and the following disclaimer;
21 * redistributions in binary form must reproduce the above copyright
22 * notice, this list of conditions and the following disclaimer in the
23 * documentation and/or other materials provided with the distribution;
24 * neither the name of the copyright holders nor the names of its
25 * contributors may be used to endorse or promote products derived from
26 * this software without specific prior written permission.
28 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
29 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
30 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
31 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
32 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
33 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
34 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
35 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
36 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
37 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
38 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
40 * Authors: Ron Dreslinski
46 * MemObject declaration.
49 #ifndef __MEM_MEM_OBJECT_HH__
50 #define __MEM_MEM_OBJECT_HH__
52 #include "mem/port.hh"
53 #include "params/MemObject.hh"
54 #include "sim/clocked_object.hh"
57 * The MemObject class extends the ClockedObject with accessor functions
58 * to get its master and slave ports.
60 class MemObject : public ClockedObject
63 typedef MemObjectParams Params;
64 const Params *params() const
65 { return dynamic_cast<const Params *>(_params); }
67 MemObject(const Params *params);
70 * Get a master port with a given name and index. This is used at
71 * binding time and returns a reference to a protocol-agnostic
74 * @param if_name Port name
75 * @param idx Index in the case of a VectorPort
77 * @return A reference to the given port
79 virtual BaseMasterPort& getMasterPort(const std::string& if_name,
80 PortID idx = InvalidPortID);
83 * Get a slave port with a given name and index. This is used at
84 * binding time and returns a reference to a protocol-agnostic
87 * @param if_name Port name
88 * @param idx Index in the case of a VectorPort
90 * @return A reference to the given port
92 virtual BaseSlavePort& getSlavePort(const std::string& if_name,
93 PortID idx = InvalidPortID);
96 #endif //__MEM_MEM_OBJECT_HH__