src/mem/noncoherent_bus.cc

   1 /*
   2  * Copyright (c) 2011-2013 ARM Limited
   3  * All rights reserved
   4  *
   5  * The license below extends only to copyright in the software and shall
   6  * not be construed as granting a license to any other intellectual
   7  * property including but not limited to intellectual property relating
   8  * to a hardware implementation of the functionality of the software
   9  * licensed hereunder.  You may use the software subject to the license
  10  * terms below provided that you ensure that this notice is replicated
  11  * unmodified and in its entirety in all distributions of the software,
  12  * modified or unmodified, in source code or in binary form.
  13  *
  14  * Copyright (c) 2006 The Regents of The University of Michigan
  15  * All rights reserved.
  16  *
  17  * Redistribution and use in source and binary forms, with or without
  18  * modification, are permitted provided that the following conditions are
  19  * met: redistributions of source code must retain the above copyright
  20  * notice, this list of conditions and the following disclaimer;
  21  * redistributions in binary form must reproduce the above copyright
  22  * notice, this list of conditions and the following disclaimer in the
  23  * documentation and/or other materials provided with the distribution;
  24  * neither the name of the copyright holders nor the names of its
  25  * contributors may be used to endorse or promote products derived from
  26  * this software without specific prior written permission.
  27  *
  28  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  29  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  30  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  31  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  32  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  33  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  34  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  35  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  36  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  37  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  38  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  39  *
  40  * Authors: Ali Saidi
  41  *          Andreas Hansson
  42  *          William Wang
  43  */
  44
  45 /**
  46  * @file
  47  * Definition of a bus object.
  48  */
  49
  50 #include "base/misc.hh"
  51 #include "base/trace.hh"
  52 #include "debug/Bus.hh"
  53 #include "debug/BusAddrRanges.hh"
  54 #include "debug/NoncoherentBus.hh"
  55 #include "mem/noncoherent_bus.hh"
  56
  57 NoncoherentBus::NoncoherentBus(const NoncoherentBusParams *p)
  58     : BaseBus(p),
  59       reqLayer(*this, ".reqLayer", p->port_master_connection_count +
  60                p->port_default_connection_count),
  61       respLayer(*this, ".respLayer", p->port_slave_connection_count)
  62 {
  63     // create the ports based on the size of the master and slave
  64     // vector ports, and the presence of the default port, the ports
  65     // are enumerated starting from zero
  66     for (int i = 0; i < p->port_master_connection_count; ++i) {
  67         std::string portName = csprintf("%s.master[%d]", name(), i);
  68         MasterPort* bp = new NoncoherentBusMasterPort(portName, *this, i);
  69         masterPorts.push_back(bp);
  70     }
  71
  72     // see if we have a default slave device connected and if so add
  73     // our corresponding master port
  74     if (p->port_default_connection_count) {
  75         defaultPortID = masterPorts.size();
  76         std::string portName = name() + ".default";
  77         MasterPort* bp = new NoncoherentBusMasterPort(portName, *this,
  78                                                       defaultPortID);
  79         masterPorts.push_back(bp);
  80     }
  81
  82     // create the slave ports, once again starting at zero
  83     for (int i = 0; i < p->port_slave_connection_count; ++i) {
  84         std::string portName = csprintf("%s.slave[%d]", name(), i);
  85         SlavePort* bp = new NoncoherentBusSlavePort(portName, *this, i);
  86         slavePorts.push_back(bp);
  87     }
  88
  89     clearPortCache();
  90 }
  91
  92 bool
  93 NoncoherentBus::recvTimingReq(PacketPtr pkt, PortID slave_port_id)
  94 {
  95     // determine the source port based on the id
  96     SlavePort *src_port = slavePorts[slave_port_id];
  97
  98     // we should never see express snoops on a non-coherent bus
  99     assert(!pkt->isExpressSnoop());
 100
 101     // determine the destination based on the address
 102     PortID dest_port_id = findPort(pkt->getAddr());
 103
 104     // test if the bus should be considered occupied for the current
 105     // port
 106     if (!reqLayer.tryTiming(src_port, dest_port_id)) {
 107         DPRINTF(NoncoherentBus, "recvTimingReq: src %s %s 0x%x BUSY\n",
 108                 src_port->name(), pkt->cmdString(), pkt->getAddr());
 109         return false;
 110     }
 111
 112     DPRINTF(NoncoherentBus, "recvTimingReq: src %s %s 0x%x\n",
 113             src_port->name(), pkt->cmdString(), pkt->getAddr());
 114
 115     // set the source port for routing of the response
 116     pkt->setSrc(slave_port_id);
 117
 118     calcPacketTiming(pkt);
 119     Tick packetFinishTime = pkt->busLastWordDelay + curTick();
 120
 121     // since it is a normal request, attempt to send the packet
 122     bool success = masterPorts[dest_port_id]->sendTimingReq(pkt);
 123
 124     if (!success)  {
 125         // inhibited packets should never be forced to retry
 126         assert(!pkt->memInhibitAsserted());
 127
 128         DPRINTF(NoncoherentBus, "recvTimingReq: src %s %s 0x%x RETRY\n",
 129                 src_port->name(), pkt->cmdString(), pkt->getAddr());
 130
 131         // undo the calculation so we can check for 0 again
 132         pkt->busFirstWordDelay = pkt->busLastWordDelay = 0;
 133
 134         // occupy until the header is sent
 135         reqLayer.failedTiming(src_port, dest_port_id,
 136                               clockEdge(Cycles(headerCycles)));
 137
 138         return false;
 139     }
 140
 141     reqLayer.succeededTiming(packetFinishTime);
 142
 143     return true;
 144 }
 145
 146 bool
 147 NoncoherentBus::recvTimingResp(PacketPtr pkt, PortID master_port_id)
 148 {
 149     // determine the source port based on the id
 150     MasterPort *src_port = masterPorts[master_port_id];
 151
 152     // test if the bus should be considered occupied for the current
 153     // port
 154     if (!respLayer.tryTiming(src_port, pkt->getDest())) {
 155         DPRINTF(NoncoherentBus, "recvTimingResp: src %s %s 0x%x BUSY\n",
 156                 src_port->name(), pkt->cmdString(), pkt->getAddr());
 157         return false;
 158     }
 159
 160     DPRINTF(NoncoherentBus, "recvTimingResp: src %s %s 0x%x\n",
 161             src_port->name(), pkt->cmdString(), pkt->getAddr());
 162
 163     calcPacketTiming(pkt);
 164     Tick packetFinishTime = pkt->busLastWordDelay + curTick();
 165
 166     // send the packet to the destination through one of our slave
 167     // ports, as determined by the destination field
 168     bool success M5_VAR_USED = slavePorts[pkt->getDest()]->sendTimingResp(pkt);
 169
 170     // currently it is illegal to block responses... can lead to
 171     // deadlock
 172     assert(success);
 173
 174     respLayer.succeededTiming(packetFinishTime);
 175
 176     return true;
 177 }
 178
 179 void
 180 NoncoherentBus::recvRetry(PortID master_port_id)
 181 {
 182     // responses never block on forwarding them, so the retry will
 183     // always be coming from a port to which we tried to forward a
 184     // request
 185     reqLayer.recvRetry(master_port_id);
 186 }
 187
 188 Tick
 189 NoncoherentBus::recvAtomic(PacketPtr pkt, PortID slave_port_id)
 190 {
 191     DPRINTF(NoncoherentBus, "recvAtomic: packet src %s addr 0x%x cmd %s\n",
 192             slavePorts[slave_port_id]->name(), pkt->getAddr(),
 193             pkt->cmdString());
 194
 195     // determine the destination port
 196     PortID dest_id = findPort(pkt->getAddr());
 197
 198     // forward the request to the appropriate destination
 199     Tick response_latency = masterPorts[dest_id]->sendAtomic(pkt);
 200
 201     // @todo: Not setting first-word time
 202     pkt->busLastWordDelay = response_latency;
 203     return response_latency;
 204 }
 205
 206 void
 207 NoncoherentBus::recvFunctional(PacketPtr pkt, PortID slave_port_id)
 208 {
 209     if (!pkt->isPrint()) {
 210         // don't do DPRINTFs on PrintReq as it clutters up the output
 211         DPRINTF(NoncoherentBus,
 212                 "recvFunctional: packet src %s addr 0x%x cmd %s\n",
 213                 slavePorts[slave_port_id]->name(), pkt->getAddr(),
 214                 pkt->cmdString());
 215     }
 216
 217     // determine the destination port
 218     PortID dest_id = findPort(pkt->getAddr());
 219
 220     // forward the request to the appropriate destination
 221     masterPorts[dest_id]->sendFunctional(pkt);
 222 }
 223
 224 unsigned int
 225 NoncoherentBus::drain(DrainManager *dm)
 226 {
 227     // sum up the individual layers
 228     return reqLayer.drain(dm) + respLayer.drain(dm);
 229 }
 230
 231 NoncoherentBus*
 232 NoncoherentBusParams::create()
 233 {
 234     return new NoncoherentBus(this);
 235 }