src/mem/noncoherent_xbar.hh

   1 /*
   2  * Copyright (c) 2011-2015 ARM Limited
   3  * All rights reserved
   4  *
   5  * The license below extends only to copyright in the software and shall
   6  * not be construed as granting a license to any other intellectual
   7  * property including but not limited to intellectual property relating
   8  * to a hardware implementation of the functionality of the software
   9  * licensed hereunder.  You may use the software subject to the license
  10  * terms below provided that you ensure that this notice is replicated
  11  * unmodified and in its entirety in all distributions of the software,
  12  * modified or unmodified, in source code or in binary form.
  13  *
  14  * Copyright (c) 2002-2005 The Regents of The University of Michigan
  15  * All rights reserved.
  16  *
  17  * Redistribution and use in source and binary forms, with or without
  18  * modification, are permitted provided that the following conditions are
  19  * met: redistributions of source code must retain the above copyright
  20  * notice, this list of conditions and the following disclaimer;
  21  * redistributions in binary form must reproduce the above copyright
  22  * notice, this list of conditions and the following disclaimer in the
  23  * documentation and/or other materials provided with the distribution;
  24  * neither the name of the copyright holders nor the names of its
  25  * contributors may be used to endorse or promote products derived from
  26  * this software without specific prior written permission.
  27  *
  28  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  29  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  30  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  31  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  32  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  33  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  34  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  35  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  36  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  37  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  38  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  39  *
  40  * Authors: Ron Dreslinski
  41  *          Ali Saidi
  42  *          Andreas Hansson
  43  *          William Wang
  44  */
  45
  46 /**
  47  * @file
  48  * Declaration of a non-coherent crossbar.
  49  */
  50
  51 #ifndef __MEM_NONCOHERENT_XBAR_HH__
  52 #define __MEM_NONCOHERENT_XBAR_HH__
  53
  54 #include "mem/xbar.hh"
  55 #include "params/NoncoherentXBar.hh"
  56
  57 /**
  58  * A non-coherent crossbar connects a number of non-snooping masters
  59  * and slaves, and routes the request and response packets based on
  60  * the address. The request packets issued by the master connected to
  61  * a non-coherent crossbar could still snoop in caches attached to a
  62  * coherent crossbar, as is the case with the I/O bus and memory bus
  63  * in most system configurations. No snoops will, however, reach any
  64  * master on the non-coherent crossbar itself.
  65  *
  66  * The non-coherent crossbar can be used as a template for modelling
  67  * PCIe, and non-coherent AMBA and OCP buses, and is typically used
  68  * for the I/O buses.
  69  */
  70 class NoncoherentXBar : public BaseXBar
  71 {
  72
  73   protected:
  74
  75     /**
  76      * Declare the layers of this crossbar, one vector for requests
  77      * and one for responses.
  78      */
  79     std::vector<ReqLayer*> reqLayers;
  80     std::vector<RespLayer*> respLayers;
  81
  82     /**
  83      * Declaration of the non-coherent crossbar slave port type, one
  84      * will be instantiated for each of the master ports connecting to
  85      * the crossbar.
  86      */
  87     class NoncoherentXBarSlavePort : public QueuedSlavePort
  88     {
  89       private:
  90
  91         /** A reference to the crossbar to which this port belongs. */
  92         NoncoherentXBar &xbar;
  93
  94         /** A normal packet queue used to store responses. */
  95         RespPacketQueue queue;
  96
  97       public:
  98
  99         NoncoherentXBarSlavePort(const std::string &_name,
 100                                 NoncoherentXBar &_xbar, PortID _id)
 101             : QueuedSlavePort(_name, &_xbar, queue, _id), xbar(_xbar),
 102               queue(_xbar, *this)
 103         { }
 104
 105       protected:
 106
 107         bool
 108         recvTimingReq(PacketPtr pkt) override
 109         {
 110             return xbar.recvTimingReq(pkt, id);
 111         }
 112
 113         Tick
 114         recvAtomic(PacketPtr pkt) override
 115         {
 116             return xbar.recvAtomicBackdoor(pkt, id);
 117         }
 118
 119         Tick
 120         recvAtomicBackdoor(PacketPtr pkt, MemBackdoorPtr &backdoor) override
 121         {
 122             return xbar.recvAtomicBackdoor(pkt, id, &backdoor);
 123         }
 124
 125         void
 126         recvFunctional(PacketPtr pkt) override
 127         {
 128             xbar.recvFunctional(pkt, id);
 129         }
 130
 131         AddrRangeList
 132         getAddrRanges() const override
 133         {
 134             return xbar.getAddrRanges();
 135         }
 136     };
 137
 138     /**
 139      * Declaration of the crossbar master port type, one will be
 140      * instantiated for each of the slave ports connecting to the
 141      * crossbar.
 142      */
 143     class NoncoherentXBarMasterPort : public MasterPort
 144     {
 145       private:
 146
 147         /** A reference to the crossbar to which this port belongs. */
 148         NoncoherentXBar &xbar;
 149
 150       public:
 151
 152         NoncoherentXBarMasterPort(const std::string &_name,
 153                                  NoncoherentXBar &_xbar, PortID _id)
 154             : MasterPort(_name, &_xbar, _id), xbar(_xbar)
 155         { }
 156
 157       protected:
 158
 159         bool
 160         recvTimingResp(PacketPtr pkt) override
 161         {
 162             return xbar.recvTimingResp(pkt, id);
 163         }
 164
 165         void
 166         recvRangeChange() override
 167         {
 168             xbar.recvRangeChange(id);
 169         }
 170
 171         void
 172         recvReqRetry() override
 173         {
 174             xbar.recvReqRetry(id);
 175         }
 176     };
 177
 178     virtual bool recvTimingReq(PacketPtr pkt, PortID slave_port_id);
 179     virtual bool recvTimingResp(PacketPtr pkt, PortID master_port_id);
 180     void recvReqRetry(PortID master_port_id);
 181     Tick recvAtomicBackdoor(PacketPtr pkt, PortID slave_port_id,
 182                             MemBackdoorPtr *backdoor=nullptr);
 183     void recvFunctional(PacketPtr pkt, PortID slave_port_id);
 184
 185   public:
 186
 187     NoncoherentXBar(const NoncoherentXBarParams *p);
 188
 189     virtual ~NoncoherentXBar();
 190
 191     void regStats() override;
 192     Stats::Scalar totPktSize;
 193 };
 194
 195 #endif //__MEM_NONCOHERENT_XBAR_HH__