mem-cache: Create an address aware TempCacheBlk
[gem5.git] / src / mem / packet.cc
1 /*
2 * Copyright (c) 2011-2018 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder. You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated
11 * unmodified and in its entirety in all distributions of the software,
12 * modified or unmodified, in source code or in binary form.
13 *
14 * Copyright (c) 2006 The Regents of The University of Michigan
15 * Copyright (c) 2010,2015 Advanced Micro Devices, Inc.
16 * All rights reserved.
17 *
18 * Redistribution and use in source and binary forms, with or without
19 * modification, are permitted provided that the following conditions are
20 * met: redistributions of source code must retain the above copyright
21 * notice, this list of conditions and the following disclaimer;
22 * redistributions in binary form must reproduce the above copyright
23 * notice, this list of conditions and the following disclaimer in the
24 * documentation and/or other materials provided with the distribution;
25 * neither the name of the copyright holders nor the names of its
26 * contributors may be used to endorse or promote products derived from
27 * this software without specific prior written permission.
28 *
29 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
30 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
31 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
32 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
33 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
34 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
35 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
36 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
37 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
38 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
39 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
40 *
41 * Authors: Ali Saidi
42 * Steve Reinhardt
43 */
44
45 /**
46 * @file
47 * Definition of the Packet Class, a packet is a transaction occuring
48 * between a single level of the memory heirarchy (ie L1->L2).
49 */
50
51 #include "mem/packet.hh"
52
53 #include <cstring>
54 #include <iostream>
55
56 #include "base/cprintf.hh"
57 #include "base/logging.hh"
58 #include "base/trace.hh"
59 #include "mem/packet_access.hh"
60
61 using namespace std;
62
63 // The one downside to bitsets is that static initializers can get ugly.
64 #define SET1(a1) (1 << (a1))
65 #define SET2(a1, a2) (SET1(a1) | SET1(a2))
66 #define SET3(a1, a2, a3) (SET2(a1, a2) | SET1(a3))
67 #define SET4(a1, a2, a3, a4) (SET3(a1, a2, a3) | SET1(a4))
68 #define SET5(a1, a2, a3, a4, a5) (SET4(a1, a2, a3, a4) | SET1(a5))
69 #define SET6(a1, a2, a3, a4, a5, a6) (SET5(a1, a2, a3, a4, a5) | SET1(a6))
70 #define SET7(a1, a2, a3, a4, a5, a6, a7) (SET6(a1, a2, a3, a4, a5, a6) | \
71 SET1(a7))
72
73 const MemCmd::CommandInfo
74 MemCmd::commandInfo[] =
75 {
76 /* InvalidCmd */
77 { 0, InvalidCmd, "InvalidCmd" },
78 /* ReadReq - Read issued by a non-caching agent such as a CPU or
79 * device, with no restrictions on alignment. */
80 { SET3(IsRead, IsRequest, NeedsResponse), ReadResp, "ReadReq" },
81 /* ReadResp */
82 { SET3(IsRead, IsResponse, HasData), InvalidCmd, "ReadResp" },
83 /* ReadRespWithInvalidate */
84 { SET4(IsRead, IsResponse, HasData, IsInvalidate),
85 InvalidCmd, "ReadRespWithInvalidate" },
86 /* WriteReq */
87 { SET5(IsWrite, NeedsWritable, IsRequest, NeedsResponse, HasData),
88 WriteResp, "WriteReq" },
89 /* WriteResp */
90 { SET2(IsWrite, IsResponse), InvalidCmd, "WriteResp" },
91 /* WritebackDirty */
92 { SET5(IsWrite, IsRequest, IsEviction, HasData, FromCache),
93 InvalidCmd, "WritebackDirty" },
94 /* WritebackClean - This allows the upstream cache to writeback a
95 * line to the downstream cache without it being considered
96 * dirty. */
97 { SET5(IsWrite, IsRequest, IsEviction, HasData, FromCache),
98 InvalidCmd, "WritebackClean" },
99 /* WriteClean - This allows a cache to write a dirty block to a memory
100 below without evicting its copy. */
101 { SET4(IsWrite, IsRequest, HasData, FromCache), InvalidCmd, "WriteClean" },
102 /* CleanEvict */
103 { SET3(IsRequest, IsEviction, FromCache), InvalidCmd, "CleanEvict" },
104 /* SoftPFReq */
105 { SET4(IsRead, IsRequest, IsSWPrefetch, NeedsResponse),
106 SoftPFResp, "SoftPFReq" },
107 /* HardPFReq */
108 { SET5(IsRead, IsRequest, IsHWPrefetch, NeedsResponse, FromCache),
109 HardPFResp, "HardPFReq" },
110 /* SoftPFResp */
111 { SET4(IsRead, IsResponse, IsSWPrefetch, HasData),
112 InvalidCmd, "SoftPFResp" },
113 /* HardPFResp */
114 { SET4(IsRead, IsResponse, IsHWPrefetch, HasData),
115 InvalidCmd, "HardPFResp" },
116 /* WriteLineReq */
117 { SET5(IsWrite, NeedsWritable, IsRequest, NeedsResponse, HasData),
118 WriteResp, "WriteLineReq" },
119 /* UpgradeReq */
120 { SET6(IsInvalidate, NeedsWritable, IsUpgrade, IsRequest, NeedsResponse,
121 FromCache),
122 UpgradeResp, "UpgradeReq" },
123 /* SCUpgradeReq: response could be UpgradeResp or UpgradeFailResp */
124 { SET7(IsInvalidate, NeedsWritable, IsUpgrade, IsLlsc,
125 IsRequest, NeedsResponse, FromCache),
126 UpgradeResp, "SCUpgradeReq" },
127 /* UpgradeResp */
128 { SET2(IsUpgrade, IsResponse),
129 InvalidCmd, "UpgradeResp" },
130 /* SCUpgradeFailReq: generates UpgradeFailResp but still gets the data */
131 { SET7(IsRead, NeedsWritable, IsInvalidate,
132 IsLlsc, IsRequest, NeedsResponse, FromCache),
133 UpgradeFailResp, "SCUpgradeFailReq" },
134 /* UpgradeFailResp - Behaves like a ReadExReq, but notifies an SC
135 * that it has failed, acquires line as Dirty*/
136 { SET3(IsRead, IsResponse, HasData),
137 InvalidCmd, "UpgradeFailResp" },
138 /* ReadExReq - Read issues by a cache, always cache-line aligned,
139 * and the response is guaranteed to be writeable (exclusive or
140 * even modified) */
141 { SET6(IsRead, NeedsWritable, IsInvalidate, IsRequest, NeedsResponse,
142 FromCache),
143 ReadExResp, "ReadExReq" },
144 /* ReadExResp - Response matching a read exclusive, as we check
145 * the need for exclusive also on responses */
146 { SET3(IsRead, IsResponse, HasData),
147 InvalidCmd, "ReadExResp" },
148 /* ReadCleanReq - Read issued by a cache, always cache-line
149 * aligned, and the response is guaranteed to not contain dirty data
150 * (exclusive or shared).*/
151 { SET4(IsRead, IsRequest, NeedsResponse, FromCache),
152 ReadResp, "ReadCleanReq" },
153 /* ReadSharedReq - Read issued by a cache, always cache-line
154 * aligned, response is shared, possibly exclusive, owned or even
155 * modified. */
156 { SET4(IsRead, IsRequest, NeedsResponse, FromCache),
157 ReadResp, "ReadSharedReq" },
158 /* LoadLockedReq: note that we use plain ReadResp as response, so that
159 * we can also use ReadRespWithInvalidate when needed */
160 { SET4(IsRead, IsLlsc, IsRequest, NeedsResponse),
161 ReadResp, "LoadLockedReq" },
162 /* StoreCondReq */
163 { SET6(IsWrite, NeedsWritable, IsLlsc,
164 IsRequest, NeedsResponse, HasData),
165 StoreCondResp, "StoreCondReq" },
166 /* StoreCondFailReq: generates failing StoreCondResp */
167 { SET6(IsWrite, NeedsWritable, IsLlsc,
168 IsRequest, NeedsResponse, HasData),
169 StoreCondResp, "StoreCondFailReq" },
170 /* StoreCondResp */
171 { SET3(IsWrite, IsLlsc, IsResponse),
172 InvalidCmd, "StoreCondResp" },
173 /* SwapReq -- for Swap ldstub type operations */
174 { SET6(IsRead, IsWrite, NeedsWritable, IsRequest, HasData, NeedsResponse),
175 SwapResp, "SwapReq" },
176 /* SwapResp -- for Swap ldstub type operations */
177 { SET4(IsRead, IsWrite, IsResponse, HasData),
178 InvalidCmd, "SwapResp" },
179 /* IntReq -- for interrupts */
180 { SET4(IsWrite, IsRequest, NeedsResponse, HasData),
181 MessageResp, "MessageReq" },
182 /* IntResp -- for interrupts */
183 { SET2(IsWrite, IsResponse), InvalidCmd, "MessageResp" },
184 /* MemFenceReq -- for synchronization requests */
185 {SET2(IsRequest, NeedsResponse), MemFenceResp, "MemFenceReq"},
186 /* MemFenceResp -- for synchronization responses */
187 {SET1(IsResponse), InvalidCmd, "MemFenceResp"},
188 /* Cache Clean Request -- Update with the latest data all existing
189 copies of the block down to the point indicated by the
190 request */
191 { SET4(IsRequest, IsClean, NeedsResponse, FromCache),
192 CleanSharedResp, "CleanSharedReq" },
193 /* Cache Clean Response - Indicates that all caches up to the
194 specified point of reference have a up-to-date copy of the
195 cache block or no copy at all */
196 { SET2(IsResponse, IsClean), InvalidCmd, "CleanSharedResp" },
197 /* Cache Clean and Invalidate Request -- Invalidate all existing
198 copies down to the point indicated by the request */
199 { SET5(IsRequest, IsInvalidate, IsClean, NeedsResponse, FromCache),
200 CleanInvalidResp, "CleanInvalidReq" },
201 /* Cache Clean and Invalidate Respose -- Indicates that no cache
202 above the specified point holds the block and that the block
203 was written to a memory below the specified point. */
204 { SET3(IsResponse, IsInvalidate, IsClean),
205 InvalidCmd, "CleanInvalidResp" },
206 /* InvalidDestError -- packet dest field invalid */
207 { SET2(IsResponse, IsError), InvalidCmd, "InvalidDestError" },
208 /* BadAddressError -- memory address invalid */
209 { SET2(IsResponse, IsError), InvalidCmd, "BadAddressError" },
210 /* FunctionalReadError */
211 { SET3(IsRead, IsResponse, IsError), InvalidCmd, "FunctionalReadError" },
212 /* FunctionalWriteError */
213 { SET3(IsWrite, IsResponse, IsError), InvalidCmd, "FunctionalWriteError" },
214 /* PrintReq */
215 { SET2(IsRequest, IsPrint), InvalidCmd, "PrintReq" },
216 /* Flush Request */
217 { SET3(IsRequest, IsFlush, NeedsWritable), InvalidCmd, "FlushReq" },
218 /* Invalidation Request */
219 { SET5(IsInvalidate, IsRequest, NeedsWritable, NeedsResponse, FromCache),
220 InvalidateResp, "InvalidateReq" },
221 /* Invalidation Response */
222 { SET2(IsInvalidate, IsResponse),
223 InvalidCmd, "InvalidateResp" }
224 };
225
226 bool
227 Packet::checkFunctional(Printable *obj, Addr addr, bool is_secure, int size,
228 uint8_t *_data)
229 {
230 Addr func_start = getAddr();
231 Addr func_end = getAddr() + getSize() - 1;
232 Addr val_start = addr;
233 Addr val_end = val_start + size - 1;
234
235 if (is_secure != _isSecure || func_start > val_end ||
236 val_start > func_end) {
237 // no intersection
238 return false;
239 }
240
241 // check print first since it doesn't require data
242 if (isPrint()) {
243 assert(!_data);
244 safe_cast<PrintReqState*>(senderState)->printObj(obj);
245 return false;
246 }
247
248 // we allow the caller to pass NULL to signify the other packet
249 // has no data
250 if (!_data) {
251 return false;
252 }
253
254 // offset of functional request into supplied value (could be
255 // negative if partial overlap)
256 int offset = func_start - val_start;
257
258 if (isRead()) {
259 if (func_start >= val_start && func_end <= val_end) {
260 memcpy(getPtr<uint8_t>(), _data + offset, getSize());
261 if (bytesValid.empty())
262 bytesValid.resize(getSize(), true);
263 // complete overlap, and as the current packet is a read
264 // we are done
265 return true;
266 } else {
267 // Offsets and sizes to copy in case of partial overlap
268 int func_offset;
269 int val_offset;
270 int overlap_size;
271
272 // calculate offsets and copy sizes for the two byte arrays
273 if (val_start < func_start && val_end <= func_end) {
274 // the one we are checking against starts before and
275 // ends before or the same
276 val_offset = func_start - val_start;
277 func_offset = 0;
278 overlap_size = val_end - func_start;
279 } else if (val_start >= func_start && val_end > func_end) {
280 // the one we are checking against starts after or the
281 // same, and ends after
282 val_offset = 0;
283 func_offset = val_start - func_start;
284 overlap_size = func_end - val_start;
285 } else if (val_start >= func_start && val_end <= func_end) {
286 // the one we are checking against is completely
287 // subsumed in the current packet, possibly starting
288 // and ending at the same address
289 val_offset = 0;
290 func_offset = val_start - func_start;
291 overlap_size = size;
292 } else if (val_start < func_start && val_end > func_end) {
293 // the current packet is completely subsumed in the
294 // one we are checking against
295 val_offset = func_start - val_start;
296 func_offset = 0;
297 overlap_size = func_end - func_start;
298 } else {
299 panic("Missed a case for checkFunctional with "
300 " %s 0x%x size %d, against 0x%x size %d\n",
301 cmdString(), getAddr(), getSize(), addr, size);
302 }
303
304 // copy partial data into the packet's data array
305 uint8_t *dest = getPtr<uint8_t>() + func_offset;
306 uint8_t *src = _data + val_offset;
307 memcpy(dest, src, overlap_size);
308
309 // initialise the tracking of valid bytes if we have not
310 // used it already
311 if (bytesValid.empty())
312 bytesValid.resize(getSize(), false);
313
314 // track if we are done filling the functional access
315 bool all_bytes_valid = true;
316
317 int i = 0;
318
319 // check up to func_offset
320 for (; all_bytes_valid && i < func_offset; ++i)
321 all_bytes_valid &= bytesValid[i];
322
323 // update the valid bytes
324 for (i = func_offset; i < func_offset + overlap_size; ++i)
325 bytesValid[i] = true;
326
327 // check the bit after the update we just made
328 for (; all_bytes_valid && i < getSize(); ++i)
329 all_bytes_valid &= bytesValid[i];
330
331 return all_bytes_valid;
332 }
333 } else if (isWrite()) {
334 if (offset >= 0) {
335 memcpy(_data + offset, getConstPtr<uint8_t>(),
336 (min(func_end, val_end) - func_start) + 1);
337 } else {
338 // val_start > func_start
339 memcpy(_data, getConstPtr<uint8_t>() - offset,
340 (min(func_end, val_end) - val_start) + 1);
341 }
342 } else {
343 panic("Don't know how to handle command %s\n", cmdString());
344 }
345
346 // keep going with request by default
347 return false;
348 }
349
350 void
351 Packet::pushSenderState(Packet::SenderState *sender_state)
352 {
353 assert(sender_state != NULL);
354 sender_state->predecessor = senderState;
355 senderState = sender_state;
356 }
357
358 Packet::SenderState *
359 Packet::popSenderState()
360 {
361 assert(senderState != NULL);
362 SenderState *sender_state = senderState;
363 senderState = sender_state->predecessor;
364 sender_state->predecessor = NULL;
365 return sender_state;
366 }
367
368 uint64_t
369 Packet::getUintX(ByteOrder endian) const
370 {
371 switch(getSize()) {
372 case 1:
373 return (uint64_t)get<uint8_t>(endian);
374 case 2:
375 return (uint64_t)get<uint16_t>(endian);
376 case 4:
377 return (uint64_t)get<uint32_t>(endian);
378 case 8:
379 return (uint64_t)get<uint64_t>(endian);
380 default:
381 panic("%i isn't a supported word size.\n", getSize());
382 }
383 }
384
385 void
386 Packet::setUintX(uint64_t w, ByteOrder endian)
387 {
388 switch(getSize()) {
389 case 1:
390 set<uint8_t>((uint8_t)w, endian);
391 break;
392 case 2:
393 set<uint16_t>((uint16_t)w, endian);
394 break;
395 case 4:
396 set<uint32_t>((uint32_t)w, endian);
397 break;
398 case 8:
399 set<uint64_t>((uint64_t)w, endian);
400 break;
401 default:
402 panic("%i isn't a supported word size.\n", getSize());
403 }
404
405 }
406
407 void
408 Packet::print(ostream &o, const int verbosity, const string &prefix) const
409 {
410 ccprintf(o, "%s%s [%x:%x]%s%s%s%s%s%s", prefix, cmdString(),
411 getAddr(), getAddr() + getSize() - 1,
412 req->isSecure() ? " (s)" : "",
413 req->isInstFetch() ? " IF" : "",
414 req->isUncacheable() ? " UC" : "",
415 isExpressSnoop() ? " ES" : "",
416 req->isToPOC() ? " PoC" : "",
417 req->isToPOU() ? " PoU" : "");
418 }
419
420 std::string
421 Packet::print() const {
422 ostringstream str;
423 print(str);
424 return str.str();
425 }
426
427 Packet::PrintReqState::PrintReqState(ostream &_os, int _verbosity)
428 : curPrefixPtr(new string("")), os(_os), verbosity(_verbosity)
429 {
430 labelStack.push_back(LabelStackEntry("", curPrefixPtr));
431 }
432
433 Packet::PrintReqState::~PrintReqState()
434 {
435 labelStack.pop_back();
436 assert(labelStack.empty());
437 delete curPrefixPtr;
438 }
439
440 Packet::PrintReqState::
441 LabelStackEntry::LabelStackEntry(const string &_label, string *_prefix)
442 : label(_label), prefix(_prefix), labelPrinted(false)
443 {
444 }
445
446 void
447 Packet::PrintReqState::pushLabel(const string &lbl, const string &prefix)
448 {
449 labelStack.push_back(LabelStackEntry(lbl, curPrefixPtr));
450 curPrefixPtr = new string(*curPrefixPtr);
451 *curPrefixPtr += prefix;
452 }
453
454 void
455 Packet::PrintReqState::popLabel()
456 {
457 delete curPrefixPtr;
458 curPrefixPtr = labelStack.back().prefix;
459 labelStack.pop_back();
460 assert(!labelStack.empty());
461 }
462
463 void
464 Packet::PrintReqState::printLabels()
465 {
466 if (!labelStack.back().labelPrinted) {
467 LabelStack::iterator i = labelStack.begin();
468 LabelStack::iterator end = labelStack.end();
469 while (i != end) {
470 if (!i->labelPrinted) {
471 ccprintf(os, "%s%s\n", *(i->prefix), i->label);
472 i->labelPrinted = true;
473 }
474 i++;
475 }
476 }
477 }
478
479
480 void
481 Packet::PrintReqState::printObj(Printable *obj)
482 {
483 printLabels();
484 obj->print(os, verbosity, curPrefix());
485 }