src/mem/page_table.cc

   1 /*
   2  * Copyright (c) 2003 The Regents of The University of Michigan
   3  * All rights reserved.
   4  *
   5  * Redistribution and use in source and binary forms, with or without
   6  * modification, are permitted provided that the following conditions are
   7  * met: redistributions of source code must retain the above copyright
   8  * notice, this list of conditions and the following disclaimer;
   9  * redistributions in binary form must reproduce the above copyright
  10  * notice, this list of conditions and the following disclaimer in the
  11  * documentation and/or other materials provided with the distribution;
  12  * neither the name of the copyright holders nor the names of its
  13  * contributors may be used to endorse or promote products derived from
  14  * this software without specific prior written permission.
  15  *
  16  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  17  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  18  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  19  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  20  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  21  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  22  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  23  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  24  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  25  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  26  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  27  *
  28  * Authors: Steve Reinhardt
  29  *          Ron Dreslinski
  30  *          Ali Saidi
  31  */
  32
  33 /**
  34  * @file
  35  * Definitions of page table.
  36  */
  37 #include <string>
  38 #include <map>
  39 #include <fstream>
  40
  41 #include "arch/faults.hh"
  42 #include "base/bitfield.hh"
  43 #include "base/intmath.hh"
  44 #include "base/trace.hh"
  45 #include "mem/page_table.hh"
  46 #include "sim/sim_object.hh"
  47 #include "sim/system.hh"
  48
  49 using namespace std;
  50 using namespace TheISA;
  51
  52 PageTable::PageTable(System *_system, Addr _pageSize)
  53     : pageSize(_pageSize), offsetMask(mask(floorLog2(_pageSize))),
  54       system(_system)
  55 {
  56     assert(isPowerOf2(pageSize));
  57     pTableCache[0].vaddr = 0;
  58     pTableCache[1].vaddr = 0;
  59     pTableCache[2].vaddr = 0;
  60 }
  61
  62 PageTable::~PageTable()
  63 {
  64 }
  65
  66 void
  67 PageTable::allocate(Addr vaddr, int64_t size)
  68 {
  69     // starting address must be page aligned
  70     assert(pageOffset(vaddr) == 0);
  71
  72     DPRINTF(MMU, "Allocating Page: %#x-%#x\n", vaddr, vaddr+ size);
  73
  74     for (; size > 0; size -= pageSize, vaddr += pageSize) {
  75         PTableItr iter = pTable.find(vaddr);
  76
  77         if (iter != pTable.end()) {
  78             // already mapped
  79             fatal("PageTable::allocate: address 0x%x already mapped",
  80                     vaddr);
  81         }
  82
  83         pTable[vaddr] = TheISA::TlbEntry(system->new_page());
  84         updateCache(vaddr, pTable[vaddr]);
  85     }
  86 }
  87
  88 bool
  89 PageTable::lookup(Addr vaddr, TheISA::TlbEntry &entry)
  90 {
  91     Addr page_addr = pageAlign(vaddr);
  92
  93     if (pTableCache[0].vaddr == page_addr) {
  94         entry = pTableCache[0].entry;
  95         return true;
  96     }
  97     if (pTableCache[1].vaddr == page_addr) {
  98         entry = pTableCache[1].entry;
  99         return true;
 100     }
 101     if (pTableCache[2].vaddr == page_addr) {
 102         entry = pTableCache[2].entry;
 103         return true;
 104     }
 105
 106     PTableItr iter = pTable.find(page_addr);
 107
 108     if (iter == pTable.end()) {
 109         return false;
 110     }
 111
 112     updateCache(page_addr, iter->second);
 113     entry = iter->second;
 114     return true;
 115 }
 116
 117 bool
 118 PageTable::translate(Addr vaddr, Addr &paddr)
 119 {
 120     TheISA::TlbEntry entry;
 121     if (!lookup(vaddr, entry))
 122         return false;
 123     paddr = pageOffset(vaddr) + entry.pageStart;
 124     return true;
 125 }
 126
 127 Fault
 128 PageTable::translate(RequestPtr req)
 129 {
 130     Addr paddr;
 131     assert(pageAlign(req->getVaddr() + req->getSize() - 1)
 132            == pageAlign(req->getVaddr()));
 133     if (!translate(req->getVaddr(), paddr)) {
 134         return Fault(new GenericPageTableFault(req->getVaddr()));
 135     }
 136     req->setPaddr(paddr);
 137     if ((paddr & (pageSize - 1)) + req->getSize() > pageSize) {
 138         panic("Request spans page boundaries!\n");
 139         return NoFault;
 140     }
 141     return NoFault;
 142 }
 143
 144 void
 145 PageTable::serialize(std::ostream &os)
 146 {
 147     paramOut(os, "ptable.size", pTable.size());
 148
 149     int count = 0;
 150
 151     PTableItr iter = pTable.begin();
 152     PTableItr end = pTable.end();
 153     while (iter != end) {
 154         paramOut(os, csprintf("ptable.entry%dvaddr", count), iter->first);
 155         iter->second.serialize(os);
 156
 157         ++iter;
 158         ++count;
 159     }
 160     assert(count == pTable.size());
 161 }
 162
 163 void
 164 PageTable::unserialize(Checkpoint *cp, const std::string &section)
 165 {
 166     int i = 0, count;
 167     paramIn(cp, section, "ptable.size", count);
 168     Addr vaddr;
 169     TheISA::TlbEntry entry;
 170
 171     pTable.clear();
 172
 173     while(i < count) {
 174         paramIn(cp, section, csprintf("ptable.entry%dvaddr", i), vaddr);
 175         entry.unserialize(cp, section);
 176         pTable[vaddr] = entry;
 177         ++i;
 178    }
 179 }
 180