2 * Copyright (c) 2012 ARM Limited
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
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8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder. You may use the software subject to the license
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23 * this software without specific prior written permission.
25 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
26 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
27 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
28 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
29 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
30 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
31 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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35 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
37 * Authors: Andreas Hansson
40 #ifndef __PHYSICAL_MEMORY_HH__
41 #define __PHYSICAL_MEMORY_HH__
43 #include "base/addr_range_map.hh"
44 #include "mem/port.hh"
47 * Forward declaration to avoid header dependencies.
52 * The physical memory encapsulates all memories in the system and
53 * provides basic functionality for accessing those memories without
54 * going through the memory system and interconnect.
56 * The physical memory is also responsible for providing the host
57 * system backingstore used by the memories in the simulated guest
58 * system. When the system is created, the physical memory allocates
59 * the backing store based on the address ranges that are populated in
60 * the system, and does so indepentent of how those map to actual
61 * memory controllers. Thus, the physical memory completely abstracts
62 * the mapping of the backing store of the host system and the address
63 * mapping in the guest system. This enables us to arbitrarily change
64 * the number of memory controllers, and their address mapping, as
65 * long as the ranges stay the same.
67 class PhysicalMemory : public Serializable
76 AddrRangeMap<AbstractMemory*> addrMap;
78 // a mutable cache for the last range that matched an address
79 mutable AddrRange rangeCache;
81 // All address-mapped memories
82 std::vector<AbstractMemory*> memories;
84 // The total memory size
87 // The physical memory used to provide the memory in the simulated
89 std::vector<std::pair<AddrRange, uint8_t*> > backingStore;
92 PhysicalMemory(const PhysicalMemory&);
95 PhysicalMemory& operator=(const PhysicalMemory&);
98 * Create the memory region providing the backing store for a
99 * given address range that corresponds to a set of memories in
100 * the simulated system.
102 * @param range The address range covered
103 * @param memories The memories this range maps to
105 void createBackingStore(AddrRange range,
106 const std::vector<AbstractMemory*>& _memories);
111 * Create a physical memory object, wrapping a number of memories.
113 PhysicalMemory(const std::string& _name,
114 const std::vector<AbstractMemory*>& _memories);
117 * Unmap all the backing store we have used.
122 * Return the name for debugging and for creation of sections for
125 const std::string name() const { return _name; }
128 * Check if a physical address is within a range of a memory that
129 * is part of the global address map.
131 * @param addr A physical address
132 * @return Whether the address corresponds to a memory
134 bool isMemAddr(Addr addr) const;
137 * Get the memory ranges for all memories that are to be reported
138 * to the configuration table. The ranges are merged before they
139 * are returned such that any interleaved ranges appear as a
142 * @return All configuration table memory ranges
144 AddrRangeList getConfAddrRanges() const;
147 * Get the total physical memory size.
149 * @return The sum of all memory sizes
151 uint64_t totalSize() const { return size; }
154 * Get the pointers to the backing store for external host
155 * access. Note that memory in the guest should be accessed using
156 * access() or functionalAccess(). This interface is primarily
157 * intended for CPU models using hardware virtualization. Note
158 * that memories that are null are not present, and that the
159 * backing store may also contain memories that are not part of
160 * the OS-visible global address map and thus are allowed to
163 * @return Pointers to the memory backing store
165 std::vector<std::pair<AddrRange, uint8_t*> > getBackingStore() const
166 { return backingStore; }
169 * Perform an untimed memory access and update all the state
170 * (e.g. locked addresses) and statistics accordingly. The packet
171 * is turned into a response if required.
173 * @param pkt Packet performing the access
175 void access(PacketPtr pkt);
178 * Perform an untimed memory read or write without changing
179 * anything but the memory itself. No stats are affected by this
180 * access. In addition to normal accesses this also facilitates
183 * @param pkt Packet performing the access
185 void functionalAccess(PacketPtr pkt);
188 * Serialize all the memories in the system. This is independent
189 * of the logical memory layout, and the serialization only sees
190 * the contigous backing store, independent of how this maps to
191 * logical memories in the guest system.
193 * @param os stream to serialize to
195 void serialize(std::ostream& os);
198 * Serialize a specific store.
200 * @param store_id Unique identifier of this backing store
201 * @param range The address range of this backing store
202 * @param pmem The host pointer to this backing store
204 void serializeStore(std::ostream& os, unsigned int store_id,
205 AddrRange range, uint8_t* pmem);
208 * Unserialize the memories in the system. As with the
209 * serialization, this action is independent of how the address
210 * ranges are mapped to logical memories in the guest system.
212 void unserialize(Checkpoint* cp, const std::string& section);
215 * Unserialize a specific backing store, identified by a section.
217 void unserializeStore(Checkpoint* cp, const std::string& section);
221 #endif //__PHYSICAL_MEMORY_HH__