mem: Consistently use ISO prefixes
[gem5.git] / src / mem / physical.hh
1 /*
2 * Copyright (c) 2012 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder. You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated
11 * unmodified and in its entirety in all distributions of the software,
12 * modified or unmodified, in source code or in binary form.
13 *
14 * Redistribution and use in source and binary forms, with or without
15 * modification, are permitted provided that the following conditions are
16 * met: redistributions of source code must retain the above copyright
17 * notice, this list of conditions and the following disclaimer;
18 * redistributions in binary form must reproduce the above copyright
19 * notice, this list of conditions and the following disclaimer in the
20 * documentation and/or other materials provided with the distribution;
21 * neither the name of the copyright holders nor the names of its
22 * contributors may be used to endorse or promote products derived from
23 * this software without specific prior written permission.
24 *
25 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
26 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
27 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
28 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
29 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
30 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
31 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
32 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
33 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
34 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
35 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
36 */
37
38 #ifndef __MEM_PHYSICAL_HH__
39 #define __MEM_PHYSICAL_HH__
40
41 #include <cstdint>
42 #include <string>
43 #include <vector>
44
45 #include "base/addr_range.hh"
46 #include "base/addr_range_map.hh"
47 #include "mem/packet.hh"
48 #include "sim/serialize.hh"
49
50 /**
51 * Forward declaration to avoid header dependencies.
52 */
53 class AbstractMemory;
54
55 /**
56 * A single entry for the backing store.
57 */
58 class BackingStoreEntry
59 {
60 public:
61
62 /**
63 * Create a backing store entry. Don't worry about managing the memory
64 * pointers, because PhysicalMemory is responsible for that.
65 */
66 BackingStoreEntry(AddrRange range, uint8_t* pmem,
67 bool conf_table_reported, bool in_addr_map, bool kvm_map)
68 : range(range), pmem(pmem), confTableReported(conf_table_reported),
69 inAddrMap(in_addr_map), kvmMap(kvm_map)
70 {}
71
72 /**
73 * The address range covered in the guest.
74 */
75 AddrRange range;
76
77 /**
78 * Pointer to the host memory this range maps to. This memory is the same
79 * size as the range field.
80 */
81 uint8_t* pmem;
82
83 /**
84 * Whether this memory should be reported to the configuration table
85 */
86 bool confTableReported;
87
88 /**
89 * Whether this memory should appear in the global address map
90 */
91 bool inAddrMap;
92
93 /**
94 * Whether KVM should map this memory into the guest address space during
95 * acceleration.
96 */
97 bool kvmMap;
98 };
99
100 /**
101 * The physical memory encapsulates all memories in the system and
102 * provides basic functionality for accessing those memories without
103 * going through the memory system and interconnect.
104 *
105 * The physical memory is also responsible for providing the host
106 * system backingstore used by the memories in the simulated guest
107 * system. When the system is created, the physical memory allocates
108 * the backing store based on the address ranges that are populated in
109 * the system, and does so independent of how those map to actual
110 * memory controllers. Thus, the physical memory completely abstracts
111 * the mapping of the backing store of the host system and the address
112 * mapping in the guest system. This enables us to arbitrarily change
113 * the number of memory controllers, and their address mapping, as
114 * long as the ranges stay the same.
115 */
116 class PhysicalMemory : public Serializable
117 {
118
119 private:
120
121 // Name for debugging
122 std::string _name;
123
124 // Global address map
125 AddrRangeMap<AbstractMemory*, 1> addrMap;
126
127 // All address-mapped memories
128 std::vector<AbstractMemory*> memories;
129
130 // The total memory size
131 uint64_t size;
132
133 // Let the user choose if we reserve swap space when calling mmap
134 const bool mmapUsingNoReserve;
135
136 const std::string sharedBackstore;
137
138 // The physical memory used to provide the memory in the simulated
139 // system
140 std::vector<BackingStoreEntry> backingStore;
141
142 // Prevent copying
143 PhysicalMemory(const PhysicalMemory&);
144
145 // Prevent assignment
146 PhysicalMemory& operator=(const PhysicalMemory&);
147
148 /**
149 * Create the memory region providing the backing store for a
150 * given address range that corresponds to a set of memories in
151 * the simulated system.
152 *
153 * @param range The address range covered
154 * @param memories The memories this range maps to
155 * @param kvm_map Should KVM map this memory for the guest
156 */
157 void createBackingStore(AddrRange range,
158 const std::vector<AbstractMemory*>& _memories,
159 bool conf_table_reported,
160 bool in_addr_map, bool kvm_map);
161
162 public:
163
164 /**
165 * Create a physical memory object, wrapping a number of memories.
166 */
167 PhysicalMemory(const std::string& _name,
168 const std::vector<AbstractMemory*>& _memories,
169 bool mmap_using_noreserve,
170 const std::string& shared_backstore);
171
172 /**
173 * Unmap all the backing store we have used.
174 */
175 ~PhysicalMemory();
176
177 /**
178 * Return the name for debugging and for creation of sections for
179 * checkpointing.
180 */
181 const std::string name() const { return _name; }
182
183 /**
184 * Check if a physical address is within a range of a memory that
185 * is part of the global address map.
186 *
187 * @param addr A physical address
188 * @return Whether the address corresponds to a memory
189 */
190 bool isMemAddr(Addr addr) const;
191
192 /**
193 * Get the memory ranges for all memories that are to be reported
194 * to the configuration table. The ranges are merged before they
195 * are returned such that any interleaved ranges appear as a
196 * single range.
197 *
198 * @return All configuration table memory ranges
199 */
200 AddrRangeList getConfAddrRanges() const;
201
202 /**
203 * Get the total physical memory size.
204 *
205 * @return The sum of all memory sizes
206 */
207 uint64_t totalSize() const { return size; }
208
209 /**
210 * Get the pointers to the backing store for external host
211 * access. Note that memory in the guest should be accessed using
212 * access() or functionalAccess(). This interface is primarily
213 * intended for CPU models using hardware virtualization. Note
214 * that memories that are null are not present, and that the
215 * backing store may also contain memories that are not part of
216 * the OS-visible global address map and thus are allowed to
217 * overlap.
218 *
219 * @return Pointers to the memory backing store
220 */
221 std::vector<BackingStoreEntry> getBackingStore() const
222 { return backingStore; }
223
224 /**
225 * Perform an untimed memory access and update all the state
226 * (e.g. locked addresses) and statistics accordingly. The packet
227 * is turned into a response if required.
228 *
229 * @param pkt Packet performing the access
230 */
231 void access(PacketPtr pkt);
232
233 /**
234 * Perform an untimed memory read or write without changing
235 * anything but the memory itself. No stats are affected by this
236 * access. In addition to normal accesses this also facilitates
237 * print requests.
238 *
239 * @param pkt Packet performing the access
240 */
241 void functionalAccess(PacketPtr pkt);
242
243 /**
244 * Serialize all the memories in the system. This is independent
245 * of the logical memory layout, and the serialization only sees
246 * the contigous backing store, independent of how this maps to
247 * logical memories in the guest system.
248 *
249 * @param os stream to serialize to
250 */
251 void serialize(CheckpointOut &cp) const override;
252
253 /**
254 * Serialize a specific store.
255 *
256 * @param store_id Unique identifier of this backing store
257 * @param range The address range of this backing store
258 * @param pmem The host pointer to this backing store
259 */
260 void serializeStore(CheckpointOut &cp, unsigned int store_id,
261 AddrRange range, uint8_t* pmem) const;
262
263 /**
264 * Unserialize the memories in the system. As with the
265 * serialization, this action is independent of how the address
266 * ranges are mapped to logical memories in the guest system.
267 */
268 void unserialize(CheckpointIn &cp) override;
269
270 /**
271 * Unserialize a specific backing store, identified by a section.
272 */
273 void unserializeStore(CheckpointIn &cp);
274
275 };
276
277 #endif //__MEM_PHYSICAL_HH__