2 * Copyright (c) 2001-2005 The Regents of The University of Michigan
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28 * Authors: Ron Dreslinski
34 #ifndef __PHYSICAL_MEMORY_HH__
35 #define __PHYSICAL_MEMORY_HH__
40 #include "base/range.hh"
41 #include "mem/mem_object.hh"
42 #include "mem/packet.hh"
43 #include "mem/tport.hh"
44 #include "params/PhysicalMemory.hh"
45 #include "sim/eventq.hh"
48 // Functional model for a contiguous block of physical memory. (i.e. RAM)
50 class PhysicalMemory : public MemObject
54 class MemoryPort : public SimpleTimingPort
56 PhysicalMemory *memory;
60 MemoryPort(const std::string &_name, PhysicalMemory *_memory);
64 virtual Tick recvAtomic(PacketPtr pkt);
66 virtual void recvFunctional(PacketPtr pkt);
68 virtual void recvStatusChange(Status status);
70 virtual void getDeviceAddressRanges(AddrRangeList &resp,
73 virtual unsigned deviceBlockSize() const;
80 // prevent copying of a MainMemory object
81 PhysicalMemory(const PhysicalMemory &specmem);
82 const PhysicalMemory &operator=(const PhysicalMemory &specmem);
88 // on alpha, minimum LL/SC granularity is 16 bytes, so lower
89 // bits need to masked off.
90 static const Addr Addr_Mask = 0xf;
92 static Addr mask(Addr paddr) { return (paddr & ~Addr_Mask); }
94 Addr addr; // locked address
95 int contextId; // locking hw context
97 // check for matching execution context
98 bool matchesContext(Request *req)
100 return (contextId == req->contextId());
103 LockedAddr(Request *req)
104 : addr(mask(req->getPaddr())),
105 contextId(req->contextId())
108 // constructor for unserialization use
109 LockedAddr(Addr _addr, int _cid)
110 : addr(_addr), contextId(_cid)
115 std::list<LockedAddr> lockedAddrList;
117 // helper function for checkLockedAddrs(): we really want to
118 // inline a quick check for an empty locked addr list (hopefully
119 // the common case), and do the full list search (if necessary) in
120 // this out-of-line function
121 bool checkLockedAddrList(PacketPtr pkt);
123 // Record the address of a load-locked operation so that we can
124 // clear the execution context's lock flag if a matching store is
126 void trackLoadLocked(PacketPtr pkt);
128 // Compare a store address with any locked addresses so we can
129 // clear the lock flag appropriately. Return value set to 'false'
130 // if store operation should be suppressed (because it was a
131 // conditional store and the address was no longer locked by the
132 // requesting execution context), 'true' otherwise. Note that
133 // this method must be called on *all* stores since even
134 // non-conditional stores must clear any matching lock addresses.
135 bool writeOK(PacketPtr pkt) {
136 Request *req = pkt->req;
137 if (lockedAddrList.empty()) {
138 // no locked addrs: nothing to check, store_conditional fails
139 bool isLLSC = pkt->isLLSC();
141 req->setExtraData(0);
143 return !isLLSC; // only do write if not an sc
145 // iterate over list...
146 return checkLockedAddrList(pkt);
153 std::vector<MemoryPort*> ports;
154 typedef std::vector<MemoryPort*>::iterator PortIterator;
159 uint64_t size() { return _size; }
160 uint64_t start() { return _start; }
163 typedef PhysicalMemoryParams Params;
164 PhysicalMemory(const Params *p);
165 virtual ~PhysicalMemory();
170 return dynamic_cast<const Params *>(_params);
174 unsigned deviceBlockSize() const;
175 void getAddressRanges(AddrRangeList &resp, bool &snoop);
176 virtual Port *getPort(const std::string &if_name, int idx = -1);
178 unsigned int drain(Event *de);
181 Tick doAtomicAccess(PacketPtr pkt);
182 void doFunctionalAccess(PacketPtr pkt);
183 virtual Tick calculateLatency(PacketPtr pkt);
184 void recvStatusChange(Port::Status status);
187 virtual void serialize(std::ostream &os);
188 virtual void unserialize(Checkpoint *cp, const std::string §ion);
192 #endif //__PHYSICAL_MEMORY_HH__