misc: Merged release-staging-v19.0.0.0 into develop
[gem5.git] / src / mem / physical.hh
1 /*
2 * Copyright (c) 2012 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder. You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated
11 * unmodified and in its entirety in all distributions of the software,
12 * modified or unmodified, in source code or in binary form.
13 *
14 * Redistribution and use in source and binary forms, with or without
15 * modification, are permitted provided that the following conditions are
16 * met: redistributions of source code must retain the above copyright
17 * notice, this list of conditions and the following disclaimer;
18 * redistributions in binary form must reproduce the above copyright
19 * notice, this list of conditions and the following disclaimer in the
20 * documentation and/or other materials provided with the distribution;
21 * neither the name of the copyright holders nor the names of its
22 * contributors may be used to endorse or promote products derived from
23 * this software without specific prior written permission.
24 *
25 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
26 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
27 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
28 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
29 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
30 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
31 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
32 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
33 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
34 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
35 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
36 */
37
38 #ifndef __MEM_PHYSICAL_HH__
39 #define __MEM_PHYSICAL_HH__
40
41 #include "base/addr_range_map.hh"
42 #include "mem/packet.hh"
43
44 /**
45 * Forward declaration to avoid header dependencies.
46 */
47 class AbstractMemory;
48
49 /**
50 * A single entry for the backing store.
51 */
52 class BackingStoreEntry
53 {
54 public:
55
56 /**
57 * Create a backing store entry. Don't worry about managing the memory
58 * pointers, because PhysicalMemory is responsible for that.
59 */
60 BackingStoreEntry(AddrRange range, uint8_t* pmem,
61 bool conf_table_reported, bool in_addr_map, bool kvm_map)
62 : range(range), pmem(pmem), confTableReported(conf_table_reported),
63 inAddrMap(in_addr_map), kvmMap(kvm_map)
64 {}
65
66 /**
67 * The address range covered in the guest.
68 */
69 AddrRange range;
70
71 /**
72 * Pointer to the host memory this range maps to. This memory is the same
73 * size as the range field.
74 */
75 uint8_t* pmem;
76
77 /**
78 * Whether this memory should be reported to the configuration table
79 */
80 bool confTableReported;
81
82 /**
83 * Whether this memory should appear in the global address map
84 */
85 bool inAddrMap;
86
87 /**
88 * Whether KVM should map this memory into the guest address space during
89 * acceleration.
90 */
91 bool kvmMap;
92 };
93
94 /**
95 * The physical memory encapsulates all memories in the system and
96 * provides basic functionality for accessing those memories without
97 * going through the memory system and interconnect.
98 *
99 * The physical memory is also responsible for providing the host
100 * system backingstore used by the memories in the simulated guest
101 * system. When the system is created, the physical memory allocates
102 * the backing store based on the address ranges that are populated in
103 * the system, and does so independent of how those map to actual
104 * memory controllers. Thus, the physical memory completely abstracts
105 * the mapping of the backing store of the host system and the address
106 * mapping in the guest system. This enables us to arbitrarily change
107 * the number of memory controllers, and their address mapping, as
108 * long as the ranges stay the same.
109 */
110 class PhysicalMemory : public Serializable
111 {
112
113 private:
114
115 // Name for debugging
116 std::string _name;
117
118 // Global address map
119 AddrRangeMap<AbstractMemory*, 1> addrMap;
120
121 // All address-mapped memories
122 std::vector<AbstractMemory*> memories;
123
124 // The total memory size
125 uint64_t size;
126
127 // Let the user choose if we reserve swap space when calling mmap
128 const bool mmapUsingNoReserve;
129
130 // The physical memory used to provide the memory in the simulated
131 // system
132 std::vector<BackingStoreEntry> backingStore;
133
134 // Prevent copying
135 PhysicalMemory(const PhysicalMemory&);
136
137 // Prevent assignment
138 PhysicalMemory& operator=(const PhysicalMemory&);
139
140 /**
141 * Create the memory region providing the backing store for a
142 * given address range that corresponds to a set of memories in
143 * the simulated system.
144 *
145 * @param range The address range covered
146 * @param memories The memories this range maps to
147 * @param kvm_map Should KVM map this memory for the guest
148 */
149 void createBackingStore(AddrRange range,
150 const std::vector<AbstractMemory*>& _memories,
151 bool conf_table_reported,
152 bool in_addr_map, bool kvm_map);
153
154 public:
155
156 /**
157 * Create a physical memory object, wrapping a number of memories.
158 */
159 PhysicalMemory(const std::string& _name,
160 const std::vector<AbstractMemory*>& _memories,
161 bool mmap_using_noreserve);
162
163 /**
164 * Unmap all the backing store we have used.
165 */
166 ~PhysicalMemory();
167
168 /**
169 * Return the name for debugging and for creation of sections for
170 * checkpointing.
171 */
172 const std::string name() const { return _name; }
173
174 /**
175 * Check if a physical address is within a range of a memory that
176 * is part of the global address map.
177 *
178 * @param addr A physical address
179 * @return Whether the address corresponds to a memory
180 */
181 bool isMemAddr(Addr addr) const;
182
183 /**
184 * Get the memory ranges for all memories that are to be reported
185 * to the configuration table. The ranges are merged before they
186 * are returned such that any interleaved ranges appear as a
187 * single range.
188 *
189 * @return All configuration table memory ranges
190 */
191 AddrRangeList getConfAddrRanges() const;
192
193 /**
194 * Get the total physical memory size.
195 *
196 * @return The sum of all memory sizes
197 */
198 uint64_t totalSize() const { return size; }
199
200 /**
201 * Get the pointers to the backing store for external host
202 * access. Note that memory in the guest should be accessed using
203 * access() or functionalAccess(). This interface is primarily
204 * intended for CPU models using hardware virtualization. Note
205 * that memories that are null are not present, and that the
206 * backing store may also contain memories that are not part of
207 * the OS-visible global address map and thus are allowed to
208 * overlap.
209 *
210 * @return Pointers to the memory backing store
211 */
212 std::vector<BackingStoreEntry> getBackingStore() const
213 { return backingStore; }
214
215 /**
216 * Perform an untimed memory access and update all the state
217 * (e.g. locked addresses) and statistics accordingly. The packet
218 * is turned into a response if required.
219 *
220 * @param pkt Packet performing the access
221 */
222 void access(PacketPtr pkt);
223
224 /**
225 * Perform an untimed memory read or write without changing
226 * anything but the memory itself. No stats are affected by this
227 * access. In addition to normal accesses this also facilitates
228 * print requests.
229 *
230 * @param pkt Packet performing the access
231 */
232 void functionalAccess(PacketPtr pkt);
233
234 /**
235 * Serialize all the memories in the system. This is independent
236 * of the logical memory layout, and the serialization only sees
237 * the contigous backing store, independent of how this maps to
238 * logical memories in the guest system.
239 *
240 * @param os stream to serialize to
241 */
242 void serialize(CheckpointOut &cp) const override;
243
244 /**
245 * Serialize a specific store.
246 *
247 * @param store_id Unique identifier of this backing store
248 * @param range The address range of this backing store
249 * @param pmem The host pointer to this backing store
250 */
251 void serializeStore(CheckpointOut &cp, unsigned int store_id,
252 AddrRange range, uint8_t* pmem) const;
253
254 /**
255 * Unserialize the memories in the system. As with the
256 * serialization, this action is independent of how the address
257 * ranges are mapped to logical memories in the guest system.
258 */
259 void unserialize(CheckpointIn &cp) override;
260
261 /**
262 * Unserialize a specific backing store, identified by a section.
263 */
264 void unserializeStore(CheckpointIn &cp);
265
266 };
267
268 #endif //__MEM_PHYSICAL_HH__