src/mem/protocol/MOESI_AMD_Base-msg.sm

   1 /*
   2  * Copyright (c) 2010-2015 Advanced Micro Devices, Inc.
   3  * All rights reserved.
   4  *
   5  * For use for simulation and test purposes only
   6  *
   7  * Redistribution and use in source and binary forms, with or without
   8  * modification, are permitted provided that the following conditions are met:
   9  *
  10  * 1. Redistributions of source code must retain the above copyright notice,
  11  * this list of conditions and the following disclaimer.
  12  *
  13  * 2. Redistributions in binary form must reproduce the above copyright notice,
  14  * this list of conditions and the following disclaimer in the documentation
  15  * and/or other materials provided with the distribution.
  16  *
  17  * 3. Neither the name of the copyright holder nor the names of its
  18  * contributors may be used to endorse or promote products derived from this
  19  * software without specific prior written permission.
  20  *
  21  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  22  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  23  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  24  * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
  25  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
  26  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
  27  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
  28  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
  29  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  30  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  31  * POSSIBILITY OF SUCH DAMAGE.
  32  *
  33  * Authors: Lisa Hsu
  34  */
  35
  36
  37 enumeration(CoherenceRequestType, desc="Coherence Request Types") {
  38   // CPU Request Types ONLY
  39   RdBlk,        desc="Read Blk";
  40   RdBlkM,       desc="Read Blk Modified";
  41   RdBlkS,       desc="Read Blk Shared";
  42   CtoD,         desc="Change To Dirty";
  43   VicClean,     desc="L2 clean eviction";
  44   VicDirty,     desc="L2 dirty eviction";
  45   Atomic,       desc="Upper level atomic";
  46   AtomicWriteBack, desc="Upper level atomic";
  47   WriteThrough, desc="Ordered WriteThrough w/Data";
  48   WriteThroughFifo, desc="WriteThrough with no data";
  49   WriteThroughDummy, desc="WriteThrough with no data for atomic operation";
  50   WriteFlush,   desc="Release Flush";
  51
  52   WrCancel,     desc="want to cancel WB to Memory"; // should this be here?
  53
  54   WBApproval,   desc="WB Approval";
  55
  56   // Messages between Dir and R-Dir
  57   ForceInv,     desc="Send invalide to the block";
  58   ForceDowngrade, desc="Send downgrade to the block";
  59   Unblock,      desc="Used to let the dir know a message has been sunk";
  60
  61   // Messages between R-Dir and R-Buffer
  62   PrivateNotify, desc="Let region buffer know it has private access";
  63   SharedNotify,  desc="Let region buffer know it has shared access";
  64   WbNotify,      desc="Let region buffer know it saw its wb request";
  65   Downgrade,     desc="Force the region buffer to downgrade to shared";
  66   // Response to R-Dir (probably should be on a different network, but
  67   // I need it to be ordered with respect to requests)
  68   InvAck,       desc="Let the R-Dir know when the inv has occured";
  69
  70   PrivateRequest, desc="R-buf wants the region in private";
  71   UpgradeRequest, desc="R-buf wants the region in private";
  72   SharedRequest,  desc="R-buf wants the region in shared (could respond with private)";
  73   CleanWbRequest, desc="R-buf wants to deallocate clean region";
  74
  75   NA,             desc="So we don't get segfaults";
  76 }
  77
  78 enumeration(ProbeRequestType, desc="Probe Request Types") {
  79   PrbDowngrade,    desc="Probe for Status";  // EtoS, MtoO, StoS
  80   PrbInv,       desc="Probe to Invalidate";
  81
  82   // For regions
  83   PrbRepl,      desc="Force the cache to do a replacement";
  84   PrbRegDowngrade, desc="Probe for Status";  // EtoS, MtoO, StoS
  85   PrbAtomic,    desc="Forwarded Atomic Operation";
  86 }
  87
  88
  89 enumeration(CoherenceResponseType, desc="Coherence Response Types") {
  90   NBSysResp,       desc="Northbridge response to CPU Rd request";
  91   NBSysWBAck,      desc="Northbridge response ok to WB";
  92   TDSysResp,       desc="TCCdirectory response to CPU Rd request";
  93   TDSysWBAck,      desc="TCCdirectory response ok to WB";
  94   TDSysWBNack,     desc="TCCdirectory response ok to drop";
  95   CPUPrbResp,      desc="CPU Probe Response";
  96   CPUData,         desc="CPU Data";
  97   StaleNotif,      desc="Notification of Stale WBAck, No data to writeback";
  98   CPUCancelWB,     desc="want to cancel WB to Memory";
  99   MemData,         desc="Data from Memory";
 100
 101   // for regions
 102   PrivateAck,      desc="Ack that r-buf received private notify";
 103   RegionWbAck,     desc="Writeback Ack that r-buf completed deallocation";
 104   DirReadyAck,     desc="Directory (mem ctrl)<->region dir handshake";
 105 }
 106
 107 enumeration(CoherenceState, default="CoherenceState_NA", desc="Coherence State") {
 108   Modified,             desc="Modified";
 109   Owned,                desc="Owned state";
 110   Exclusive,            desc="Exclusive";
 111   Shared,               desc="Shared";
 112   NA,                   desc="NA";
 113 }
 114
 115 structure(CPURequestMsg, desc="...", interface="Message") {
 116   Addr addr,             desc="Physical address for this request";
 117   Addr DemandAddress,       desc="Physical block address for this request";
 118   CoherenceRequestType Type,   desc="Type of request";
 119   DataBlock DataBlk,           desc="data for the cache line";  // only for WB
 120   bool Dirty,                   desc="whether WB data is dirty";  // only for WB
 121   MachineID Requestor,            desc="Node who initiated the request";
 122   NetDest Destination,             desc="Multicast destination mask";
 123   bool Shared,                  desc="For CPU_WrVicBlk, vic is O not M.  For CPU_ClVicBlk, vic is S";
 124   MessageSizeType MessageSize, desc="size category of the message";
 125   Cycles InitialRequestTime, desc="time the initial requests was sent from the L1Cache";
 126   Cycles ForwardRequestTime, desc="time the dir forwarded the request";
 127   Cycles ProbeRequestStartTime, desc="the time the dir started the probe request";
 128   bool DemandRequest, default="false", desc="For profiling purposes";
 129
 130   NetDest Sharers,              desc="Caches that may have a valid copy of the data";
 131   bool ForceShared,             desc="R-dir knows it is shared, pass on so it sends an S copy, not E";
 132   bool Private, default="false", desc="Requestor already has private permissions, no need for dir check";
 133   bool CtoDSinked, default="false", desc="This is true if the CtoD previously sent must have been sunk";
 134
 135   bool NoAckNeeded, default="false", desc="True if region buffer doesn't need to ack";
 136   int Acks, default="0", desc="Acks that the dir (mem ctrl) should expect to receive";
 137   CoherenceRequestType OriginalType, default="CoherenceRequestType_NA",  desc="Type of request from core fwded through region buffer";
 138   WriteMask writeMask, desc="Write Through Data";
 139   MachineID WTRequestor,            desc="Node who initiated the write through";
 140   HSAScope scope,                      default="HSAScope_SYSTEM", desc="Request Scope";
 141   int wfid,                         default="0", desc="wavefront id";
 142   bool NoWriteConflict,             default="true", desc="write collided with CAB entry";
 143   int ProgramCounter,               desc="PC that accesses to this block";
 144
 145   bool functionalRead(Packet *pkt) {
 146     // Only PUTX messages contains the data block
 147     if (Type == CoherenceRequestType:VicDirty) {
 148         return testAndRead(addr, DataBlk, pkt);
 149     }
 150
 151     return false;
 152   }
 153
 154   bool functionalWrite(Packet *pkt) {
 155     // No check on message type required since the protocol should
 156     // read data from those messages that contain the block
 157     return testAndWrite(addr, DataBlk, pkt);
 158   }
 159 }
 160
 161 structure(NBProbeRequestMsg, desc="...", interface="Message") {
 162   Addr addr,              desc="Physical address for this request";
 163   ProbeRequestType Type,             desc="NB_PrbNxtState signal";
 164   bool ReturnData,              desc="Indicates CPU should return data";
 165   NetDest Destination,             desc="Node to whom the data is sent";
 166   MessageSizeType MessageSize, desc="size category of the message";
 167   bool DemandRequest, default="false", desc="demand request, requesting 3-hop transfer";
 168   Addr DemandAddress,        desc="Demand block address for a region request";
 169   MachineID Requestor,          desc="Requestor id for 3-hop requests";
 170   bool NoAckNeeded, default="false", desc="For short circuting acks";
 171   int ProgramCounter,           desc="PC that accesses to this block";
 172
 173   bool functionalRead(Packet *pkt) {
 174     return false;
 175   }
 176
 177   bool functionalWrite(Packet *pkt) {
 178     // No check on message type required since the protocol should
 179     // read data from those messages that contain the block
 180     return false;
 181   }
 182
 183 }
 184
 185 structure(TDProbeRequestMsg, desc="...", interface="Message") {
 186   Addr addr,              desc="Physical address for this request";
 187   ProbeRequestType Type,  desc="TD_PrbNxtState signal";
 188   bool ReturnData,        desc="Indicates CPU should return data";
 189   bool localCtoD,         desc="Indicates CtoD is within the GPU hierarchy (aka TCC subtree)";
 190   NetDest Destination,    desc="Node to whom the data is sent";
 191   MessageSizeType MessageSize, desc="size category of the message";
 192   int Phase,              desc="Synchronization Phase";
 193   int wfid,               desc="wavefront id for Release";
 194   MachineID Requestor,    desc="Node who initiated the request";
 195
 196   bool functionalRead(Packet *pkt) {
 197     return false;
 198   }
 199
 200   bool functionalWrite(Packet *pkt) {
 201     // No check on message type required since the protocol should
 202     // read data from those messages that contain the block
 203     return false;
 204   }
 205 }
 206
 207 // Response Messages seemed to be easily munged into one type
 208 structure(ResponseMsg, desc="...", interface="Message") {
 209   Addr addr,             desc="Physical address for this request";
 210   CoherenceResponseType Type,  desc="NB Sys Resp or CPU Response to Probe";
 211   MachineID Sender,               desc="Node who sent the data";
 212   NetDest Destination,             desc="Node to whom the data is sent";
 213   // Begin Used Only By CPU Response
 214   DataBlock DataBlk,           desc="data for the cache line";
 215   bool Hit,                    desc="probe hit valid line";
 216   bool Shared,                 desc="True if S, or if NB Probe ReturnData==1 && O";
 217   bool Dirty,                  desc="Is the data dirty (different than memory)?";
 218   bool Ntsl,                   desc="indicates probed lin will be invalid after probe";
 219   bool UntransferredOwner,     desc="pending confirmation of ownership change";
 220   // End Used Only By CPU Response
 221
 222   // Begin NB Response Only
 223   CoherenceState State, default=CoherenceState_NA,        desc="What returned data from NB should be in";
 224   bool CtoD,                    desc="was the originator a CtoD?";
 225   // End NB Response Only
 226
 227   // Normally if a block gets hit by a probe while waiting to be written back,
 228   // you flip the NbReqShared signal (part of the CPURequest signal group).
 229   // But since this is in packets and I don't want to send a separate packet,
 230   // let's just send this signal back with the data instead
 231   bool NbReqShared,             desc="modification of Shared field from initial request, e.g. hit by shared probe";
 232
 233   MessageSizeType MessageSize, desc="size category of the message";
 234   Cycles InitialRequestTime, desc="time the initial requests was sent from the L1Cache";
 235   Cycles ForwardRequestTime, desc="time the dir forwarded the request";
 236   Cycles ProbeRequestStartTime, desc="the time the dir started the probe request";
 237   bool DemandRequest, default="false", desc="For profiling purposes";
 238
 239   bool L3Hit, default="false", desc="Did memory or L3 supply the data?";
 240   MachineID OriginalResponder, desc="Mach which wrote the data to the L3";
 241   MachineID WTRequestor,             desc="Node who started the writethrough";
 242
 243   bool NotCached, default="false", desc="True when the Region buffer has already evicted the line";
 244
 245   bool NoAckNeeded, default="false", desc="For short circuting acks";
 246   bool isValid, default="false", desc="Is acked block valid";
 247   int wfid, default="0", desc="wavefront id";
 248   int Phase,                   desc="Synchronization Phase";
 249
 250   int ProgramCounter,       desc="PC that issues this request";
 251   bool mispred,              desc="tell TCP if the block should not be bypassed";
 252
 253
 254   bool functionalRead(Packet *pkt) {
 255     // Only PUTX messages contains the data block
 256     if (Type == CoherenceResponseType:CPUData ||
 257         Type == CoherenceResponseType:MemData) {
 258         return testAndRead(addr, DataBlk, pkt);
 259     }
 260
 261     return false;
 262   }
 263
 264   bool functionalWrite(Packet *pkt) {
 265     // No check on message type required since the protocol should
 266     // read data from those messages that contain the block
 267     return testAndWrite(addr, DataBlk, pkt);
 268   }
 269 }
 270
 271 structure(UnblockMsg, desc="...", interface="Message") {
 272   Addr addr,              desc="Physical address for this request";
 273   NetDest Destination,          desc="Destination (always directory)";
 274   MessageSizeType MessageSize, desc="size category of the message";
 275   MachineID Sender,               desc="Node who sent the data";
 276   bool currentOwner, default="false", desc="Is the sender the current owner";
 277   bool DoneAck, default="false", desc="Is this a done ack?";
 278   bool Dirty, default="false", desc="Was block dirty when evicted";
 279   bool wasValid, default="false", desc="Was block valid when evicted";
 280   bool valid, default="false", desc="Is block valid";
 281   bool validToInvalid, default="false", desc="Was block valid when evicted";
 282
 283   bool functionalRead(Packet *pkt) {
 284     return false;
 285   }
 286
 287   bool functionalWrite(Packet *pkt) {
 288     // No check on message type required since the protocol should
 289     // read data from those messages that contain the block
 290     return false;
 291   }
 292 }
 293
 294 enumeration(TriggerType, desc="Trigger Type") {
 295   L2_to_L1,             desc="L2 to L1 fill";
 296   AcksComplete,         desc="NB received all needed Acks";
 297
 298   // For regions
 299   InvNext,              desc="Invalidate the next block";
 300   PrivateAck,           desc="Loopback ack for machines with no Region Buffer";
 301   AllOutstanding,       desc="All outstanding requests have finished";
 302   L3Hit,                desc="L3 hit in dir";
 303
 304   // For region directory once the directory is blocked
 305   InvRegion,            desc="Invalidate region";
 306   DowngradeRegion,      desc="downgrade region";
 307   //For writethrough
 308   UnblockWriteThrough,  desc="unblock";
 309   WriteData,            desc="Write to full cacheblock data";
 310   WriteDone,            desc="Sequencer says that write is done";
 311   AtomicDone,           desc="Atomic is done";
 312 }
 313
 314 enumeration(CacheId, desc="Which Cache in the Core") {
 315   L1I,          desc="L1 I-cache";
 316   L1D0,         desc="L1 D-cache cluster 0";
 317   L1D1,         desc="L1 D-cache cluster 1";
 318   NA,           desc="Default";
 319 }
 320
 321 structure(TriggerMsg, desc="...", interface="Message") {
 322   Addr addr,              desc="Address";
 323   TriggerType Type,             desc="Type of trigger";
 324   CacheId Dest,         default="CacheId_NA", desc="Cache to invalidate";
 325   int ProgramCounter,           desc="PC that accesses to this block";
 326
 327   bool functionalRead(Packet *pkt) {
 328     return false;
 329   }
 330
 331   bool functionalWrite(Packet *pkt) {
 332     // No check on message type required since the protocol should
 333     // read data from those messages that contain the block
 334     return false;
 335   }
 336
 337 }
 338
 339 enumeration(FifoType, desc="Fifo Type") {
 340   WriteDummy,          desc="Dummy Write for atomic operation";
 341   WriteThrough,        desc="simple writethrough request";
 342   WriteFlush,          desc="synchronization message";
 343 }
 344
 345 structure(FifoMsg, desc="...", interface="Message") {
 346   Addr addr,          desc="Address";
 347   FifoType Type,            desc="WriteThrough/WriteFlush";
 348   int wfid,                 default="0",desc="wavefront id";
 349   MachineID Requestor,      desc="Flush Requestor";
 350   MachineID oRequestor,      desc="original Flush Requestor";
 351
 352   bool functionalRead(Packet *pkt) {
 353     return false;
 354   }
 355
 356   bool functionalWrite(Packet *pkt) {
 357     // No check on message type required since the protocol should
 358     // read data from those messages that contain the block
 359     return false;
 360   }
 361
 362 }