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mem-cache: Create an address aware TempCacheBlk
[gem5.git] / src / mem / protocol / MOESI_AMD_Base.slicc
1 protocol "MOESI_AMD_Base";
2 include "RubySlicc_interfaces.slicc";
3 include "MOESI_AMD_Base-msg.sm";
4 include "MOESI_AMD_Base-CorePair.sm";
5 include "MOESI_AMD_Base-L3cache.sm";
6 include "MOESI_AMD_Base-dir.sm";