This patch removes the WARN_* and ERROR_* from src/mem/ruby/common/Debug.hh file...
[gem5.git] / src / mem / protocol / MOESI_CMP_token-L1cache.sm
1
2 /*
3 * Copyright (c) 1999-2005 Mark D. Hill and David A. Wood
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are
8 * met: redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer;
10 * redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution;
13 * neither the name of the copyright holders nor the names of its
14 * contributors may be used to endorse or promote products derived from
15 * this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
18 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
19 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
20 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
21 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
22 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
23 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
24 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
25 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
26 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
27 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28 */
29
30 /*
31 * $Id: MOESI_CMP_token-L1cache.sm 1.22 05/01/19 15:55:39-06:00 beckmann@s0-28.cs.wisc.edu $
32 *
33 */
34
35 machine(L1Cache, "Token protocol")
36 : Sequencer * sequencer,
37 CacheMemory * L1IcacheMemory,
38 CacheMemory * L1DcacheMemory,
39 int l2_select_num_bits,
40 int N_tokens,
41 int l1_request_latency = 2,
42 int l1_response_latency = 2,
43 int retry_threshold = 1,
44 int fixed_timeout_latency = 100,
45 bool dynamic_timeout_enabled = true,
46 bool no_mig_atomic = true
47 {
48
49 // From this node's L1 cache TO the network
50
51 // a local L1 -> this L2 bank
52 MessageBuffer responseFromL1Cache, network="To", virtual_network="4", ordered="false";
53 MessageBuffer persistentFromL1Cache, network="To", virtual_network="3", ordered="true";
54 // a local L1 -> this L2 bank, currently ordered with directory forwarded requests
55 MessageBuffer requestFromL1Cache, network="To", virtual_network="1", ordered="false";
56
57
58 // To this node's L1 cache FROM the network
59 // a L2 bank -> this L1
60 MessageBuffer responseToL1Cache, network="From", virtual_network="4", ordered="false";
61 MessageBuffer persistentToL1Cache, network="From", virtual_network="3", ordered="true";
62 // a L2 bank -> this L1
63 MessageBuffer requestToL1Cache, network="From", virtual_network="1", ordered="false";
64
65 // STATES
66 enumeration(State, desc="Cache states", default="L1Cache_State_I") {
67 // Base states
68 NP, "NP", desc="Not Present";
69 I, "I", desc="Idle";
70 S, "S", desc="Shared";
71 O, "O", desc="Owned";
72 M, "M", desc="Modified (dirty)";
73 MM, "MM", desc="Modified (dirty and locally modified)";
74 M_W, "M^W", desc="Modified (dirty), waiting";
75 MM_W, "MM^W", desc="Modified (dirty and locally modified), waiting";
76
77 // Transient States
78 IM, "IM", desc="Issued GetX";
79 SM, "SM", desc="Issued GetX, we still have an old copy of the line";
80 OM, "OM", desc="Issued GetX, received data";
81 IS, "IS", desc="Issued GetS";
82
83 // Locked states
84 I_L, "I^L", desc="Invalid, Locked";
85 S_L, "S^L", desc="Shared, Locked";
86 IM_L, "IM^L", desc="Invalid, Locked, trying to go to Modified";
87 SM_L, "SM^L", desc="Shared, Locked, trying to go to Modified";
88 IS_L, "IS^L", desc="Invalid, Locked, trying to go to Shared";
89 }
90
91 // EVENTS
92 enumeration(Event, desc="Cache events") {
93 Load, desc="Load request from the processor";
94 Ifetch, desc="I-fetch request from the processor";
95 Store, desc="Store request from the processor";
96 Atomic, desc="Atomic request from the processor";
97 L1_Replacement, desc="L1 Replacement";
98
99 // Responses
100 Data_Shared, desc="Received a data message, we are now a sharer";
101 Data_Owner, desc="Received a data message, we are now the owner";
102 Data_All_Tokens, desc="Received a data message, we are now the owner, we now have all the tokens";
103 Ack, desc="Received an ack message";
104 Ack_All_Tokens, desc="Received an ack message, we now have all the tokens";
105
106 // Requests
107 Transient_GETX, desc="A GetX from another processor";
108 Transient_Local_GETX, desc="A GetX from another processor";
109 Transient_GETS, desc="A GetS from another processor";
110 Transient_Local_GETS, desc="A GetS from another processor";
111 Transient_GETS_Last_Token, desc="A GetS from another processor";
112 Transient_Local_GETS_Last_Token, desc="A GetS from another processor";
113
114 // Lock/Unlock for distributed
115 Persistent_GETX, desc="Another processor has priority to read/write";
116 Persistent_GETS, desc="Another processor has priority to read";
117 Persistent_GETS_Last_Token, desc="Another processor has priority to read, no more tokens";
118 Own_Lock_or_Unlock, desc="This processor now has priority";
119
120 // Triggers
121 Request_Timeout, desc="Timeout";
122 Use_TimeoutStarverX, desc="Timeout";
123 Use_TimeoutStarverS, desc="Timeout";
124 Use_TimeoutNoStarvers, desc="Timeout";
125 Use_TimeoutNoStarvers_NoMig, desc="Timeout Don't Migrate";
126 }
127
128 // TYPES
129
130 // CacheEntry
131 structure(Entry, desc="...", interface="AbstractCacheEntry") {
132 State CacheState, desc="cache state";
133 bool Dirty, desc="Is the data dirty (different than memory)?";
134 int Tokens, desc="The number of tokens we're holding for the line";
135 DataBlock DataBlk, desc="data for the block";
136 }
137
138
139 // TBE fields
140 structure(TBE, desc="...") {
141 Address Address, desc="Physical address for this TBE";
142 State TBEState, desc="Transient state";
143 int IssueCount, default="0", desc="The number of times we've issued a request for this line.";
144 Address PC, desc="Program counter of request";
145
146 bool WentPersistent, default="false", desc="Request went persistent";
147 bool ExternalResponse, default="false", desc="Response came from an external controller";
148 bool IsAtomic, default="false", desc="Request was an atomic request";
149
150 AccessType AccessType, desc="Type of request (used for profiling)";
151 Time IssueTime, desc="Time the request was issued";
152 AccessModeType AccessMode, desc="user/supervisor access type";
153 PrefetchBit Prefetch, desc="Is this a prefetch request";
154 }
155
156 external_type(TBETable) {
157 TBE lookup(Address);
158 void allocate(Address);
159 void deallocate(Address);
160 bool isPresent(Address);
161 }
162
163 external_type(PersistentTable) {
164 void persistentRequestLock(Address, MachineID, AccessType);
165 void persistentRequestUnlock(Address, MachineID);
166 bool okToIssueStarving(Address, MachineID);
167 MachineID findSmallest(Address);
168 AccessType typeOfSmallest(Address);
169 void markEntries(Address);
170 bool isLocked(Address);
171 int countStarvingForAddress(Address);
172 int countReadStarvingForAddress(Address);
173 }
174
175 TBETable L1_TBEs, template_hack="<L1Cache_TBE>";
176
177 MessageBuffer mandatoryQueue, ordered="false", abstract_chip_ptr="true";
178
179 bool starving, default="false";
180 int l2_select_low_bit, default="RubySystem::getBlockSizeBits()";
181
182 PersistentTable persistentTable;
183 TimerTable useTimerTable;
184 TimerTable reissueTimerTable;
185
186 int outstandingRequests, default="0";
187 int outstandingPersistentRequests, default="0";
188
189 int averageLatencyHysteresis, default="(8)"; // Constant that provides hysteresis for calculated the estimated average
190 int averageLatencyCounter, default="(500 << (*m_L1Cache_averageLatencyHysteresis_ptr))";
191
192 int averageLatencyEstimate() {
193 DPRINTF(RubySlicc, "%d\n",
194 (averageLatencyCounter >> averageLatencyHysteresis));
195 //profile_average_latency_estimate( (averageLatencyCounter >> averageLatencyHysteresis) );
196 return averageLatencyCounter >> averageLatencyHysteresis;
197 }
198
199 void updateAverageLatencyEstimate(int latency) {
200 DPRINTF(RubySlicc, "%d\n", latency);
201 assert(latency >= 0);
202
203 // By subtracting the current average and then adding the most
204 // recent sample, we calculate an estimate of the recent average.
205 // If we simply used a running sum and divided by the total number
206 // of entries, the estimate of the average would adapt very slowly
207 // after the execution has run for a long time.
208 // averageLatencyCounter := averageLatencyCounter - averageLatencyEstimate() + latency;
209
210 averageLatencyCounter := averageLatencyCounter - averageLatencyEstimate() + latency;
211 }
212
213
214 Entry getCacheEntry(Address addr), return_by_ref="yes" {
215 if (L1DcacheMemory.isTagPresent(addr)) {
216 assert(L1IcacheMemory.isTagPresent(addr) == false);
217 return static_cast(Entry, L1DcacheMemory[addr]);
218 } else {
219 return static_cast(Entry, L1IcacheMemory[addr]);
220 }
221 }
222
223 int getTokens(Address addr) {
224 if (L1DcacheMemory.isTagPresent(addr)) {
225 assert(L1IcacheMemory.isTagPresent(addr) == false);
226 return static_cast(Entry, L1DcacheMemory[addr]).Tokens;
227 } else if (L1IcacheMemory.isTagPresent(addr)) {
228 return static_cast(Entry, L1IcacheMemory[addr]).Tokens;
229 } else {
230 return 0;
231 }
232 }
233
234 void changePermission(Address addr, AccessPermission permission) {
235 if (L1DcacheMemory.isTagPresent(addr)) {
236 return L1DcacheMemory.changePermission(addr, permission);
237 } else {
238 return L1IcacheMemory.changePermission(addr, permission);
239 }
240 }
241
242 bool isCacheTagPresent(Address addr) {
243 return (L1DcacheMemory.isTagPresent(addr) || L1IcacheMemory.isTagPresent(addr));
244 }
245
246 State getState(Address addr) {
247 assert((L1DcacheMemory.isTagPresent(addr) && L1IcacheMemory.isTagPresent(addr)) == false);
248
249 if (L1_TBEs.isPresent(addr)) {
250 return L1_TBEs[addr].TBEState;
251 } else if (isCacheTagPresent(addr)) {
252 return getCacheEntry(addr).CacheState;
253 } else {
254 if ((persistentTable.isLocked(addr) == true) && (persistentTable.findSmallest(addr) != machineID)) {
255 // Not in cache, in persistent table, but this processor isn't highest priority
256 return State:I_L;
257 } else {
258 return State:NP;
259 }
260 }
261 }
262
263 void setState(Address addr, State state) {
264 assert((L1DcacheMemory.isTagPresent(addr) && L1IcacheMemory.isTagPresent(addr)) == false);
265
266 if (L1_TBEs.isPresent(addr)) {
267 assert(state != State:I);
268 assert(state != State:S);
269 assert(state != State:O);
270 assert(state != State:MM);
271 assert(state != State:M);
272 L1_TBEs[addr].TBEState := state;
273 }
274
275 if (isCacheTagPresent(addr)) {
276 // Make sure the token count is in range
277 assert(getCacheEntry(addr).Tokens >= 0);
278 assert(getCacheEntry(addr).Tokens <= max_tokens());
279 assert(getCacheEntry(addr).Tokens != (max_tokens() / 2));
280
281 if ((state == State:I_L) ||
282 (state == State:IM_L) ||
283 (state == State:IS_L)) {
284 // Make sure we have no tokens in the "Invalid, locked" states
285 if (isCacheTagPresent(addr)) {
286 assert(getCacheEntry(addr).Tokens == 0);
287 }
288
289 // Make sure the line is locked
290 // assert(persistentTable.isLocked(addr));
291
292 // But we shouldn't have highest priority for it
293 // assert(persistentTable.findSmallest(addr) != id);
294
295 } else if ((state == State:S_L) ||
296 (state == State:SM_L)) {
297 assert(getCacheEntry(addr).Tokens >= 1);
298 assert(getCacheEntry(addr).Tokens < (max_tokens() / 2));
299
300 // Make sure the line is locked...
301 // assert(persistentTable.isLocked(addr));
302
303 // ...But we shouldn't have highest priority for it...
304 // assert(persistentTable.findSmallest(addr) != id);
305
306 // ...And it must be a GETS request
307 // assert(persistentTable.typeOfSmallest(addr) == AccessType:Read);
308
309 } else {
310
311 // If there is an entry in the persistent table of this block,
312 // this processor needs to have an entry in the table for this
313 // block, and that entry better be the smallest (highest
314 // priority). Otherwise, the state should have been one of
315 // locked states
316
317 //if (persistentTable.isLocked(addr)) {
318 // assert(persistentTable.findSmallest(addr) == id);
319 //}
320 }
321
322 // in M and E you have all the tokens
323 if (state == State:MM || state == State:M || state == State:MM_W || state == State:M_W) {
324 assert(getCacheEntry(addr).Tokens == max_tokens());
325 }
326
327 // in NP you have no tokens
328 if (state == State:NP) {
329 assert(getCacheEntry(addr).Tokens == 0);
330 }
331
332 // You have at least one token in S-like states
333 if (state == State:S || state == State:SM) {
334 assert(getCacheEntry(addr).Tokens > 0);
335 }
336
337 // You have at least half the token in O-like states
338 if (state == State:O && state == State:OM) {
339 assert(getCacheEntry(addr).Tokens > (max_tokens() / 2));
340 }
341
342 getCacheEntry(addr).CacheState := state;
343
344 // Set permission
345 if (state == State:MM ||
346 state == State:MM_W) {
347 changePermission(addr, AccessPermission:Read_Write);
348 } else if ((state == State:S) ||
349 (state == State:O) ||
350 (state == State:M) ||
351 (state == State:M_W) ||
352 (state == State:SM) ||
353 (state == State:S_L) ||
354 (state == State:SM_L) ||
355 (state == State:OM)) {
356 changePermission(addr, AccessPermission:Read_Only);
357 } else {
358 changePermission(addr, AccessPermission:Invalid);
359 }
360 }
361 }
362
363 Event mandatory_request_type_to_event(CacheRequestType type) {
364 if (type == CacheRequestType:LD) {
365 return Event:Load;
366 } else if (type == CacheRequestType:IFETCH) {
367 return Event:Ifetch;
368 } else if (type == CacheRequestType:ST) {
369 return Event:Store;
370 } else if (type == CacheRequestType:ATOMIC) {
371 if (no_mig_atomic) {
372 return Event:Atomic;
373 } else {
374 return Event:Store;
375 }
376 } else {
377 error("Invalid CacheRequestType");
378 }
379 }
380
381 AccessType cache_request_type_to_access_type(CacheRequestType type) {
382 if ((type == CacheRequestType:LD) || (type == CacheRequestType:IFETCH)) {
383 return AccessType:Read;
384 } else if ((type == CacheRequestType:ST) || (type == CacheRequestType:ATOMIC)) {
385 return AccessType:Write;
386 } else {
387 error("Invalid CacheRequestType");
388 }
389 }
390
391 GenericMachineType getNondirectHitMachType(Address addr, MachineID sender) {
392 if (machineIDToMachineType(sender) == MachineType:L1Cache) {
393 //
394 // NOTE direct local hits should not call this
395 //
396 return GenericMachineType:L1Cache_wCC;
397 } else if (machineIDToMachineType(sender) == MachineType:L2Cache) {
398
399 if (sender == (mapAddressToRange(addr,
400 MachineType:L2Cache,
401 l2_select_low_bit,
402 l2_select_num_bits))) {
403
404 return GenericMachineType:L2Cache;
405 } else {
406 return GenericMachineType:L2Cache_wCC;
407 }
408 } else {
409 return ConvertMachToGenericMach(machineIDToMachineType(sender));
410 }
411 }
412
413 bool okToIssueStarving(Address addr, MachineID machinID) {
414 return persistentTable.okToIssueStarving(addr, machineID);
415 }
416
417 void markPersistentEntries(Address addr) {
418 persistentTable.markEntries(addr);
419 }
420
421 // ** OUT_PORTS **
422 out_port(persistentNetwork_out, PersistentMsg, persistentFromL1Cache);
423 out_port(requestNetwork_out, RequestMsg, requestFromL1Cache);
424 out_port(responseNetwork_out, ResponseMsg, responseFromL1Cache);
425 out_port(requestRecycle_out, RequestMsg, requestToL1Cache);
426
427 // ** IN_PORTS **
428
429 // Use Timer
430 in_port(useTimerTable_in, Address, useTimerTable) {
431 if (useTimerTable_in.isReady()) {
432 if (persistentTable.isLocked(useTimerTable.readyAddress()) && (persistentTable.findSmallest(useTimerTable.readyAddress()) != machineID)) {
433 if (persistentTable.typeOfSmallest(useTimerTable.readyAddress()) == AccessType:Write) {
434 trigger(Event:Use_TimeoutStarverX, useTimerTable.readyAddress());
435 } else {
436 trigger(Event:Use_TimeoutStarverS, useTimerTable.readyAddress());
437 }
438 } else {
439 assert(L1_TBEs.isPresent(useTimerTable.readyAddress()));
440 if (no_mig_atomic && L1_TBEs[useTimerTable.readyAddress()].IsAtomic) {
441 trigger(Event:Use_TimeoutNoStarvers_NoMig, useTimerTable.readyAddress());
442 } else {
443 trigger(Event:Use_TimeoutNoStarvers, useTimerTable.readyAddress());
444 }
445 }
446 }
447 }
448
449 // Reissue Timer
450 in_port(reissueTimerTable_in, Address, reissueTimerTable) {
451 if (reissueTimerTable_in.isReady()) {
452 trigger(Event:Request_Timeout, reissueTimerTable.readyAddress());
453 }
454 }
455
456
457
458 // Persistent Network
459 in_port(persistentNetwork_in, PersistentMsg, persistentToL1Cache) {
460 if (persistentNetwork_in.isReady()) {
461 peek(persistentNetwork_in, PersistentMsg, block_on="Address") {
462 assert(in_msg.Destination.isElement(machineID));
463
464 // Apply the lockdown or unlockdown message to the table
465 if (in_msg.Type == PersistentRequestType:GETX_PERSISTENT) {
466 persistentTable.persistentRequestLock(in_msg.Address, in_msg.Requestor, AccessType:Write);
467 } else if (in_msg.Type == PersistentRequestType:GETS_PERSISTENT) {
468 persistentTable.persistentRequestLock(in_msg.Address, in_msg.Requestor, AccessType:Read);
469 } else if (in_msg.Type == PersistentRequestType:DEACTIVATE_PERSISTENT) {
470 persistentTable.persistentRequestUnlock(in_msg.Address, in_msg.Requestor);
471 } else {
472 error("Unexpected message");
473 }
474
475 // React to the message based on the current state of the table
476 if (persistentTable.isLocked(in_msg.Address)) {
477 if (persistentTable.findSmallest(in_msg.Address) == machineID) {
478 // Our Own Lock - this processor is highest priority
479 trigger(Event:Own_Lock_or_Unlock, in_msg.Address);
480 } else {
481 if (persistentTable.typeOfSmallest(in_msg.Address) == AccessType:Read) {
482 if (getTokens(in_msg.Address) == 1 ||
483 getTokens(in_msg.Address) == (max_tokens() / 2) + 1) {
484 trigger(Event:Persistent_GETS_Last_Token, in_msg.Address);
485 } else {
486 trigger(Event:Persistent_GETS, in_msg.Address);
487 }
488 } else {
489 trigger(Event:Persistent_GETX, in_msg.Address);
490 }
491 }
492 } else {
493 // Unlock case - no entries in the table
494 trigger(Event:Own_Lock_or_Unlock, in_msg.Address);
495 }
496 }
497 }
498 }
499
500
501 // Request Network
502 in_port(requestNetwork_in, RequestMsg, requestToL1Cache) {
503 if (requestNetwork_in.isReady()) {
504 peek(requestNetwork_in, RequestMsg, block_on="Address") {
505 assert(in_msg.Destination.isElement(machineID));
506 if (in_msg.Type == CoherenceRequestType:GETX) {
507 if (in_msg.isLocal) {
508 trigger(Event:Transient_Local_GETX, in_msg.Address);
509 }
510 else {
511 trigger(Event:Transient_GETX, in_msg.Address);
512 }
513 } else if (in_msg.Type == CoherenceRequestType:GETS) {
514 if (getTokens(in_msg.Address) == 1 ||
515 getTokens(in_msg.Address) == (max_tokens() / 2) + 1) {
516 if (in_msg.isLocal) {
517 trigger(Event:Transient_Local_GETS_Last_Token, in_msg.Address);
518 }
519 else {
520 trigger(Event:Transient_GETS_Last_Token, in_msg.Address);
521 }
522 }
523 else {
524 if (in_msg.isLocal) {
525 trigger(Event:Transient_Local_GETS, in_msg.Address);
526 }
527 else {
528 trigger(Event:Transient_GETS, in_msg.Address);
529 }
530 }
531 } else {
532 error("Unexpected message");
533 }
534 }
535 }
536 }
537
538 // Response Network
539 in_port(responseNetwork_in, ResponseMsg, responseToL1Cache) {
540 if (responseNetwork_in.isReady()) {
541 peek(responseNetwork_in, ResponseMsg, block_on="Address") {
542 assert(in_msg.Destination.isElement(machineID));
543
544 // Mark TBE flag if response received off-chip. Use this to update average latency estimate
545 if ( machineIDToMachineType(in_msg.Sender) == MachineType:L2Cache ) {
546
547 if (in_msg.Sender == mapAddressToRange(in_msg.Address,
548 MachineType:L2Cache,
549 l2_select_low_bit,
550 l2_select_num_bits)) {
551
552 // came from an off-chip L2 cache
553 if (L1_TBEs.isPresent(in_msg.Address)) {
554 // L1_TBEs[in_msg.Address].ExternalResponse := true;
555 // profile_offchipL2_response(in_msg.Address);
556 }
557 }
558 else {
559 // profile_onchipL2_response(in_msg.Address );
560 }
561 } else if ( machineIDToMachineType(in_msg.Sender) == MachineType:Directory ) {
562 if (L1_TBEs.isPresent(in_msg.Address)) {
563 L1_TBEs[in_msg.Address].ExternalResponse := true;
564 // profile_memory_response( in_msg.Address);
565 }
566 } else if ( machineIDToMachineType(in_msg.Sender) == MachineType:L1Cache) {
567 //if (isLocalProcessor(machineID, in_msg.Sender) == false) {
568 //if (L1_TBEs.isPresent(in_msg.Address)) {
569 // L1_TBEs[in_msg.Address].ExternalResponse := true;
570 // profile_offchipL1_response(in_msg.Address );
571 //}
572 //}
573 //else {
574 // profile_onchipL1_response(in_msg.Address );
575 //}
576 } else {
577 error("unexpected SenderMachine");
578 }
579
580
581 if (getTokens(in_msg.Address) + in_msg.Tokens != max_tokens()) {
582 if (in_msg.Type == CoherenceResponseType:ACK) {
583 assert(in_msg.Tokens < (max_tokens() / 2));
584 trigger(Event:Ack, in_msg.Address);
585 } else if (in_msg.Type == CoherenceResponseType:DATA_OWNER) {
586 trigger(Event:Data_Owner, in_msg.Address);
587 } else if (in_msg.Type == CoherenceResponseType:DATA_SHARED) {
588 assert(in_msg.Tokens < (max_tokens() / 2));
589 trigger(Event:Data_Shared, in_msg.Address);
590 } else {
591 error("Unexpected message");
592 }
593 } else {
594 if (in_msg.Type == CoherenceResponseType:ACK) {
595 assert(in_msg.Tokens < (max_tokens() / 2));
596 trigger(Event:Ack_All_Tokens, in_msg.Address);
597 } else if (in_msg.Type == CoherenceResponseType:DATA_OWNER || in_msg.Type == CoherenceResponseType:DATA_SHARED) {
598 trigger(Event:Data_All_Tokens, in_msg.Address);
599 } else {
600 error("Unexpected message");
601 }
602 }
603 }
604 }
605 }
606
607 // Mandatory Queue
608 in_port(mandatoryQueue_in, CacheMsg, mandatoryQueue, desc="...") {
609 if (mandatoryQueue_in.isReady()) {
610 peek(mandatoryQueue_in, CacheMsg, block_on="LineAddress") {
611 // Check for data access to blocks in I-cache and ifetchs to blocks in D-cache
612
613 if (in_msg.Type == CacheRequestType:IFETCH) {
614 // ** INSTRUCTION ACCESS ***
615
616 // Check to see if it is in the OTHER L1
617 if (L1DcacheMemory.isTagPresent(in_msg.LineAddress)) {
618 // The block is in the wrong L1, try to write it to the L2
619 trigger(Event:L1_Replacement, in_msg.LineAddress);
620 }
621
622 if (L1IcacheMemory.isTagPresent(in_msg.LineAddress)) {
623 // The tag matches for the L1, so the L1 fetches the line. We know it can't be in the L2 due to exclusion
624 trigger(mandatory_request_type_to_event(in_msg.Type), in_msg.LineAddress);
625 } else {
626 if (L1IcacheMemory.cacheAvail(in_msg.LineAddress)) {
627 // L1 does't have the line, but we have space for it in the L1
628 trigger(mandatory_request_type_to_event(in_msg.Type), in_msg.LineAddress);
629 } else {
630 // No room in the L1, so we need to make room
631 trigger(Event:L1_Replacement, L1IcacheMemory.cacheProbe(in_msg.LineAddress));
632 }
633 }
634 } else {
635 // *** DATA ACCESS ***
636
637 // Check to see if it is in the OTHER L1
638 if (L1IcacheMemory.isTagPresent(in_msg.LineAddress)) {
639 // The block is in the wrong L1, try to write it to the L2
640 trigger(Event:L1_Replacement, in_msg.LineAddress);
641 }
642
643 if (L1DcacheMemory.isTagPresent(in_msg.LineAddress)) {
644 // The tag matches for the L1, so the L1 fetches the line. We know it can't be in the L2 due to exclusion
645 trigger(mandatory_request_type_to_event(in_msg.Type), in_msg.LineAddress);
646 } else {
647 if (L1DcacheMemory.cacheAvail(in_msg.LineAddress)) {
648 // L1 does't have the line, but we have space for it in the L1
649 trigger(mandatory_request_type_to_event(in_msg.Type), in_msg.LineAddress);
650 } else {
651 // No room in the L1, so we need to make room
652 trigger(Event:L1_Replacement, L1DcacheMemory.cacheProbe(in_msg.LineAddress));
653 }
654 }
655 }
656 }
657 }
658 }
659
660 // ACTIONS
661
662 action(a_issueReadRequest, "a", desc="Issue GETS") {
663 if (L1_TBEs[address].IssueCount == 0) {
664 // Update outstanding requests
665 //profile_outstanding_request(outstandingRequests);
666 outstandingRequests := outstandingRequests + 1;
667 }
668
669 if (L1_TBEs[address].IssueCount >= retry_threshold) {
670 // Issue a persistent request if possible
671 if (okToIssueStarving(address, machineID) && (starving == false)) {
672 enqueue(persistentNetwork_out, PersistentMsg, latency = l1_request_latency) {
673 out_msg.Address := address;
674 out_msg.Type := PersistentRequestType:GETS_PERSISTENT;
675 out_msg.Requestor := machineID;
676 out_msg.Destination.broadcast(MachineType:L1Cache);
677
678 //
679 // Currently the configuration system limits the system to only one
680 // chip. Therefore, if we assume one shared L2 cache, then only one
681 // pertinent L2 cache exist.
682 //
683 //out_msg.Destination.addNetDest(getAllPertinentL2Banks(address));
684
685 out_msg.Destination.add(mapAddressToRange(address,
686 MachineType:L2Cache,
687 l2_select_low_bit,
688 l2_select_num_bits));
689
690 out_msg.Destination.add(map_Address_to_Directory(address));
691 out_msg.MessageSize := MessageSizeType:Persistent_Control;
692 out_msg.Prefetch := L1_TBEs[address].Prefetch;
693 out_msg.AccessMode := L1_TBEs[address].AccessMode;
694 }
695 markPersistentEntries(address);
696 starving := true;
697
698 if (L1_TBEs[address].IssueCount == 0) {
699 //profile_persistent_prediction(address, L1_TBEs[address].AccessType);
700 }
701
702 // Update outstanding requests
703 //profile_outstanding_persistent_request(outstandingPersistentRequests);
704 outstandingPersistentRequests := outstandingPersistentRequests + 1;
705
706 // Increment IssueCount
707 L1_TBEs[address].IssueCount := L1_TBEs[address].IssueCount + 1;
708
709 L1_TBEs[address].WentPersistent := true;
710
711 // Do not schedule a wakeup, a persistent requests will always complete
712 }
713 else {
714
715 // We'd like to issue a persistent request, but are not allowed
716 // to issue a P.R. right now. This, we do not increment the
717 // IssueCount.
718
719 // Set a wakeup timer
720 reissueTimerTable.set(address, 10);
721
722 }
723 } else {
724 // Make a normal request
725 enqueue(requestNetwork_out, RequestMsg, latency = l1_request_latency) {
726 out_msg.Address := address;
727 out_msg.Type := CoherenceRequestType:GETS;
728 out_msg.Requestor := machineID;
729 out_msg.Destination.add(mapAddressToRange(address,
730 MachineType:L2Cache,
731 l2_select_low_bit,
732 l2_select_num_bits));
733
734 out_msg.RetryNum := L1_TBEs[address].IssueCount;
735 if (L1_TBEs[address].IssueCount == 0) {
736 out_msg.MessageSize := MessageSizeType:Request_Control;
737 } else {
738 out_msg.MessageSize := MessageSizeType:Reissue_Control;
739 }
740 out_msg.Prefetch := L1_TBEs[address].Prefetch;
741 out_msg.AccessMode := L1_TBEs[address].AccessMode;
742 }
743
744 // send to other local L1s, with local bit set
745 enqueue(requestNetwork_out, RequestMsg, latency = l1_request_latency) {
746 out_msg.Address := address;
747 out_msg.Type := CoherenceRequestType:GETS;
748 out_msg.Requestor := machineID;
749 //
750 // Since only one chip, assuming all L1 caches are local
751 //
752 //out_msg.Destination := getOtherLocalL1IDs(machineID);
753 out_msg.Destination.broadcast(MachineType:L1Cache);
754 out_msg.Destination.remove(machineID);
755
756 out_msg.RetryNum := L1_TBEs[address].IssueCount;
757 out_msg.isLocal := true;
758 if (L1_TBEs[address].IssueCount == 0) {
759 out_msg.MessageSize := MessageSizeType:Broadcast_Control;
760 } else {
761 out_msg.MessageSize := MessageSizeType:Broadcast_Control;
762 }
763 out_msg.Prefetch := L1_TBEs[address].Prefetch;
764 out_msg.AccessMode := L1_TBEs[address].AccessMode;
765 }
766
767 // Increment IssueCount
768 L1_TBEs[address].IssueCount := L1_TBEs[address].IssueCount + 1;
769
770 // Set a wakeup timer
771
772 if (dynamic_timeout_enabled) {
773 reissueTimerTable.set(address, 1.25 * averageLatencyEstimate());
774 } else {
775 reissueTimerTable.set(address, fixed_timeout_latency);
776 }
777
778 }
779 }
780
781 action(b_issueWriteRequest, "b", desc="Issue GETX") {
782
783 if (L1_TBEs[address].IssueCount == 0) {
784 // Update outstanding requests
785 //profile_outstanding_request(outstandingRequests);
786 outstandingRequests := outstandingRequests + 1;
787 }
788
789 if (L1_TBEs[address].IssueCount >= retry_threshold) {
790 // Issue a persistent request if possible
791 if ( okToIssueStarving(address, machineID) && (starving == false)) {
792 enqueue(persistentNetwork_out, PersistentMsg, latency = l1_request_latency) {
793 out_msg.Address := address;
794 out_msg.Type := PersistentRequestType:GETX_PERSISTENT;
795 out_msg.Requestor := machineID;
796 out_msg.Destination.broadcast(MachineType:L1Cache);
797
798 //
799 // Currently the configuration system limits the system to only one
800 // chip. Therefore, if we assume one shared L2 cache, then only one
801 // pertinent L2 cache exist.
802 //
803 //out_msg.Destination.addNetDest(getAllPertinentL2Banks(address));
804
805 out_msg.Destination.add(mapAddressToRange(address,
806 MachineType:L2Cache,
807 l2_select_low_bit,
808 l2_select_num_bits));
809
810 out_msg.Destination.add(map_Address_to_Directory(address));
811 out_msg.MessageSize := MessageSizeType:Persistent_Control;
812 out_msg.Prefetch := L1_TBEs[address].Prefetch;
813 out_msg.AccessMode := L1_TBEs[address].AccessMode;
814 }
815 markPersistentEntries(address);
816 starving := true;
817
818 // Update outstanding requests
819 //profile_outstanding_persistent_request(outstandingPersistentRequests);
820 outstandingPersistentRequests := outstandingPersistentRequests + 1;
821
822 if (L1_TBEs[address].IssueCount == 0) {
823 //profile_persistent_prediction(address, L1_TBEs[address].AccessType);
824 }
825
826 // Increment IssueCount
827 L1_TBEs[address].IssueCount := L1_TBEs[address].IssueCount + 1;
828
829 L1_TBEs[address].WentPersistent := true;
830
831 // Do not schedule a wakeup, a persistent requests will always complete
832 }
833 else {
834
835 // We'd like to issue a persistent request, but are not allowed
836 // to issue a P.R. right now. This, we do not increment the
837 // IssueCount.
838
839 // Set a wakeup timer
840 reissueTimerTable.set(address, 10);
841 }
842
843
844 } else {
845 // Make a normal request
846 enqueue(requestNetwork_out, RequestMsg, latency = l1_request_latency) {
847 out_msg.Address := address;
848 out_msg.Type := CoherenceRequestType:GETX;
849 out_msg.Requestor := machineID;
850
851 out_msg.Destination.add(mapAddressToRange(address,
852 MachineType:L2Cache,
853 l2_select_low_bit,
854 l2_select_num_bits));
855
856 out_msg.RetryNum := L1_TBEs[address].IssueCount;
857
858 if (L1_TBEs[address].IssueCount == 0) {
859 out_msg.MessageSize := MessageSizeType:Request_Control;
860 } else {
861 out_msg.MessageSize := MessageSizeType:Reissue_Control;
862 }
863 out_msg.Prefetch := L1_TBEs[address].Prefetch;
864 out_msg.AccessMode := L1_TBEs[address].AccessMode;
865 }
866
867 // send to other local L1s too
868 enqueue(requestNetwork_out, RequestMsg, latency = l1_request_latency) {
869 out_msg.Address := address;
870 out_msg.Type := CoherenceRequestType:GETX;
871 out_msg.Requestor := machineID;
872 out_msg.isLocal := true;
873
874 //
875 // Since only one chip, assuming all L1 caches are local
876 //
877 //out_msg.Destination := getOtherLocalL1IDs(machineID);
878 out_msg.Destination.broadcast(MachineType:L1Cache);
879 out_msg.Destination.remove(machineID);
880
881 out_msg.RetryNum := L1_TBEs[address].IssueCount;
882 if (L1_TBEs[address].IssueCount == 0) {
883 out_msg.MessageSize := MessageSizeType:Broadcast_Control;
884 } else {
885 out_msg.MessageSize := MessageSizeType:Broadcast_Control;
886 }
887 out_msg.Prefetch := L1_TBEs[address].Prefetch;
888 out_msg.AccessMode := L1_TBEs[address].AccessMode;
889 }
890
891 // Increment IssueCount
892 L1_TBEs[address].IssueCount := L1_TBEs[address].IssueCount + 1;
893
894 DPRINTF(RubySlicc, "incremented issue count to %d\n",
895 L1_TBEs[address].IssueCount);
896
897 // Set a wakeup timer
898 if (dynamic_timeout_enabled) {
899 reissueTimerTable.set(address, 1.25 * averageLatencyEstimate());
900 } else {
901 reissueTimerTable.set(address, fixed_timeout_latency);
902 }
903 }
904 }
905
906 action(bb_bounceResponse, "\b", desc="Bounce tokens and data to memory") {
907 peek(responseNetwork_in, ResponseMsg) {
908 // FIXME, should use a 3rd vnet
909 enqueue(responseNetwork_out, ResponseMsg, latency="1") {
910 out_msg.Address := address;
911 out_msg.Type := in_msg.Type;
912 out_msg.Sender := machineID;
913 out_msg.Destination.add(map_Address_to_Directory(address));
914 out_msg.Tokens := in_msg.Tokens;
915 out_msg.MessageSize := in_msg.MessageSize;
916 out_msg.DataBlk := in_msg.DataBlk;
917 out_msg.Dirty := in_msg.Dirty;
918 }
919 }
920 }
921
922 action(c_ownedReplacement, "c", desc="Issue writeback") {
923 enqueue(responseNetwork_out, ResponseMsg, latency = l1_response_latency) {
924 out_msg.Address := address;
925 out_msg.Sender := machineID;
926
927 out_msg.Destination.add(mapAddressToRange(address,
928 MachineType:L2Cache,
929 l2_select_low_bit,
930 l2_select_num_bits));
931
932 out_msg.Tokens := getCacheEntry(address).Tokens;
933 out_msg.DataBlk := getCacheEntry(address).DataBlk;
934 out_msg.Dirty := getCacheEntry(address).Dirty;
935 out_msg.Type := CoherenceResponseType:WB_OWNED;
936
937 // always send the data?
938 out_msg.MessageSize := MessageSizeType:Writeback_Data;
939 }
940 getCacheEntry(address).Tokens := 0;
941 }
942
943 action(cc_sharedReplacement, "\c", desc="Issue shared writeback") {
944
945 // don't send writeback if replacing block with no tokens
946 assert (getCacheEntry(address).Tokens > 0);
947 enqueue(responseNetwork_out, ResponseMsg, latency = l1_response_latency) {
948 out_msg.Address := address;
949 out_msg.Sender := machineID;
950
951 out_msg.Destination.add(mapAddressToRange(address,
952 MachineType:L2Cache,
953 l2_select_low_bit,
954 l2_select_num_bits));
955
956 out_msg.Tokens := getCacheEntry(address).Tokens;
957 out_msg.DataBlk := getCacheEntry(address).DataBlk;
958 // assert(getCacheEntry(address).Dirty == false);
959 out_msg.Dirty := false;
960
961 out_msg.MessageSize := MessageSizeType:Writeback_Data;
962 out_msg.Type := CoherenceResponseType:WB_SHARED_DATA;
963 }
964 getCacheEntry(address).Tokens := 0;
965 }
966
967 action(tr_tokenReplacement, "tr", desc="Issue token writeback") {
968 if (getCacheEntry(address).Tokens > 0) {
969 enqueue(responseNetwork_out, ResponseMsg, latency = l1_response_latency) {
970 out_msg.Address := address;
971 out_msg.Sender := machineID;
972
973 out_msg.Destination.add(mapAddressToRange(address,
974 MachineType:L2Cache,
975 l2_select_low_bit,
976 l2_select_num_bits));
977
978 out_msg.Tokens := getCacheEntry(address).Tokens;
979 out_msg.DataBlk := getCacheEntry(address).DataBlk;
980 // assert(getCacheEntry(address).Dirty == false);
981 out_msg.Dirty := false;
982
983 // always send the data?
984 out_msg.MessageSize := MessageSizeType:Writeback_Control;
985 out_msg.Type := CoherenceResponseType:WB_TOKENS;
986 }
987 }
988 getCacheEntry(address).Tokens := 0;
989 }
990
991
992 action(d_sendDataWithToken, "d", desc="Send data and a token from cache to requestor") {
993 peek(requestNetwork_in, RequestMsg) {
994 enqueue(responseNetwork_out, ResponseMsg, latency = l1_response_latency) {
995 out_msg.Address := address;
996 out_msg.Type := CoherenceResponseType:DATA_SHARED;
997 out_msg.Sender := machineID;
998 out_msg.Destination.add(in_msg.Requestor);
999 out_msg.Tokens := 1;
1000 out_msg.DataBlk := getCacheEntry(address).DataBlk;
1001 // out_msg.Dirty := getCacheEntry(address).Dirty;
1002 out_msg.Dirty := false;
1003 if (in_msg.isLocal) {
1004 out_msg.MessageSize := MessageSizeType:ResponseLocal_Data;
1005 } else {
1006 out_msg.MessageSize := MessageSizeType:Response_Data;
1007 }
1008 }
1009 }
1010 getCacheEntry(address).Tokens := getCacheEntry(address).Tokens - 1;
1011 assert(getCacheEntry(address).Tokens >= 1);
1012 }
1013
1014 action(d_sendDataWithNTokenIfAvail, "\dd", desc="Send data and a token from cache to requestor") {
1015 peek(requestNetwork_in, RequestMsg) {
1016 if (getCacheEntry(address).Tokens > (N_tokens + (max_tokens() / 2))) {
1017 enqueue(responseNetwork_out, ResponseMsg, latency = l1_response_latency) {
1018 out_msg.Address := address;
1019 out_msg.Type := CoherenceResponseType:DATA_SHARED;
1020 out_msg.Sender := machineID;
1021 out_msg.Destination.add(in_msg.Requestor);
1022 out_msg.Tokens := N_tokens;
1023 out_msg.DataBlk := getCacheEntry(address).DataBlk;
1024 // out_msg.Dirty := getCacheEntry(address).Dirty;
1025 out_msg.Dirty := false;
1026 if (in_msg.isLocal) {
1027 out_msg.MessageSize := MessageSizeType:ResponseLocal_Data;
1028 } else {
1029 out_msg.MessageSize := MessageSizeType:Response_Data;
1030 }
1031 }
1032 getCacheEntry(address).Tokens := getCacheEntry(address).Tokens - N_tokens;
1033 }
1034 else if (getCacheEntry(address).Tokens > 1) {
1035 enqueue(responseNetwork_out, ResponseMsg, latency = l1_response_latency) {
1036 out_msg.Address := address;
1037 out_msg.Type := CoherenceResponseType:DATA_SHARED;
1038 out_msg.Sender := machineID;
1039 out_msg.Destination.add(in_msg.Requestor);
1040 out_msg.Tokens := 1;
1041 out_msg.DataBlk := getCacheEntry(address).DataBlk;
1042 // out_msg.Dirty := getCacheEntry(address).Dirty;
1043 out_msg.Dirty := false;
1044 if (in_msg.isLocal) {
1045 out_msg.MessageSize := MessageSizeType:ResponseLocal_Data;
1046 } else {
1047 out_msg.MessageSize := MessageSizeType:Response_Data;
1048 }
1049 }
1050 getCacheEntry(address).Tokens := getCacheEntry(address).Tokens - 1;
1051 }
1052 }
1053 // assert(getCacheEntry(address).Tokens >= 1);
1054 }
1055
1056 action(dd_sendDataWithAllTokens, "\d", desc="Send data and all tokens from cache to requestor") {
1057 peek(requestNetwork_in, RequestMsg) {
1058 enqueue(responseNetwork_out, ResponseMsg, latency = l1_response_latency) {
1059 out_msg.Address := address;
1060 out_msg.Type := CoherenceResponseType:DATA_OWNER;
1061 out_msg.Sender := machineID;
1062 out_msg.Destination.add(in_msg.Requestor);
1063 assert(getCacheEntry(address).Tokens > (max_tokens() / 2));
1064 out_msg.Tokens := getCacheEntry(address).Tokens;
1065 out_msg.DataBlk := getCacheEntry(address).DataBlk;
1066 out_msg.Dirty := getCacheEntry(address).Dirty;
1067 if (in_msg.isLocal) {
1068 out_msg.MessageSize := MessageSizeType:ResponseLocal_Data;
1069 } else {
1070 out_msg.MessageSize := MessageSizeType:Response_Data;
1071 }
1072 }
1073 }
1074 getCacheEntry(address).Tokens := 0;
1075 }
1076
1077 action(e_sendAckWithCollectedTokens, "e", desc="Send ack with the tokens we've collected thus far.") {
1078 // assert(persistentTable.findSmallest(address) != id); // Make sure we never bounce tokens to ourself
1079 if (getCacheEntry(address).Tokens > 0) {
1080 enqueue(responseNetwork_out, ResponseMsg, latency = l1_response_latency) {
1081 out_msg.Address := address;
1082 if (getCacheEntry(address).Tokens > (max_tokens() / 2)) {
1083 out_msg.Type := CoherenceResponseType:DATA_OWNER;
1084 } else {
1085 out_msg.Type := CoherenceResponseType:ACK;
1086 }
1087 out_msg.Sender := machineID;
1088 out_msg.Destination.add(persistentTable.findSmallest(address));
1089 assert(getCacheEntry(address).Tokens >= 1);
1090 out_msg.Tokens := getCacheEntry(address).Tokens;
1091 out_msg.DataBlk := getCacheEntry(address).DataBlk;
1092 out_msg.MessageSize := MessageSizeType:Response_Control;
1093 }
1094 }
1095 getCacheEntry(address).Tokens := 0;
1096 }
1097
1098 action(ee_sendDataWithAllTokens, "\e", desc="Send data and all tokens from cache to starver") {
1099 //assert(persistentTable.findSmallest(address) != id); // Make sure we never bounce tokens to ourself
1100 assert(getCacheEntry(address).Tokens > 0);
1101 enqueue(responseNetwork_out, ResponseMsg, latency = l1_response_latency) {
1102 out_msg.Address := address;
1103 out_msg.Type := CoherenceResponseType:DATA_OWNER;
1104 out_msg.Sender := machineID;
1105 out_msg.Destination.add(persistentTable.findSmallest(address));
1106 assert(getCacheEntry(address).Tokens > (max_tokens() / 2));
1107 out_msg.Tokens := getCacheEntry(address).Tokens;
1108 out_msg.DataBlk := getCacheEntry(address).DataBlk;
1109 out_msg.Dirty := getCacheEntry(address).Dirty;
1110 out_msg.MessageSize := MessageSizeType:Response_Data;
1111 }
1112 getCacheEntry(address).Tokens := 0;
1113 }
1114
1115 action(f_sendAckWithAllButNorOneTokens, "f", desc="Send ack with all our tokens but one to starver.") {
1116 //assert(persistentTable.findSmallest(address) != id); // Make sure we never bounce tokens to ourself
1117 assert(getCacheEntry(address).Tokens > 0);
1118 if (getCacheEntry(address).Tokens > 1) {
1119 enqueue(responseNetwork_out, ResponseMsg, latency = l1_response_latency) {
1120 out_msg.Address := address;
1121 if (getCacheEntry(address).Tokens > (max_tokens() / 2)) {
1122 out_msg.Type := CoherenceResponseType:DATA_OWNER;
1123 } else {
1124 out_msg.Type := CoherenceResponseType:ACK;
1125 }
1126 out_msg.Sender := machineID;
1127 out_msg.Destination.add(persistentTable.findSmallest(address));
1128 assert(getCacheEntry(address).Tokens >= 1);
1129 if (getCacheEntry(address).Tokens > N_tokens) {
1130 out_msg.Tokens := getCacheEntry(address).Tokens - N_tokens;
1131 } else {
1132 out_msg.Tokens := getCacheEntry(address).Tokens - 1;
1133 }
1134 out_msg.DataBlk := getCacheEntry(address).DataBlk;
1135 out_msg.MessageSize := MessageSizeType:Response_Control;
1136 }
1137 }
1138 if (getCacheEntry(address).Tokens > N_tokens) {
1139 getCacheEntry(address).Tokens := N_tokens;
1140 } else {
1141 getCacheEntry(address).Tokens := 1;
1142 }
1143 }
1144
1145 action(ff_sendDataWithAllButNorOneTokens, "\f", desc="Send data and out tokens but one to starver") {
1146 //assert(persistentTable.findSmallest(address) != id); // Make sure we never bounce tokens to ourself
1147 assert(getCacheEntry(address).Tokens > ((max_tokens() / 2) + 1));
1148 enqueue(responseNetwork_out, ResponseMsg, latency = l1_response_latency) {
1149 out_msg.Address := address;
1150 out_msg.Type := CoherenceResponseType:DATA_OWNER;
1151 out_msg.Sender := machineID;
1152 out_msg.Destination.add(persistentTable.findSmallest(address));
1153 if (getCacheEntry(address).Tokens > (N_tokens + (max_tokens() / 2))) {
1154 out_msg.Tokens := getCacheEntry(address).Tokens - N_tokens;
1155 } else {
1156 out_msg.Tokens := getCacheEntry(address).Tokens - 1;
1157 }
1158 assert(out_msg.Tokens > (max_tokens() / 2));
1159 out_msg.DataBlk := getCacheEntry(address).DataBlk;
1160 out_msg.Dirty := getCacheEntry(address).Dirty;
1161 out_msg.MessageSize := MessageSizeType:Response_Data;
1162 }
1163 if (getCacheEntry(address).Tokens > (N_tokens + (max_tokens() / 2))) {
1164 getCacheEntry(address).Tokens := N_tokens;
1165 } else {
1166 getCacheEntry(address).Tokens := 1;
1167 }
1168 }
1169
1170 action(fo_sendDataWithOwnerToken, "fo", desc="Send data and owner tokens") {
1171 assert(getCacheEntry(address).Tokens == ((max_tokens() / 2) + 1));
1172 enqueue(responseNetwork_out, ResponseMsg, latency = l1_response_latency) {
1173 out_msg.Address := address;
1174 out_msg.Type := CoherenceResponseType:DATA_OWNER;
1175 out_msg.Sender := machineID;
1176 out_msg.Destination.add(persistentTable.findSmallest(address));
1177 out_msg.Tokens := getCacheEntry(address).Tokens;
1178 assert(out_msg.Tokens > (max_tokens() / 2));
1179 out_msg.DataBlk := getCacheEntry(address).DataBlk;
1180 out_msg.Dirty := getCacheEntry(address).Dirty;
1181 out_msg.MessageSize := MessageSizeType:Response_Data;
1182 }
1183 getCacheEntry(address).Tokens := 0;
1184 }
1185
1186 action(g_bounceResponseToStarver, "g", desc="Redirect response to starving processor") {
1187 // assert(persistentTable.isLocked(address));
1188
1189 peek(responseNetwork_in, ResponseMsg) {
1190 // assert(persistentTable.findSmallest(address) != id); // Make sure we never bounce tokens to ourself
1191 // FIXME, should use a 3rd vnet in some cases
1192 enqueue(responseNetwork_out, ResponseMsg, latency="1") {
1193 out_msg.Address := address;
1194 out_msg.Type := in_msg.Type;
1195 out_msg.Sender := machineID;
1196 out_msg.Destination.add(persistentTable.findSmallest(address));
1197 out_msg.Tokens := in_msg.Tokens;
1198 out_msg.DataBlk := in_msg.DataBlk;
1199 out_msg.Dirty := in_msg.Dirty;
1200 out_msg.MessageSize := in_msg.MessageSize;
1201 }
1202 }
1203 }
1204
1205
1206 action(h_load_hit, "h", desc="Notify sequencer the load completed.") {
1207 DPRINTF(RubySlicc, "Address: %s, Data Block: %s\n",
1208 address, getCacheEntry(address).DataBlk);
1209
1210 sequencer.readCallback(address,
1211 GenericMachineType:L1Cache,
1212 getCacheEntry(address).DataBlk);
1213
1214 }
1215
1216 action(x_external_load_hit, "x", desc="Notify sequencer the load completed.") {
1217 DPRINTF(RubySlicc, "Address: %s, Data Block: %s\n",
1218 address, getCacheEntry(address).DataBlk);
1219 peek(responseNetwork_in, ResponseMsg) {
1220
1221 sequencer.readCallback(address,
1222 getNondirectHitMachType(address, in_msg.Sender),
1223 getCacheEntry(address).DataBlk);
1224
1225 }
1226 }
1227
1228 action(hh_store_hit, "\h", desc="Notify sequencer that store completed.") {
1229 DPRINTF(RubySlicc, "Address: %s, Data Block: %s\n",
1230 address, getCacheEntry(address).DataBlk);
1231
1232 sequencer.writeCallback(address,
1233 GenericMachineType:L1Cache,
1234 getCacheEntry(address).DataBlk);
1235
1236 getCacheEntry(address).Dirty := true;
1237 DPRINTF(RubySlicc, "%s\n", getCacheEntry(address).DataBlk);
1238 }
1239
1240 action(xx_external_store_hit, "\x", desc="Notify sequencer that store completed.") {
1241 DPRINTF(RubySlicc, "Address: %s, Data Block: %s\n",
1242 address, getCacheEntry(address).DataBlk);
1243 peek(responseNetwork_in, ResponseMsg) {
1244
1245 sequencer.writeCallback(address,
1246 getNondirectHitMachType(address, in_msg.Sender),
1247 getCacheEntry(address).DataBlk);
1248
1249 }
1250 getCacheEntry(address).Dirty := true;
1251 DPRINTF(RubySlicc, "%s\n", getCacheEntry(address).DataBlk);
1252 }
1253
1254 action(i_allocateTBE, "i", desc="Allocate TBE") {
1255 check_allocate(L1_TBEs);
1256 L1_TBEs.allocate(address);
1257 L1_TBEs[address].IssueCount := 0;
1258 peek(mandatoryQueue_in, CacheMsg) {
1259 L1_TBEs[address].PC := in_msg.ProgramCounter;
1260 L1_TBEs[address].AccessType := cache_request_type_to_access_type(in_msg.Type);
1261 if (in_msg.Type == CacheRequestType:ATOMIC) {
1262 L1_TBEs[address].IsAtomic := true;
1263 }
1264 L1_TBEs[address].Prefetch := in_msg.Prefetch;
1265 L1_TBEs[address].AccessMode := in_msg.AccessMode;
1266 }
1267 L1_TBEs[address].IssueTime := get_time();
1268 }
1269
1270
1271 action(j_unsetReissueTimer, "j", desc="Unset reissue timer.") {
1272 if (reissueTimerTable.isSet(address)) {
1273 reissueTimerTable.unset(address);
1274 }
1275 }
1276
1277 action(jj_unsetUseTimer, "\j", desc="Unset use timer.") {
1278 useTimerTable.unset(address);
1279 }
1280
1281 action(k_popMandatoryQueue, "k", desc="Pop mandatory queue.") {
1282 mandatoryQueue_in.dequeue();
1283 }
1284
1285 action(l_popPersistentQueue, "l", desc="Pop persistent queue.") {
1286 persistentNetwork_in.dequeue();
1287 }
1288
1289 action(m_popRequestQueue, "m", desc="Pop request queue.") {
1290 requestNetwork_in.dequeue();
1291 }
1292
1293 action(n_popResponseQueue, "n", desc="Pop response queue") {
1294 responseNetwork_in.dequeue();
1295 }
1296
1297 action(o_scheduleUseTimeout, "o", desc="Schedule a use timeout.") {
1298 useTimerTable.set(address, 50);
1299 }
1300
1301 action(p_informL2AboutTokenLoss, "p", desc="Inform L2 about loss of all tokens") {
1302 enqueue(responseNetwork_out, ResponseMsg, latency = l1_response_latency) {
1303 out_msg.Address := address;
1304 out_msg.Type := CoherenceResponseType:INV;
1305 out_msg.Tokens := 0;
1306 out_msg.Sender := machineID;
1307
1308 out_msg.Destination.add(mapAddressToRange(address,
1309 MachineType:L2Cache,
1310 l2_select_low_bit,
1311 l2_select_num_bits));
1312
1313 out_msg.MessageSize := MessageSizeType:Response_Control;
1314 }
1315 }
1316
1317
1318 action(q_updateTokensFromResponse, "q", desc="Update the token count based on the incoming response message") {
1319 peek(responseNetwork_in, ResponseMsg) {
1320 assert(in_msg.Tokens != 0);
1321 DPRINTF(RubySlicc, "L1 received tokens for address: %s, tokens: %d\n",
1322 in_msg.Address, in_msg.Tokens);
1323 getCacheEntry(address).Tokens := getCacheEntry(address).Tokens + in_msg.Tokens;
1324 DPRINTF(RubySlicc, "%d\n", getCacheEntry(address).Tokens);
1325
1326 if (getCacheEntry(address).Dirty == false && in_msg.Dirty) {
1327 getCacheEntry(address).Dirty := true;
1328 }
1329 }
1330 }
1331
1332 action(s_deallocateTBE, "s", desc="Deallocate TBE") {
1333
1334 if (L1_TBEs[address].WentPersistent) {
1335 // assert(starving == true);
1336 outstandingRequests := outstandingRequests - 1;
1337 enqueue(persistentNetwork_out, PersistentMsg, latency = l1_request_latency) {
1338 out_msg.Address := address;
1339 out_msg.Type := PersistentRequestType:DEACTIVATE_PERSISTENT;
1340 out_msg.Requestor := machineID;
1341 out_msg.Destination.broadcast(MachineType:L1Cache);
1342
1343 //
1344 // Currently the configuration system limits the system to only one
1345 // chip. Therefore, if we assume one shared L2 cache, then only one
1346 // pertinent L2 cache exist.
1347 //
1348 //out_msg.Destination.addNetDest(getAllPertinentL2Banks(address));
1349
1350 out_msg.Destination.add(mapAddressToRange(address,
1351 MachineType:L2Cache,
1352 l2_select_low_bit,
1353 l2_select_num_bits));
1354
1355 out_msg.Destination.add(map_Address_to_Directory(address));
1356 out_msg.MessageSize := MessageSizeType:Persistent_Control;
1357 }
1358 starving := false;
1359 }
1360
1361 // Update average latency
1362 if (L1_TBEs[address].IssueCount <= 1) {
1363 if (L1_TBEs[address].ExternalResponse == true) {
1364 updateAverageLatencyEstimate(time_to_int(get_time()) - time_to_int(L1_TBEs[address].IssueTime));
1365 }
1366 }
1367
1368 // Profile
1369 //if (L1_TBEs[address].WentPersistent) {
1370 // profile_token_retry(address, L1_TBEs[address].AccessType, 2);
1371 //}
1372 //else {
1373 // profile_token_retry(address, L1_TBEs[address].AccessType, 1);
1374 //}
1375
1376 //profile_token_retry(address, L1_TBEs[address].AccessType, L1_TBEs[address].IssueCount);
1377 L1_TBEs.deallocate(address);
1378 }
1379
1380 action(t_sendAckWithCollectedTokens, "t", desc="Send ack with the tokens we've collected thus far.") {
1381 if (getCacheEntry(address).Tokens > 0) {
1382 peek(requestNetwork_in, RequestMsg) {
1383 enqueue(responseNetwork_out, ResponseMsg, latency = l1_response_latency) {
1384 out_msg.Address := address;
1385 if (getCacheEntry(address).Tokens > (max_tokens() / 2)) {
1386 out_msg.Type := CoherenceResponseType:DATA_OWNER;
1387 } else {
1388 out_msg.Type := CoherenceResponseType:ACK;
1389 }
1390 out_msg.Sender := machineID;
1391 out_msg.Destination.add(in_msg.Requestor);
1392 assert(getCacheEntry(address).Tokens >= 1);
1393 out_msg.Tokens := getCacheEntry(address).Tokens;
1394 out_msg.DataBlk := getCacheEntry(address).DataBlk;
1395 out_msg.MessageSize := MessageSizeType:Response_Control;
1396 }
1397 }
1398 }
1399 getCacheEntry(address).Tokens := 0;
1400 }
1401
1402 action(u_writeDataToCache, "u", desc="Write data to cache") {
1403 peek(responseNetwork_in, ResponseMsg) {
1404 getCacheEntry(address).DataBlk := in_msg.DataBlk;
1405 if (getCacheEntry(address).Dirty == false && in_msg.Dirty) {
1406 getCacheEntry(address).Dirty := in_msg.Dirty;
1407 }
1408
1409 }
1410 }
1411
1412 action(gg_deallocateL1CacheBlock, "\g", desc="Deallocate cache block. Sets the cache to invalid, allowing a replacement in parallel with a fetch.") {
1413 assert(getTokens(address) == 0);
1414 if (L1DcacheMemory.isTagPresent(address)) {
1415 L1DcacheMemory.deallocate(address);
1416 } else {
1417 L1IcacheMemory.deallocate(address);
1418 }
1419 }
1420
1421 action(ii_allocateL1DCacheBlock, "\i", desc="Set L1 D-cache tag equal to tag of block B.") {
1422 if (L1DcacheMemory.isTagPresent(address) == false) {
1423 L1DcacheMemory.allocate(address, new Entry);
1424 }
1425 }
1426
1427 action(pp_allocateL1ICacheBlock, "\p", desc="Set L1 I-cache tag equal to tag of block B.") {
1428 if (L1IcacheMemory.isTagPresent(address) == false) {
1429 L1IcacheMemory.allocate(address, new Entry);
1430 }
1431 }
1432
1433 action(uu_profileMiss, "\u", desc="Profile the demand miss") {
1434 peek(mandatoryQueue_in, CacheMsg) {
1435 if (L1DcacheMemory.isTagPresent(address)) {
1436 L1DcacheMemory.profileMiss(in_msg);
1437 } else {
1438 L1IcacheMemory.profileMiss(in_msg);
1439 }
1440 }
1441 }
1442
1443 action(w_assertIncomingDataAndCacheDataMatch, "w", desc="Assert that the incoming data and the data in the cache match") {
1444 peek(responseNetwork_in, ResponseMsg) {
1445 assert(getCacheEntry(address).DataBlk == in_msg.DataBlk);
1446 }
1447 }
1448
1449 action(zz_recycleMandatoryQueue, "\z", desc="Send the head of the mandatory queue to the back of the queue.") {
1450 mandatoryQueue_in.recycle();
1451 }
1452
1453 //*****************************************************
1454 // TRANSITIONS
1455 //*****************************************************
1456
1457 // Transitions for Load/Store/L2_Replacement from transient states
1458 transition({IM, SM, OM, IS, IM_L, IS_L, I_L, S_L, SM_L, M_W, MM_W}, L1_Replacement) {
1459 zz_recycleMandatoryQueue;
1460 }
1461
1462 transition({IM, SM, OM, IS, IM_L, IS_L, SM_L}, {Store, Atomic}) {
1463 zz_recycleMandatoryQueue;
1464 }
1465
1466 transition({IM, IS, IM_L, IS_L}, {Load, Ifetch}) {
1467 zz_recycleMandatoryQueue;
1468 }
1469
1470
1471 // Lockdowns
1472 transition({NP, I, S, O, M, MM, M_W, MM_W, IM, SM, OM, IS}, Own_Lock_or_Unlock) {
1473 l_popPersistentQueue;
1474 }
1475
1476 // Transitions from NP
1477 transition(NP, Load, IS) {
1478 ii_allocateL1DCacheBlock;
1479 i_allocateTBE;
1480 a_issueReadRequest;
1481 uu_profileMiss;
1482 k_popMandatoryQueue;
1483 }
1484
1485 transition(NP, Ifetch, IS) {
1486 pp_allocateL1ICacheBlock;
1487 i_allocateTBE;
1488 a_issueReadRequest;
1489 uu_profileMiss;
1490 k_popMandatoryQueue;
1491 }
1492
1493 transition(NP, {Store, Atomic}, IM) {
1494 ii_allocateL1DCacheBlock;
1495 i_allocateTBE;
1496 b_issueWriteRequest;
1497 uu_profileMiss;
1498 k_popMandatoryQueue;
1499 }
1500
1501 transition(NP, {Ack, Data_Shared, Data_Owner, Data_All_Tokens}) {
1502 bb_bounceResponse;
1503 n_popResponseQueue;
1504 }
1505
1506 transition(NP, {Transient_GETX, Transient_Local_GETX, Transient_GETS, Transient_Local_GETS}) {
1507 m_popRequestQueue;
1508 }
1509
1510 transition(NP, {Persistent_GETX, Persistent_GETS, Persistent_GETS_Last_Token}, I_L) {
1511 l_popPersistentQueue;
1512 }
1513
1514 // Transitions from Idle
1515 transition(I, Load, IS) {
1516 i_allocateTBE;
1517 a_issueReadRequest;
1518 uu_profileMiss;
1519 k_popMandatoryQueue;
1520 }
1521
1522 transition(I, Ifetch, IS) {
1523 i_allocateTBE;
1524 a_issueReadRequest;
1525 uu_profileMiss;
1526 k_popMandatoryQueue;
1527 }
1528
1529 transition(I, {Store, Atomic}, IM) {
1530 i_allocateTBE;
1531 b_issueWriteRequest;
1532 uu_profileMiss;
1533 k_popMandatoryQueue;
1534 }
1535
1536 transition(I, L1_Replacement) {
1537 tr_tokenReplacement;
1538 gg_deallocateL1CacheBlock;
1539 }
1540
1541 transition(I, {Transient_GETX, Transient_Local_GETX}) {
1542 t_sendAckWithCollectedTokens;
1543 m_popRequestQueue;
1544 }
1545
1546 transition(I, {Transient_GETS, Transient_GETS_Last_Token, Transient_Local_GETS_Last_Token, Transient_Local_GETS}) {
1547 m_popRequestQueue;
1548 }
1549
1550 transition(I, {Persistent_GETX, Persistent_GETS, Persistent_GETS_Last_Token}, I_L) {
1551 e_sendAckWithCollectedTokens;
1552 l_popPersistentQueue;
1553 }
1554
1555 transition(I_L, {Persistent_GETX, Persistent_GETS, Persistent_GETS_Last_Token}) {
1556 l_popPersistentQueue;
1557 }
1558
1559 transition(I, Ack) {
1560 q_updateTokensFromResponse;
1561 n_popResponseQueue;
1562 }
1563
1564 transition(I, Data_Shared, S) {
1565 u_writeDataToCache;
1566 q_updateTokensFromResponse;
1567 n_popResponseQueue;
1568 }
1569
1570 transition(I, Data_Owner, O) {
1571 u_writeDataToCache;
1572 q_updateTokensFromResponse;
1573 n_popResponseQueue;
1574 }
1575
1576 transition(I, Data_All_Tokens, M) {
1577 u_writeDataToCache;
1578 q_updateTokensFromResponse;
1579 n_popResponseQueue;
1580 }
1581
1582 // Transitions from Shared
1583 transition({S, SM, S_L, SM_L}, {Load, Ifetch}) {
1584 h_load_hit;
1585 k_popMandatoryQueue;
1586 }
1587
1588 transition(S, {Store, Atomic}, SM) {
1589 i_allocateTBE;
1590 b_issueWriteRequest;
1591 uu_profileMiss;
1592 k_popMandatoryQueue;
1593 }
1594
1595 transition(S, L1_Replacement, I) {
1596 cc_sharedReplacement; // Only needed in some cases
1597 gg_deallocateL1CacheBlock;
1598 }
1599
1600 transition(S, {Transient_GETX, Transient_Local_GETX}, I) {
1601 t_sendAckWithCollectedTokens;
1602 p_informL2AboutTokenLoss;
1603 m_popRequestQueue;
1604 }
1605
1606 // only owner responds to non-local requests
1607 transition(S, Transient_GETS) {
1608 m_popRequestQueue;
1609 }
1610
1611 transition(S, Transient_Local_GETS) {
1612 d_sendDataWithToken;
1613 m_popRequestQueue;
1614 }
1615
1616 transition(S, {Transient_GETS_Last_Token, Transient_Local_GETS_Last_Token}) {
1617 m_popRequestQueue;
1618 }
1619
1620 transition({S, S_L}, Persistent_GETX, I_L) {
1621 e_sendAckWithCollectedTokens;
1622 p_informL2AboutTokenLoss;
1623 l_popPersistentQueue;
1624 }
1625
1626 transition(S, {Persistent_GETS, Persistent_GETS_Last_Token}, S_L) {
1627 f_sendAckWithAllButNorOneTokens;
1628 l_popPersistentQueue;
1629 }
1630
1631 transition(S_L, {Persistent_GETS, Persistent_GETS_Last_Token}) {
1632 l_popPersistentQueue;
1633 }
1634
1635 transition(S, Ack) {
1636 q_updateTokensFromResponse;
1637 n_popResponseQueue;
1638 }
1639
1640 transition(S, Data_Shared) {
1641 w_assertIncomingDataAndCacheDataMatch;
1642 q_updateTokensFromResponse;
1643 n_popResponseQueue;
1644 }
1645
1646 transition(S, Data_Owner, O) {
1647 w_assertIncomingDataAndCacheDataMatch;
1648 q_updateTokensFromResponse;
1649 n_popResponseQueue;
1650 }
1651
1652 transition(S, Data_All_Tokens, M) {
1653 w_assertIncomingDataAndCacheDataMatch;
1654 q_updateTokensFromResponse;
1655 n_popResponseQueue;
1656 }
1657
1658 // Transitions from Owned
1659 transition({O, OM}, {Load, Ifetch}) {
1660 h_load_hit;
1661 k_popMandatoryQueue;
1662 }
1663
1664 transition(O, {Store, Atomic}, OM) {
1665 i_allocateTBE;
1666 b_issueWriteRequest;
1667 uu_profileMiss;
1668 k_popMandatoryQueue;
1669 }
1670
1671 transition(O, L1_Replacement, I) {
1672 c_ownedReplacement;
1673 gg_deallocateL1CacheBlock;
1674 }
1675
1676 transition(O, {Transient_GETX, Transient_Local_GETX}, I) {
1677 dd_sendDataWithAllTokens;
1678 p_informL2AboutTokenLoss;
1679 m_popRequestQueue;
1680 }
1681
1682 transition(O, Persistent_GETX, I_L) {
1683 ee_sendDataWithAllTokens;
1684 p_informL2AboutTokenLoss;
1685 l_popPersistentQueue;
1686 }
1687
1688 transition(O, Persistent_GETS, S_L) {
1689 ff_sendDataWithAllButNorOneTokens;
1690 l_popPersistentQueue;
1691 }
1692
1693 transition(O, Persistent_GETS_Last_Token, I_L) {
1694 fo_sendDataWithOwnerToken;
1695 l_popPersistentQueue;
1696 }
1697
1698 transition(O, Transient_GETS) {
1699 d_sendDataWithToken;
1700 m_popRequestQueue;
1701 }
1702
1703 transition(O, Transient_Local_GETS) {
1704 d_sendDataWithToken;
1705 m_popRequestQueue;
1706 }
1707
1708 // ran out of tokens, wait for it to go persistent
1709 transition(O, {Transient_GETS_Last_Token, Transient_Local_GETS_Last_Token}) {
1710 m_popRequestQueue;
1711 }
1712
1713 transition(O, Ack) {
1714 q_updateTokensFromResponse;
1715 n_popResponseQueue;
1716 }
1717
1718 transition(O, Ack_All_Tokens, M) {
1719 q_updateTokensFromResponse;
1720 n_popResponseQueue;
1721 }
1722
1723 transition(O, Data_Shared) {
1724 w_assertIncomingDataAndCacheDataMatch;
1725 q_updateTokensFromResponse;
1726 n_popResponseQueue;
1727 }
1728
1729 transition(O, Data_All_Tokens, M) {
1730 w_assertIncomingDataAndCacheDataMatch;
1731 q_updateTokensFromResponse;
1732 n_popResponseQueue;
1733 }
1734
1735 // Transitions from Modified
1736 transition({MM, MM_W}, {Load, Ifetch}) {
1737 h_load_hit;
1738 k_popMandatoryQueue;
1739 }
1740
1741 transition({MM_W}, {Store, Atomic}) {
1742 hh_store_hit;
1743 k_popMandatoryQueue;
1744 }
1745
1746 transition(MM, Store) {
1747 hh_store_hit;
1748 k_popMandatoryQueue;
1749 }
1750
1751 transition(MM, Atomic, M) {
1752 hh_store_hit;
1753 k_popMandatoryQueue;
1754 }
1755
1756 transition(MM, L1_Replacement, I) {
1757 c_ownedReplacement;
1758 gg_deallocateL1CacheBlock;
1759 }
1760
1761 transition(MM, {Transient_GETX, Transient_Local_GETX, Transient_GETS, Transient_Local_GETS}, I) {
1762 dd_sendDataWithAllTokens;
1763 p_informL2AboutTokenLoss;
1764 m_popRequestQueue;
1765 }
1766
1767 transition({MM_W}, {Transient_GETX, Transient_Local_GETX, Transient_GETS, Transient_Local_GETS}) { // Ignore the request
1768 m_popRequestQueue;
1769 }
1770
1771 // Implement the migratory sharing optimization, even for persistent requests
1772 transition(MM, {Persistent_GETX, Persistent_GETS}, I_L) {
1773 ee_sendDataWithAllTokens;
1774 p_informL2AboutTokenLoss;
1775 l_popPersistentQueue;
1776 }
1777
1778 // ignore persistent requests in lockout period
1779 transition(MM_W, {Persistent_GETX, Persistent_GETS}) {
1780 l_popPersistentQueue;
1781 }
1782
1783 transition(MM_W, Use_TimeoutNoStarvers, MM) {
1784 s_deallocateTBE;
1785 jj_unsetUseTimer;
1786 }
1787
1788 transition(MM_W, Use_TimeoutNoStarvers_NoMig, M) {
1789 s_deallocateTBE;
1790 jj_unsetUseTimer;
1791 }
1792
1793 // Transitions from Dirty Exclusive
1794 transition({M, M_W}, {Load, Ifetch}) {
1795 h_load_hit;
1796 k_popMandatoryQueue;
1797 }
1798
1799 transition(M, Store, MM) {
1800 hh_store_hit;
1801 k_popMandatoryQueue;
1802 }
1803
1804 transition(M, Atomic) {
1805 hh_store_hit;
1806 k_popMandatoryQueue;
1807 }
1808
1809 transition(M_W, Store, MM_W) {
1810 hh_store_hit;
1811 k_popMandatoryQueue;
1812 }
1813
1814 transition(M_W, Atomic) {
1815 hh_store_hit;
1816 k_popMandatoryQueue;
1817 }
1818
1819 transition(M, L1_Replacement, I) {
1820 c_ownedReplacement;
1821 gg_deallocateL1CacheBlock;
1822 }
1823
1824 transition(M, {Transient_GETX, Transient_Local_GETX}, I) {
1825 dd_sendDataWithAllTokens;
1826 p_informL2AboutTokenLoss;
1827 m_popRequestQueue;
1828 }
1829
1830 transition(M, Transient_Local_GETS, O) {
1831 d_sendDataWithToken;
1832 m_popRequestQueue;
1833 }
1834
1835 transition(M, Transient_GETS, O) {
1836 d_sendDataWithNTokenIfAvail;
1837 m_popRequestQueue;
1838 }
1839
1840 transition(M_W, {Transient_GETX, Transient_Local_GETX, Transient_GETS, Transient_Local_GETS}) { // Ignore the request
1841 m_popRequestQueue;
1842 }
1843
1844 transition(M, Persistent_GETX, I_L) {
1845 ee_sendDataWithAllTokens;
1846 p_informL2AboutTokenLoss;
1847 l_popPersistentQueue;
1848 }
1849
1850 transition(M, Persistent_GETS, S_L) {
1851 ff_sendDataWithAllButNorOneTokens;
1852 l_popPersistentQueue;
1853 }
1854
1855 // ignore persistent requests in lockout period
1856 transition(M_W, {Persistent_GETX, Persistent_GETS}) {
1857 l_popPersistentQueue;
1858 }
1859
1860 transition(M_W, Use_TimeoutStarverS, S_L) {
1861 s_deallocateTBE;
1862 ff_sendDataWithAllButNorOneTokens;
1863 jj_unsetUseTimer;
1864 }
1865
1866 // someone unlocked during timeout
1867 transition(M_W, {Use_TimeoutNoStarvers, Use_TimeoutNoStarvers_NoMig}, M) {
1868 s_deallocateTBE;
1869 jj_unsetUseTimer;
1870 }
1871
1872 transition(M_W, Use_TimeoutStarverX, I_L) {
1873 s_deallocateTBE;
1874 ee_sendDataWithAllTokens;
1875 p_informL2AboutTokenLoss;
1876 jj_unsetUseTimer;
1877 }
1878
1879
1880
1881 // migratory
1882 transition(MM_W, {Use_TimeoutStarverX, Use_TimeoutStarverS}, I_L) {
1883 s_deallocateTBE;
1884 ee_sendDataWithAllTokens;
1885 p_informL2AboutTokenLoss;
1886 jj_unsetUseTimer;
1887
1888 }
1889
1890
1891 // Transient_GETX and Transient_GETS in transient states
1892 transition(OM, {Transient_GETX, Transient_Local_GETX, Transient_GETS, Transient_GETS_Last_Token, Transient_Local_GETS_Last_Token, Transient_Local_GETS}) {
1893 m_popRequestQueue; // Even if we have the data, we can pretend we don't have it yet.
1894 }
1895
1896 transition(IS, {Transient_GETX, Transient_Local_GETX}) {
1897 t_sendAckWithCollectedTokens;
1898 m_popRequestQueue;
1899 }
1900
1901 transition(IS, {Transient_GETS, Transient_GETS_Last_Token, Transient_Local_GETS_Last_Token, Transient_Local_GETS}) {
1902 m_popRequestQueue;
1903 }
1904
1905 transition(IS, {Persistent_GETX, Persistent_GETS, Persistent_GETS_Last_Token}, IS_L) {
1906 e_sendAckWithCollectedTokens;
1907 l_popPersistentQueue;
1908 }
1909
1910 transition(IS_L, {Persistent_GETX, Persistent_GETS}) {
1911 l_popPersistentQueue;
1912 }
1913
1914 transition(IM, {Persistent_GETX, Persistent_GETS, Persistent_GETS_Last_Token}, IM_L) {
1915 e_sendAckWithCollectedTokens;
1916 l_popPersistentQueue;
1917 }
1918
1919 transition(IM_L, {Persistent_GETX, Persistent_GETS}) {
1920 l_popPersistentQueue;
1921 }
1922
1923 transition({SM, SM_L}, Persistent_GETX, IM_L) {
1924 e_sendAckWithCollectedTokens;
1925 l_popPersistentQueue;
1926 }
1927
1928 transition(SM, {Persistent_GETS, Persistent_GETS_Last_Token}, SM_L) {
1929 f_sendAckWithAllButNorOneTokens;
1930 l_popPersistentQueue;
1931 }
1932
1933 transition(SM_L, {Persistent_GETS, Persistent_GETS_Last_Token}) {
1934 l_popPersistentQueue;
1935 }
1936
1937 transition(OM, Persistent_GETX, IM_L) {
1938 ee_sendDataWithAllTokens;
1939 l_popPersistentQueue;
1940 }
1941
1942 transition(OM, Persistent_GETS, SM_L) {
1943 ff_sendDataWithAllButNorOneTokens;
1944 l_popPersistentQueue;
1945 }
1946
1947 transition(OM, Persistent_GETS_Last_Token, IM_L) {
1948 fo_sendDataWithOwnerToken;
1949 l_popPersistentQueue;
1950 }
1951
1952 // Transitions from IM/SM
1953
1954 transition({IM, SM}, Ack) {
1955 q_updateTokensFromResponse;
1956 n_popResponseQueue;
1957 }
1958
1959 transition(IM, Data_Shared, SM) {
1960 u_writeDataToCache;
1961 q_updateTokensFromResponse;
1962 n_popResponseQueue;
1963 }
1964
1965 transition(IM, Data_Owner, OM) {
1966 u_writeDataToCache;
1967 q_updateTokensFromResponse;
1968 n_popResponseQueue;
1969 }
1970
1971 transition(IM, Data_All_Tokens, MM_W) {
1972 u_writeDataToCache;
1973 q_updateTokensFromResponse;
1974 xx_external_store_hit;
1975 o_scheduleUseTimeout;
1976 j_unsetReissueTimer;
1977 n_popResponseQueue;
1978 }
1979
1980 transition(SM, Data_Shared) {
1981 w_assertIncomingDataAndCacheDataMatch;
1982 q_updateTokensFromResponse;
1983 n_popResponseQueue;
1984 }
1985
1986 transition(SM, Data_Owner, OM) {
1987 w_assertIncomingDataAndCacheDataMatch;
1988 q_updateTokensFromResponse;
1989 n_popResponseQueue;
1990 }
1991
1992 transition(SM, Data_All_Tokens, MM_W) {
1993 w_assertIncomingDataAndCacheDataMatch;
1994 q_updateTokensFromResponse;
1995 xx_external_store_hit;
1996 o_scheduleUseTimeout;
1997 j_unsetReissueTimer;
1998 n_popResponseQueue;
1999 }
2000
2001 transition({IM, SM}, {Transient_GETX, Transient_Local_GETX}, IM) { // We don't have the data yet, but we might have collected some tokens. We give them up here to avoid livelock
2002 t_sendAckWithCollectedTokens;
2003 m_popRequestQueue;
2004 }
2005
2006 transition({IM, SM}, {Transient_GETS, Transient_GETS_Last_Token, Transient_Local_GETS_Last_Token, Transient_Local_GETS}) {
2007 m_popRequestQueue;
2008 }
2009
2010 transition({IM, SM}, Request_Timeout) {
2011 j_unsetReissueTimer;
2012 b_issueWriteRequest;
2013 }
2014
2015 // Transitions from OM
2016
2017 transition(OM, Ack) {
2018 q_updateTokensFromResponse;
2019 n_popResponseQueue;
2020 }
2021
2022 transition(OM, Ack_All_Tokens, MM_W) {
2023 q_updateTokensFromResponse;
2024 xx_external_store_hit;
2025 o_scheduleUseTimeout;
2026 j_unsetReissueTimer;
2027 n_popResponseQueue;
2028 }
2029
2030 transition(OM, Data_Shared) {
2031 w_assertIncomingDataAndCacheDataMatch;
2032 q_updateTokensFromResponse;
2033 n_popResponseQueue;
2034 }
2035
2036 transition(OM, Data_All_Tokens, MM_W) {
2037 w_assertIncomingDataAndCacheDataMatch;
2038 q_updateTokensFromResponse;
2039 xx_external_store_hit;
2040 o_scheduleUseTimeout;
2041 j_unsetReissueTimer;
2042 n_popResponseQueue;
2043 }
2044
2045 transition(OM, Request_Timeout) {
2046 j_unsetReissueTimer;
2047 b_issueWriteRequest;
2048 }
2049
2050 // Transitions from IS
2051
2052 transition(IS, Ack) {
2053 q_updateTokensFromResponse;
2054 n_popResponseQueue;
2055 }
2056
2057 transition(IS, Data_Shared, S) {
2058 u_writeDataToCache;
2059 q_updateTokensFromResponse;
2060 x_external_load_hit;
2061 s_deallocateTBE;
2062 j_unsetReissueTimer;
2063 n_popResponseQueue;
2064 }
2065
2066 transition(IS, Data_Owner, O) {
2067 u_writeDataToCache;
2068 q_updateTokensFromResponse;
2069 x_external_load_hit;
2070 s_deallocateTBE;
2071 j_unsetReissueTimer;
2072 n_popResponseQueue;
2073 }
2074
2075 transition(IS, Data_All_Tokens, M_W) {
2076 u_writeDataToCache;
2077 q_updateTokensFromResponse;
2078 x_external_load_hit;
2079 o_scheduleUseTimeout;
2080 j_unsetReissueTimer;
2081 n_popResponseQueue;
2082 }
2083
2084 transition(IS, Request_Timeout) {
2085 j_unsetReissueTimer;
2086 a_issueReadRequest;
2087 }
2088
2089 // Transitions from I_L
2090
2091 transition(I_L, Load, IS_L) {
2092 ii_allocateL1DCacheBlock;
2093 i_allocateTBE;
2094 a_issueReadRequest;
2095 uu_profileMiss;
2096 k_popMandatoryQueue;
2097 }
2098
2099 transition(I_L, Ifetch, IS_L) {
2100 pp_allocateL1ICacheBlock;
2101 i_allocateTBE;
2102 a_issueReadRequest;
2103 uu_profileMiss;
2104 k_popMandatoryQueue;
2105 }
2106
2107 transition(I_L, {Store, Atomic}, IM_L) {
2108 ii_allocateL1DCacheBlock;
2109 i_allocateTBE;
2110 b_issueWriteRequest;
2111 uu_profileMiss;
2112 k_popMandatoryQueue;
2113 }
2114
2115
2116 // Transitions from S_L
2117
2118 transition(S_L, {Store, Atomic}, SM_L) {
2119 i_allocateTBE;
2120 b_issueWriteRequest;
2121 uu_profileMiss;
2122 k_popMandatoryQueue;
2123 }
2124
2125 // Other transitions from *_L states
2126
2127 transition({I_L, IM_L, IS_L, S_L, SM_L}, {Transient_GETS, Transient_GETS_Last_Token, Transient_Local_GETS_Last_Token, Transient_Local_GETS, Transient_GETX, Transient_Local_GETX}) {
2128 m_popRequestQueue;
2129 }
2130
2131 transition({I_L, IM_L, IS_L, S_L, SM_L}, Ack) {
2132 g_bounceResponseToStarver;
2133 n_popResponseQueue;
2134 }
2135
2136 transition({I_L, IM_L, S_L, SM_L}, {Data_Shared, Data_Owner}) {
2137 g_bounceResponseToStarver;
2138 n_popResponseQueue;
2139 }
2140
2141 transition({I_L, S_L}, Data_All_Tokens) {
2142 g_bounceResponseToStarver;
2143 n_popResponseQueue;
2144 }
2145
2146 transition(IS_L, Request_Timeout) {
2147 j_unsetReissueTimer;
2148 a_issueReadRequest;
2149 }
2150
2151 transition({IM_L, SM_L}, Request_Timeout) {
2152 j_unsetReissueTimer;
2153 b_issueWriteRequest;
2154 }
2155
2156 // Opportunisticly Complete the memory operation in the following
2157 // cases. Note: these transitions could just use
2158 // g_bounceResponseToStarver, but if we have the data and tokens, we
2159 // might as well complete the memory request while we have the
2160 // chance (and then immediately forward on the data)
2161
2162 transition(IM_L, Data_All_Tokens, MM_W) {
2163 u_writeDataToCache;
2164 q_updateTokensFromResponse;
2165 xx_external_store_hit;
2166 j_unsetReissueTimer;
2167 o_scheduleUseTimeout;
2168 n_popResponseQueue;
2169 }
2170
2171 transition(SM_L, Data_All_Tokens, S_L) {
2172 u_writeDataToCache;
2173 q_updateTokensFromResponse;
2174 xx_external_store_hit;
2175 ff_sendDataWithAllButNorOneTokens;
2176 s_deallocateTBE;
2177 j_unsetReissueTimer;
2178 n_popResponseQueue;
2179 }
2180
2181 transition(IS_L, Data_Shared, I_L) {
2182 u_writeDataToCache;
2183 q_updateTokensFromResponse;
2184 x_external_load_hit;
2185 s_deallocateTBE;
2186 e_sendAckWithCollectedTokens;
2187 p_informL2AboutTokenLoss;
2188 j_unsetReissueTimer;
2189 n_popResponseQueue;
2190 }
2191
2192 transition(IS_L, Data_Owner, I_L) {
2193 u_writeDataToCache;
2194 q_updateTokensFromResponse;
2195 x_external_load_hit;
2196 ee_sendDataWithAllTokens;
2197 s_deallocateTBE;
2198 p_informL2AboutTokenLoss;
2199 j_unsetReissueTimer;
2200 n_popResponseQueue;
2201 }
2202
2203 transition(IS_L, Data_All_Tokens, M_W) {
2204 u_writeDataToCache;
2205 q_updateTokensFromResponse;
2206 x_external_load_hit;
2207 j_unsetReissueTimer;
2208 o_scheduleUseTimeout;
2209 n_popResponseQueue;
2210 }
2211
2212
2213 // Own_Lock_or_Unlock
2214
2215 transition(I_L, Own_Lock_or_Unlock, I) {
2216 l_popPersistentQueue;
2217 }
2218
2219 transition(S_L, Own_Lock_or_Unlock, S) {
2220 l_popPersistentQueue;
2221 }
2222
2223 transition(IM_L, Own_Lock_or_Unlock, IM) {
2224 l_popPersistentQueue;
2225 }
2226
2227 transition(IS_L, Own_Lock_or_Unlock, IS) {
2228 l_popPersistentQueue;
2229 }
2230
2231 transition(SM_L, Own_Lock_or_Unlock, SM) {
2232 l_popPersistentQueue;
2233 }
2234 }
2235