src/mem/protocol/MOESI_CMP_token-L1cache.sm

   1
   2 /*
   3  * Copyright (c) 1999-2005 Mark D. Hill and David A. Wood
   4  * All rights reserved.
   5  *
   6  * Redistribution and use in source and binary forms, with or without
   7  * modification, are permitted provided that the following conditions are
   8  * met: redistributions of source code must retain the above copyright
   9  * notice, this list of conditions and the following disclaimer;
  10  * redistributions in binary form must reproduce the above copyright
  11  * notice, this list of conditions and the following disclaimer in the
  12  * documentation and/or other materials provided with the distribution;
  13  * neither the name of the copyright holders nor the names of its
  14  * contributors may be used to endorse or promote products derived from
  15  * this software without specific prior written permission.
  16  *
  17  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  18  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  19  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  20  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  21  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  22  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  23  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  24  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  25  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  26  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  27  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  28  */
  29
  30 /*
  31  * $Id: MOESI_CMP_token-L1cache.sm 1.22 05/01/19 15:55:39-06:00 beckmann@s0-28.cs.wisc.edu $
  32  *
  33  */
  34
  35 machine(L1Cache, "Token protocol")
  36  : Sequencer * sequencer,
  37    CacheMemory * L1IcacheMemory,
  38    CacheMemory * L1DcacheMemory,
  39    int l2_select_num_bits,
  40    int N_tokens,
  41    int l1_request_latency = 2,
  42    int l1_response_latency = 2,
  43    int retry_threshold = 1,
  44    int fixed_timeout_latency = 100,
  45    bool dynamic_timeout_enabled = true,
  46    bool no_mig_atomic = true
  47 {
  48
  49   // From this node's L1 cache TO the network
  50
  51   // a local L1 -> this L2 bank
  52   MessageBuffer responseFromL1Cache, network="To", virtual_network="4", ordered="false";
  53   MessageBuffer persistentFromL1Cache, network="To", virtual_network="3", ordered="true";
  54   // a local L1 -> this L2 bank, currently ordered with directory forwarded requests
  55   MessageBuffer requestFromL1Cache, network="To", virtual_network="1", ordered="false";
  56
  57
  58   // To this node's L1 cache FROM the network
  59   // a L2 bank -> this L1
  60   MessageBuffer responseToL1Cache, network="From", virtual_network="4", ordered="false";
  61   MessageBuffer persistentToL1Cache, network="From", virtual_network="3", ordered="true";
  62   // a L2 bank -> this L1
  63   MessageBuffer requestToL1Cache, network="From", virtual_network="1", ordered="false";
  64
  65   // STATES
  66   state_declaration(State, desc="Cache states", default="L1Cache_State_I") {
  67     // Base states
  68     NP, AccessPermission:Invalid, "NP", desc="Not Present";
  69     I, AccessPermission:Invalid, "I", desc="Idle";
  70     S, AccessPermission:Read_Only, "S", desc="Shared";
  71     O, AccessPermission:Read_Only, "O", desc="Owned";
  72     M, AccessPermission:Read_Only, "M", desc="Modified (dirty)";
  73     MM, AccessPermission:Read_Write, "MM", desc="Modified (dirty and locally modified)";
  74     M_W, AccessPermission:Read_Only, "M^W", desc="Modified (dirty), waiting";
  75     MM_W, AccessPermission:Read_Write, "MM^W", desc="Modified (dirty and locally modified), waiting";
  76
  77     // Transient States
  78     IM, AccessPermission:Busy, "IM", desc="Issued GetX";
  79     SM, AccessPermission:Read_Only, "SM", desc="Issued GetX, we still have an old copy of the line";
  80     OM, AccessPermission:Read_Only, "OM", desc="Issued GetX, received data";
  81     IS, AccessPermission:Busy, "IS", desc="Issued GetS";
  82
  83     // Locked states
  84     I_L, AccessPermission:Busy, "I^L", desc="Invalid, Locked";
  85     S_L, AccessPermission:Busy, "S^L", desc="Shared, Locked";
  86     IM_L, AccessPermission:Busy, "IM^L", desc="Invalid, Locked, trying to go to Modified";
  87     SM_L, AccessPermission:Busy, "SM^L", desc="Shared, Locked, trying to go to Modified";
  88     IS_L, AccessPermission:Busy, "IS^L", desc="Invalid, Locked, trying to go to Shared";
  89   }
  90
  91   // EVENTS
  92   enumeration(Event, desc="Cache events") {
  93     Load,            desc="Load request from the processor";
  94     Ifetch,          desc="I-fetch request from the processor";
  95     Store,           desc="Store request from the processor";
  96     Atomic,          desc="Atomic request from the processor";
  97     L1_Replacement,  desc="L1 Replacement";
  98
  99     // Responses
 100     Data_Shared,             desc="Received a data message, we are now a sharer";
 101     Data_Owner,              desc="Received a data message, we are now the owner";
 102     Data_All_Tokens,   desc="Received a data message, we are now the owner, we now have all the tokens";
 103     Ack,                     desc="Received an ack message";
 104     Ack_All_Tokens,          desc="Received an ack message, we now have all the tokens";
 105
 106     // Requests
 107     Transient_GETX,  desc="A GetX from another processor";
 108     Transient_Local_GETX,  desc="A GetX from another processor";
 109     Transient_GETS,  desc="A GetS from another processor";
 110     Transient_Local_GETS,  desc="A GetS from another processor";
 111     Transient_GETS_Last_Token,  desc="A GetS from another processor";
 112     Transient_Local_GETS_Last_Token,  desc="A GetS from another processor";
 113
 114     // Lock/Unlock for distributed
 115     Persistent_GETX,     desc="Another processor has priority to read/write";
 116     Persistent_GETS,     desc="Another processor has priority to read";
 117     Persistent_GETS_Last_Token, desc="Another processor has priority to read, no more tokens";
 118     Own_Lock_or_Unlock,  desc="This processor now has priority";
 119
 120     // Triggers
 121     Request_Timeout,         desc="Timeout";
 122     Use_TimeoutStarverX,             desc="Timeout";
 123     Use_TimeoutStarverS,             desc="Timeout";
 124     Use_TimeoutNoStarvers,             desc="Timeout";
 125     Use_TimeoutNoStarvers_NoMig,     desc="Timeout Don't Migrate";
 126   }
 127
 128   // TYPES
 129
 130   // CacheEntry
 131   structure(Entry, desc="...", interface="AbstractCacheEntry") {
 132     State CacheState,        desc="cache state";
 133     bool Dirty,              desc="Is the data dirty (different than memory)?";
 134     int Tokens,              desc="The number of tokens we're holding for the line";
 135     DataBlock DataBlk,       desc="data for the block";
 136   }
 137
 138
 139   // TBE fields
 140   structure(TBE, desc="...") {
 141     Address Address,                      desc="Physical address for this TBE";
 142     State TBEState,                       desc="Transient state";
 143     int IssueCount,      default="0",     desc="The number of times we've issued a request for this line.";
 144     Address PC,                           desc="Program counter of request";
 145
 146     bool WentPersistent, default="false",  desc="Request went persistent";
 147     bool ExternalResponse, default="false", desc="Response came from an external controller";
 148     bool IsAtomic, default="false",       desc="Request was an atomic request";
 149
 150     AccessType AccessType,                desc="Type of request (used for profiling)";
 151     Time IssueTime,                       desc="Time the request was issued";
 152     RubyAccessMode AccessMode,    desc="user/supervisor access type";
 153     PrefetchBit Prefetch,         desc="Is this a prefetch request";
 154   }
 155
 156   structure(TBETable, external="yes") {
 157     TBE lookup(Address);
 158     void allocate(Address);
 159     void deallocate(Address);
 160     bool isPresent(Address);
 161   }
 162
 163   structure(PersistentTable, external="yes") {
 164     void persistentRequestLock(Address, MachineID, AccessType);
 165     void persistentRequestUnlock(Address, MachineID);
 166     bool okToIssueStarving(Address, MachineID);
 167     MachineID findSmallest(Address);
 168     AccessType typeOfSmallest(Address);
 169     void markEntries(Address);
 170     bool isLocked(Address);
 171     int countStarvingForAddress(Address);
 172     int countReadStarvingForAddress(Address);
 173   }
 174
 175   void set_cache_entry(AbstractCacheEntry b);
 176   void unset_cache_entry();
 177   void set_tbe(TBE b);
 178   void unset_tbe();
 179   void wakeUpAllBuffers();
 180   void wakeUpBuffers(Address a);
 181
 182   TBETable L1_TBEs, template_hack="<L1Cache_TBE>";
 183
 184   MessageBuffer mandatoryQueue, ordered="false", abstract_chip_ptr="true";
 185
 186   bool starving, default="false";
 187   int l2_select_low_bit, default="RubySystem::getBlockSizeBits()";
 188
 189   PersistentTable persistentTable;
 190   TimerTable useTimerTable;
 191   TimerTable reissueTimerTable;
 192
 193   int outstandingRequests, default="0";
 194   int outstandingPersistentRequests, default="0";
 195
 196   int averageLatencyHysteresis, default="(8)"; // Constant that provides hysteresis for calculated the estimated average
 197   int averageLatencyCounter, default="(500 << (*m_L1Cache_averageLatencyHysteresis_ptr))";
 198
 199   int averageLatencyEstimate() {
 200     DPRINTF(RubySlicc, "%d\n",
 201             (averageLatencyCounter >> averageLatencyHysteresis));
 202     //profile_average_latency_estimate( (averageLatencyCounter >> averageLatencyHysteresis) );
 203     return averageLatencyCounter >> averageLatencyHysteresis;
 204   }
 205
 206   void updateAverageLatencyEstimate(int latency) {
 207     DPRINTF(RubySlicc, "%d\n", latency);
 208     assert(latency >= 0);
 209
 210     // By subtracting the current average and then adding the most
 211     // recent sample, we calculate an estimate of the recent average.
 212     // If we simply used a running sum and divided by the total number
 213     // of entries, the estimate of the average would adapt very slowly
 214     // after the execution has run for a long time.
 215     // averageLatencyCounter := averageLatencyCounter - averageLatencyEstimate() + latency;
 216
 217     averageLatencyCounter := averageLatencyCounter - averageLatencyEstimate() + latency;
 218   }
 219
 220   Entry getCacheEntry(Address addr), return_by_pointer="yes" {
 221     Entry L1Dcache_entry := static_cast(Entry, "pointer", L1DcacheMemory.lookup(addr));
 222     if(is_valid(L1Dcache_entry)) {
 223       return L1Dcache_entry;
 224     }
 225
 226     Entry L1Icache_entry := static_cast(Entry, "pointer", L1IcacheMemory.lookup(addr));
 227     return L1Icache_entry;
 228   }
 229
 230   Entry getL1DCacheEntry(Address addr), return_by_pointer="yes" {
 231     Entry L1Dcache_entry := static_cast(Entry, "pointer", L1DcacheMemory.lookup(addr));
 232     return L1Dcache_entry;
 233   }
 234
 235   Entry getL1ICacheEntry(Address addr), return_by_pointer="yes" {
 236     Entry L1Icache_entry := static_cast(Entry, "pointer", L1IcacheMemory.lookup(addr));
 237     return L1Icache_entry;
 238   }
 239
 240   int getTokens(Entry cache_entry) {
 241     if (is_valid(cache_entry)) {
 242       return cache_entry.Tokens;
 243     }
 244     return 0;
 245   }
 246
 247   State getState(TBE tbe, Entry cache_entry, Address addr) {
 248
 249     if (is_valid(tbe)) {
 250       return tbe.TBEState;
 251     } else if (is_valid(cache_entry)) {
 252       return cache_entry.CacheState;
 253     } else {
 254       if ((persistentTable.isLocked(addr) == true) && (persistentTable.findSmallest(addr) != machineID)) {
 255       // Not in cache, in persistent table, but this processor isn't highest priority
 256       return State:I_L;
 257       } else {
 258         return State:NP;
 259       }
 260     }
 261   }
 262
 263   void setState(TBE tbe, Entry cache_entry, Address addr, State state) {
 264     assert((L1DcacheMemory.isTagPresent(addr) && L1IcacheMemory.isTagPresent(addr)) == false);
 265
 266     if (is_valid(tbe)) {
 267       assert(state != State:I);
 268       assert(state != State:S);
 269       assert(state != State:O);
 270       assert(state != State:MM);
 271       assert(state != State:M);
 272       tbe.TBEState := state;
 273     }
 274
 275     if (is_valid(cache_entry)) {
 276       // Make sure the token count is in range
 277       assert(cache_entry.Tokens >= 0);
 278       assert(cache_entry.Tokens <= max_tokens());
 279       assert(cache_entry.Tokens != (max_tokens() / 2));
 280
 281       if ((state == State:I_L) ||
 282           (state == State:IM_L) ||
 283           (state == State:IS_L)) {
 284         // Make sure we have no tokens in the "Invalid, locked" states
 285           assert(cache_entry.Tokens == 0);
 286
 287         // Make sure the line is locked
 288         // assert(persistentTable.isLocked(addr));
 289
 290         // But we shouldn't have highest priority for it
 291         // assert(persistentTable.findSmallest(addr) != id);
 292
 293       } else if ((state == State:S_L) ||
 294                  (state == State:SM_L)) {
 295         assert(cache_entry.Tokens >= 1);
 296         assert(cache_entry.Tokens < (max_tokens() / 2));
 297
 298         // Make sure the line is locked...
 299         // assert(persistentTable.isLocked(addr));
 300
 301         // ...But we shouldn't have highest priority for it...
 302         // assert(persistentTable.findSmallest(addr) != id);
 303
 304         // ...And it must be a GETS request
 305         // assert(persistentTable.typeOfSmallest(addr) == AccessType:Read);
 306
 307       } else {
 308
 309         // If there is an entry in the persistent table of this block,
 310         // this processor needs to have an entry in the table for this
 311         // block, and that entry better be the smallest (highest
 312         // priority).  Otherwise, the state should have been one of
 313         // locked states
 314
 315         //if (persistentTable.isLocked(addr)) {
 316         //  assert(persistentTable.findSmallest(addr) == id);
 317         //}
 318       }
 319
 320       // in M and E you have all the tokens
 321       if (state == State:MM || state == State:M || state == State:MM_W || state == State:M_W) {
 322         assert(cache_entry.Tokens == max_tokens());
 323       }
 324
 325       // in NP you have no tokens
 326       if (state == State:NP) {
 327         assert(cache_entry.Tokens == 0);
 328       }
 329
 330       // You have at least one token in S-like states
 331       if (state == State:S || state == State:SM) {
 332         assert(cache_entry.Tokens > 0);
 333       }
 334
 335       // You have at least half the token in O-like states
 336       if (state == State:O && state == State:OM) {
 337         assert(cache_entry.Tokens > (max_tokens() / 2));
 338       }
 339
 340       cache_entry.CacheState := state;
 341     }
 342   }
 343
 344   Event mandatory_request_type_to_event(RubyRequestType type) {
 345     if (type == RubyRequestType:LD) {
 346       return Event:Load;
 347     } else if (type == RubyRequestType:IFETCH) {
 348       return Event:Ifetch;
 349     } else if (type == RubyRequestType:ST) {
 350       return Event:Store;
 351     } else if (type == RubyRequestType:ATOMIC) {
 352       if (no_mig_atomic) {
 353         return Event:Atomic;
 354       } else {
 355         return Event:Store;
 356       }
 357     } else {
 358       error("Invalid RubyRequestType");
 359     }
 360   }
 361
 362   AccessType cache_request_type_to_access_type(RubyRequestType type) {
 363     if ((type == RubyRequestType:LD) || (type == RubyRequestType:IFETCH)) {
 364       return AccessType:Read;
 365     } else if ((type == RubyRequestType:ST) || (type == RubyRequestType:ATOMIC)) {
 366       return AccessType:Write;
 367     } else {
 368       error("Invalid RubyRequestType");
 369     }
 370   }
 371
 372   GenericMachineType getNondirectHitMachType(Address addr, MachineID sender) {
 373     if (machineIDToMachineType(sender) == MachineType:L1Cache) {
 374       //
 375       // NOTE direct local hits should not call this
 376       //
 377       return GenericMachineType:L1Cache_wCC;
 378     } else if (machineIDToMachineType(sender) == MachineType:L2Cache) {
 379
 380       if (sender == (mapAddressToRange(addr,
 381                                        MachineType:L2Cache,
 382                                        l2_select_low_bit,
 383                                        l2_select_num_bits))) {
 384
 385         return GenericMachineType:L2Cache;
 386       } else {
 387         return GenericMachineType:L2Cache_wCC;
 388       }
 389     } else {
 390       return ConvertMachToGenericMach(machineIDToMachineType(sender));
 391     }
 392   }
 393
 394   bool okToIssueStarving(Address addr, MachineID machinID) {
 395     return persistentTable.okToIssueStarving(addr, machineID);
 396   }
 397
 398   void markPersistentEntries(Address addr) {
 399     persistentTable.markEntries(addr);
 400   }
 401
 402   void setExternalResponse(TBE tbe) {
 403     assert(is_valid(tbe));
 404     tbe.ExternalResponse := true;
 405   }
 406
 407   bool IsAtomic(TBE tbe) {
 408     assert(is_valid(tbe));
 409     return tbe.IsAtomic;
 410   }
 411
 412   // ** OUT_PORTS **
 413   out_port(persistentNetwork_out, PersistentMsg, persistentFromL1Cache);
 414   out_port(requestNetwork_out, RequestMsg, requestFromL1Cache);
 415   out_port(responseNetwork_out, ResponseMsg, responseFromL1Cache);
 416   out_port(requestRecycle_out, RequestMsg, requestToL1Cache);
 417
 418   // ** IN_PORTS **
 419
 420   // Use Timer
 421   in_port(useTimerTable_in, Address, useTimerTable, rank=5) {
 422     if (useTimerTable_in.isReady()) {
 423       TBE tbe := L1_TBEs[useTimerTable.readyAddress()];
 424
 425       if (persistentTable.isLocked(useTimerTable.readyAddress()) &&
 426           (persistentTable.findSmallest(useTimerTable.readyAddress()) != machineID)) {
 427         if (persistentTable.typeOfSmallest(useTimerTable.readyAddress()) == AccessType:Write) {
 428           trigger(Event:Use_TimeoutStarverX, useTimerTable.readyAddress(),
 429                   getCacheEntry(useTimerTable.readyAddress()), tbe);
 430         } else {
 431           trigger(Event:Use_TimeoutStarverS, useTimerTable.readyAddress(),
 432                   getCacheEntry(useTimerTable.readyAddress()), tbe);
 433         }
 434       } else {
 435         if (no_mig_atomic && IsAtomic(tbe)) {
 436           trigger(Event:Use_TimeoutNoStarvers_NoMig, useTimerTable.readyAddress(),
 437                   getCacheEntry(useTimerTable.readyAddress()), tbe);
 438         } else {
 439           trigger(Event:Use_TimeoutNoStarvers, useTimerTable.readyAddress(),
 440                   getCacheEntry(useTimerTable.readyAddress()), tbe);
 441         }
 442       }
 443     }
 444   }
 445
 446   // Reissue Timer
 447   in_port(reissueTimerTable_in, Address, reissueTimerTable, rank=4) {
 448     if (reissueTimerTable_in.isReady()) {
 449       trigger(Event:Request_Timeout, reissueTimerTable.readyAddress(),
 450               getCacheEntry(reissueTimerTable.readyAddress()),
 451               L1_TBEs[reissueTimerTable.readyAddress()]);
 452     }
 453   }
 454
 455   // Persistent Network
 456   in_port(persistentNetwork_in, PersistentMsg, persistentToL1Cache, rank=3) {
 457     if (persistentNetwork_in.isReady()) {
 458       peek(persistentNetwork_in, PersistentMsg, block_on="Address") {
 459         assert(in_msg.Destination.isElement(machineID));
 460
 461         // Apply the lockdown or unlockdown message to the table
 462         if (in_msg.Type == PersistentRequestType:GETX_PERSISTENT) {
 463           persistentTable.persistentRequestLock(in_msg.Address, in_msg.Requestor, AccessType:Write);
 464         } else if (in_msg.Type == PersistentRequestType:GETS_PERSISTENT) {
 465           persistentTable.persistentRequestLock(in_msg.Address, in_msg.Requestor, AccessType:Read);
 466         } else if (in_msg.Type == PersistentRequestType:DEACTIVATE_PERSISTENT) {
 467           persistentTable.persistentRequestUnlock(in_msg.Address, in_msg.Requestor);
 468         } else {
 469           error("Unexpected message");
 470         }
 471
 472         // React to the message based on the current state of the table
 473         Entry cache_entry := getCacheEntry(in_msg.Address);
 474         TBE tbe := L1_TBEs[in_msg.Address];
 475
 476         if (persistentTable.isLocked(in_msg.Address)) {
 477           if (persistentTable.findSmallest(in_msg.Address) == machineID) {
 478             // Our Own Lock - this processor is highest priority
 479             trigger(Event:Own_Lock_or_Unlock, in_msg.Address,
 480                     cache_entry, tbe);
 481           } else {
 482             if (persistentTable.typeOfSmallest(in_msg.Address) == AccessType:Read) {
 483               if (getTokens(cache_entry) == 1 ||
 484                   getTokens(cache_entry) == (max_tokens() / 2) + 1) {
 485                 trigger(Event:Persistent_GETS_Last_Token, in_msg.Address,
 486                         cache_entry, tbe);
 487               } else {
 488                 trigger(Event:Persistent_GETS, in_msg.Address,
 489                         cache_entry, tbe);
 490               }
 491             } else {
 492               trigger(Event:Persistent_GETX, in_msg.Address,
 493                       cache_entry, tbe);
 494             }
 495           }
 496         } else {
 497           // Unlock case - no entries in the table
 498           trigger(Event:Own_Lock_or_Unlock, in_msg.Address,
 499                   cache_entry, tbe);
 500         }
 501       }
 502     }
 503   }
 504
 505   // Response Network
 506   in_port(responseNetwork_in, ResponseMsg, responseToL1Cache, rank=2) {
 507     if (responseNetwork_in.isReady()) {
 508       peek(responseNetwork_in, ResponseMsg, block_on="Address") {
 509         assert(in_msg.Destination.isElement(machineID));
 510
 511         Entry cache_entry := getCacheEntry(in_msg.Address);
 512         TBE tbe := L1_TBEs[in_msg.Address];
 513
 514         // Mark TBE flag if response received off-chip.  Use this to update average latency estimate
 515         if ( machineIDToMachineType(in_msg.Sender) == MachineType:L2Cache ) {
 516
 517           if (in_msg.Sender == mapAddressToRange(in_msg.Address,
 518                                                  MachineType:L2Cache,
 519                                                  l2_select_low_bit,
 520                                                  l2_select_num_bits)) {
 521
 522             // came from an off-chip L2 cache
 523             if (is_valid(tbe)) {
 524                // L1_TBEs[in_msg.Address].ExternalResponse := true;
 525                // profile_offchipL2_response(in_msg.Address);
 526             }
 527           }
 528           else {
 529                // profile_onchipL2_response(in_msg.Address );
 530           }
 531         } else if ( machineIDToMachineType(in_msg.Sender) == MachineType:Directory ) {
 532           if (is_valid(tbe)) {
 533             setExternalResponse(tbe);
 534             // profile_memory_response( in_msg.Address);
 535           }
 536         } else if ( machineIDToMachineType(in_msg.Sender) == MachineType:L1Cache) {
 537           //if (isLocalProcessor(machineID, in_msg.Sender) == false) {
 538             //if (is_valid(tbe)) {
 539                // tbe.ExternalResponse := true;
 540                // profile_offchipL1_response(in_msg.Address );
 541             //}
 542           //}
 543           //else {
 544                // profile_onchipL1_response(in_msg.Address );
 545           //}
 546         } else {
 547           error("unexpected SenderMachine");
 548         }
 549
 550
 551         if (getTokens(cache_entry) + in_msg.Tokens != max_tokens()) {
 552           if (in_msg.Type == CoherenceResponseType:ACK) {
 553             assert(in_msg.Tokens < (max_tokens() / 2));
 554             trigger(Event:Ack, in_msg.Address, cache_entry, tbe);
 555           } else if (in_msg.Type == CoherenceResponseType:DATA_OWNER) {
 556             trigger(Event:Data_Owner, in_msg.Address, cache_entry, tbe);
 557           } else if (in_msg.Type == CoherenceResponseType:DATA_SHARED) {
 558             assert(in_msg.Tokens < (max_tokens() / 2));
 559             trigger(Event:Data_Shared, in_msg.Address, cache_entry, tbe);
 560           } else {
 561             error("Unexpected message");
 562           }
 563         } else {
 564           if (in_msg.Type == CoherenceResponseType:ACK) {
 565             assert(in_msg.Tokens < (max_tokens() / 2));
 566             trigger(Event:Ack_All_Tokens, in_msg.Address, cache_entry, tbe);
 567           } else if (in_msg.Type == CoherenceResponseType:DATA_OWNER || in_msg.Type == CoherenceResponseType:DATA_SHARED) {
 568             trigger(Event:Data_All_Tokens, in_msg.Address, cache_entry, tbe);
 569           } else {
 570             error("Unexpected message");
 571           }
 572         }
 573       }
 574     }
 575   }
 576
 577   // Request Network
 578   in_port(requestNetwork_in, RequestMsg, requestToL1Cache) {
 579     if (requestNetwork_in.isReady()) {
 580       peek(requestNetwork_in, RequestMsg, block_on="Address") {
 581         assert(in_msg.Destination.isElement(machineID));
 582
 583         Entry cache_entry := getCacheEntry(in_msg.Address);
 584         TBE tbe := L1_TBEs[in_msg.Address];
 585
 586         if (in_msg.Type == CoherenceRequestType:GETX) {
 587           if (in_msg.isLocal) {
 588             trigger(Event:Transient_Local_GETX, in_msg.Address,
 589                     cache_entry, tbe);
 590           }
 591           else {
 592             trigger(Event:Transient_GETX, in_msg.Address,
 593                     cache_entry, tbe);
 594           }
 595         } else if (in_msg.Type == CoherenceRequestType:GETS) {
 596           if (getTokens(cache_entry) == 1 ||
 597               getTokens(cache_entry) == (max_tokens() / 2) + 1) {
 598             if (in_msg.isLocal) {
 599               trigger(Event:Transient_Local_GETS_Last_Token, in_msg.Address,
 600                       cache_entry, tbe);
 601             }
 602             else {
 603               trigger(Event:Transient_GETS_Last_Token, in_msg.Address,
 604                       cache_entry, tbe);
 605             }
 606           }
 607           else {
 608             if (in_msg.isLocal) {
 609               trigger(Event:Transient_Local_GETS, in_msg.Address,
 610                       cache_entry, tbe);
 611             }
 612             else {
 613               trigger(Event:Transient_GETS, in_msg.Address,
 614                       cache_entry, tbe);
 615             }
 616           }
 617         } else {
 618           error("Unexpected message");
 619         }
 620       }
 621     }
 622   }
 623
 624   // Mandatory Queue
 625   in_port(mandatoryQueue_in, RubyRequest, mandatoryQueue, desc="...", rank=0) {
 626     if (mandatoryQueue_in.isReady()) {
 627       peek(mandatoryQueue_in, RubyRequest, block_on="LineAddress") {
 628         // Check for data access to blocks in I-cache and ifetchs to blocks in D-cache
 629
 630         TBE tbe := L1_TBEs[in_msg.LineAddress];
 631
 632         if (in_msg.Type == RubyRequestType:IFETCH) {
 633           // ** INSTRUCTION ACCESS ***
 634
 635           Entry L1Icache_entry := getL1ICacheEntry(in_msg.LineAddress);
 636           if (is_valid(L1Icache_entry)) {
 637             // The tag matches for the L1, so the L1 fetches the line.  We know it can't be in the L2 due to exclusion
 638             trigger(mandatory_request_type_to_event(in_msg.Type),
 639                     in_msg.LineAddress, L1Icache_entry, tbe);
 640           } else {
 641
 642             // Check to see if it is in the OTHER L1
 643             Entry L1Dcache_entry := getL1DCacheEntry(in_msg.LineAddress);
 644             if (is_valid(L1Dcache_entry)) {
 645               // The block is in the wrong L1, try to write it to the L2
 646                 trigger(Event:L1_Replacement, in_msg.LineAddress,
 647                         L1Dcache_entry, tbe);
 648             }
 649
 650             if (L1IcacheMemory.cacheAvail(in_msg.LineAddress)) {
 651               // L1 does't have the line, but we have space for it in the L1
 652               trigger(mandatory_request_type_to_event(in_msg.Type),
 653                       in_msg.LineAddress, L1Icache_entry, tbe);
 654             } else {
 655               // No room in the L1, so we need to make room
 656               trigger(Event:L1_Replacement,
 657                       L1IcacheMemory.cacheProbe(in_msg.LineAddress),
 658                       getL1ICacheEntry(L1IcacheMemory.cacheProbe(in_msg.LineAddress)),
 659                       L1_TBEs[L1IcacheMemory.cacheProbe(in_msg.LineAddress)]);
 660             }
 661           }
 662         } else {
 663           // *** DATA ACCESS ***
 664
 665           Entry L1Dcache_entry := getL1DCacheEntry(in_msg.LineAddress);
 666           if (is_valid(L1Dcache_entry)) {
 667             // The tag matches for the L1, so the L1 fetches the line.  We know it can't be in the L2 due to exclusion
 668             trigger(mandatory_request_type_to_event(in_msg.Type),
 669                     in_msg.LineAddress, L1Dcache_entry, tbe);
 670           } else {
 671
 672             // Check to see if it is in the OTHER L1
 673             Entry L1Icache_entry := getL1ICacheEntry(in_msg.LineAddress);
 674             if (is_valid(L1Icache_entry)) {
 675               // The block is in the wrong L1, try to write it to the L2
 676               trigger(Event:L1_Replacement, in_msg.LineAddress,
 677                       L1Icache_entry, tbe);
 678             }
 679
 680             if (L1DcacheMemory.cacheAvail(in_msg.LineAddress)) {
 681               // L1 does't have the line, but we have space for it in the L1
 682               trigger(mandatory_request_type_to_event(in_msg.Type),
 683                       in_msg.LineAddress, L1Dcache_entry, tbe);
 684             } else {
 685               // No room in the L1, so we need to make room
 686               trigger(Event:L1_Replacement,
 687                       L1DcacheMemory.cacheProbe(in_msg.LineAddress),
 688                       getL1DCacheEntry(L1DcacheMemory.cacheProbe(in_msg.LineAddress)),
 689                       L1_TBEs[L1DcacheMemory.cacheProbe(in_msg.LineAddress)]);
 690             }
 691           }
 692         }
 693       }
 694     }
 695   }
 696
 697   // ACTIONS
 698
 699   action(a_issueReadRequest, "a", desc="Issue GETS") {
 700       assert(is_valid(tbe));
 701       if (tbe.IssueCount == 0) {
 702         // Update outstanding requests
 703         //profile_outstanding_request(outstandingRequests);
 704         outstandingRequests := outstandingRequests + 1;
 705       }
 706
 707       if (tbe.IssueCount >= retry_threshold) {
 708         // Issue a persistent request if possible
 709         if (okToIssueStarving(address, machineID) && (starving == false)) {
 710           enqueue(persistentNetwork_out, PersistentMsg, latency = l1_request_latency) {
 711             out_msg.Address := address;
 712             out_msg.Type := PersistentRequestType:GETS_PERSISTENT;
 713             out_msg.Requestor := machineID;
 714             out_msg.Destination.broadcast(MachineType:L1Cache);
 715
 716             //
 717             // Currently the configuration system limits the system to only one
 718             // chip.  Therefore, if we assume one shared L2 cache, then only one
 719             // pertinent L2 cache exist.
 720             //
 721             //out_msg.Destination.addNetDest(getAllPertinentL2Banks(address));
 722
 723             out_msg.Destination.add(mapAddressToRange(address,
 724                                                       MachineType:L2Cache,
 725                                                       l2_select_low_bit,
 726                                                       l2_select_num_bits));
 727
 728             out_msg.Destination.add(map_Address_to_Directory(address));
 729             out_msg.MessageSize := MessageSizeType:Persistent_Control;
 730             out_msg.Prefetch := tbe.Prefetch;
 731             out_msg.AccessMode := tbe.AccessMode;
 732           }
 733           markPersistentEntries(address);
 734           starving := true;
 735
 736           if (tbe.IssueCount == 0) {
 737             //profile_persistent_prediction(address, tbe.AccessType);
 738           }
 739
 740           // Update outstanding requests
 741           //profile_outstanding_persistent_request(outstandingPersistentRequests);
 742           outstandingPersistentRequests := outstandingPersistentRequests + 1;
 743
 744           // Increment IssueCount
 745           tbe.IssueCount := tbe.IssueCount + 1;
 746
 747           tbe.WentPersistent := true;
 748
 749           // Do not schedule a wakeup, a persistent requests will always complete
 750         }
 751         else {
 752
 753           // We'd like to issue a persistent request, but are not allowed
 754           // to issue a P.R. right now.  This, we do not increment the
 755           // IssueCount.
 756
 757           // Set a wakeup timer
 758           reissueTimerTable.set(address, 10);
 759
 760         }
 761       } else {
 762         // Make a normal request
 763         enqueue(requestNetwork_out, RequestMsg, latency = l1_request_latency) {
 764           out_msg.Address := address;
 765           out_msg.Type := CoherenceRequestType:GETS;
 766           out_msg.Requestor := machineID;
 767           out_msg.Destination.add(mapAddressToRange(address,
 768                                                     MachineType:L2Cache,
 769                                                     l2_select_low_bit,
 770                                                     l2_select_num_bits));
 771
 772           out_msg.RetryNum := tbe.IssueCount;
 773           if (tbe.IssueCount == 0) {
 774             out_msg.MessageSize := MessageSizeType:Request_Control;
 775           } else {
 776             out_msg.MessageSize := MessageSizeType:Reissue_Control;
 777           }
 778           out_msg.Prefetch := tbe.Prefetch;
 779           out_msg.AccessMode := tbe.AccessMode;
 780         }
 781
 782         // send to other local L1s, with local bit set
 783         enqueue(requestNetwork_out, RequestMsg, latency = l1_request_latency) {
 784           out_msg.Address := address;
 785           out_msg.Type := CoherenceRequestType:GETS;
 786           out_msg.Requestor := machineID;
 787           //
 788           // Since only one chip, assuming all L1 caches are local
 789           //
 790           //out_msg.Destination := getOtherLocalL1IDs(machineID);
 791           out_msg.Destination.broadcast(MachineType:L1Cache);
 792           out_msg.Destination.remove(machineID);
 793
 794           out_msg.RetryNum := tbe.IssueCount;
 795           out_msg.isLocal := true;
 796           if (tbe.IssueCount == 0) {
 797             out_msg.MessageSize := MessageSizeType:Broadcast_Control;
 798           } else {
 799             out_msg.MessageSize := MessageSizeType:Broadcast_Control;
 800           }
 801           out_msg.Prefetch := tbe.Prefetch;
 802           out_msg.AccessMode := tbe.AccessMode;
 803         }
 804
 805         // Increment IssueCount
 806         tbe.IssueCount := tbe.IssueCount + 1;
 807
 808         // Set a wakeup timer
 809
 810         if (dynamic_timeout_enabled) {
 811           reissueTimerTable.set(address, 1.25 * averageLatencyEstimate());
 812         } else {
 813           reissueTimerTable.set(address, fixed_timeout_latency);
 814         }
 815
 816       }
 817   }
 818
 819   action(b_issueWriteRequest, "b", desc="Issue GETX") {
 820
 821       assert(is_valid(tbe));
 822       if (tbe.IssueCount == 0) {
 823         // Update outstanding requests
 824         //profile_outstanding_request(outstandingRequests);
 825         outstandingRequests := outstandingRequests + 1;
 826       }
 827
 828       if (tbe.IssueCount >= retry_threshold) {
 829         // Issue a persistent request if possible
 830         if ( okToIssueStarving(address, machineID) && (starving == false)) {
 831           enqueue(persistentNetwork_out, PersistentMsg, latency = l1_request_latency) {
 832             out_msg.Address := address;
 833             out_msg.Type := PersistentRequestType:GETX_PERSISTENT;
 834             out_msg.Requestor := machineID;
 835             out_msg.Destination.broadcast(MachineType:L1Cache);
 836
 837             //
 838             // Currently the configuration system limits the system to only one
 839             // chip.  Therefore, if we assume one shared L2 cache, then only one
 840             // pertinent L2 cache exist.
 841             //
 842             //out_msg.Destination.addNetDest(getAllPertinentL2Banks(address));
 843
 844             out_msg.Destination.add(mapAddressToRange(address,
 845                                                       MachineType:L2Cache,
 846                                                       l2_select_low_bit,
 847                                                       l2_select_num_bits));
 848
 849             out_msg.Destination.add(map_Address_to_Directory(address));
 850             out_msg.MessageSize := MessageSizeType:Persistent_Control;
 851             out_msg.Prefetch := tbe.Prefetch;
 852             out_msg.AccessMode := tbe.AccessMode;
 853           }
 854           markPersistentEntries(address);
 855           starving := true;
 856
 857           // Update outstanding requests
 858           //profile_outstanding_persistent_request(outstandingPersistentRequests);
 859           outstandingPersistentRequests := outstandingPersistentRequests + 1;
 860
 861           if (tbe.IssueCount == 0) {
 862             //profile_persistent_prediction(address, tbe.AccessType);
 863           }
 864
 865           // Increment IssueCount
 866           tbe.IssueCount := tbe.IssueCount + 1;
 867
 868           tbe.WentPersistent := true;
 869
 870           // Do not schedule a wakeup, a persistent requests will always complete
 871         }
 872         else {
 873
 874           // We'd like to issue a persistent request, but are not allowed
 875           // to issue a P.R. right now.  This, we do not increment the
 876           // IssueCount.
 877
 878           // Set a wakeup timer
 879           reissueTimerTable.set(address, 10);
 880         }
 881
 882
 883       } else  {
 884         // Make a normal request
 885         enqueue(requestNetwork_out, RequestMsg, latency = l1_request_latency) {
 886           out_msg.Address := address;
 887           out_msg.Type := CoherenceRequestType:GETX;
 888           out_msg.Requestor := machineID;
 889
 890           out_msg.Destination.add(mapAddressToRange(address,
 891                                                     MachineType:L2Cache,
 892                                                     l2_select_low_bit,
 893                                                     l2_select_num_bits));
 894
 895           out_msg.RetryNum := tbe.IssueCount;
 896
 897           if (tbe.IssueCount == 0) {
 898             out_msg.MessageSize := MessageSizeType:Request_Control;
 899           } else {
 900             out_msg.MessageSize := MessageSizeType:Reissue_Control;
 901           }
 902           out_msg.Prefetch := tbe.Prefetch;
 903           out_msg.AccessMode := tbe.AccessMode;
 904         }
 905
 906         // send to other local L1s too
 907         enqueue(requestNetwork_out, RequestMsg, latency = l1_request_latency) {
 908           out_msg.Address := address;
 909           out_msg.Type := CoherenceRequestType:GETX;
 910           out_msg.Requestor := machineID;
 911           out_msg.isLocal := true;
 912
 913           //
 914           // Since only one chip, assuming all L1 caches are local
 915           //
 916           //out_msg.Destination := getOtherLocalL1IDs(machineID);
 917           out_msg.Destination.broadcast(MachineType:L1Cache);
 918           out_msg.Destination.remove(machineID);
 919
 920           out_msg.RetryNum := tbe.IssueCount;
 921           if (tbe.IssueCount == 0) {
 922             out_msg.MessageSize := MessageSizeType:Broadcast_Control;
 923           } else {
 924             out_msg.MessageSize := MessageSizeType:Broadcast_Control;
 925           }
 926           out_msg.Prefetch := tbe.Prefetch;
 927           out_msg.AccessMode := tbe.AccessMode;
 928         }
 929
 930         // Increment IssueCount
 931         tbe.IssueCount := tbe.IssueCount + 1;
 932
 933         DPRINTF(RubySlicc, "incremented issue count to %d\n",
 934                 tbe.IssueCount);
 935
 936         // Set a wakeup timer
 937         if (dynamic_timeout_enabled) {
 938           reissueTimerTable.set(address, 1.25 * averageLatencyEstimate());
 939         } else {
 940           reissueTimerTable.set(address, fixed_timeout_latency);
 941         }
 942       }
 943   }
 944
 945   action(bb_bounceResponse, "\b", desc="Bounce tokens and data to memory") {
 946     peek(responseNetwork_in, ResponseMsg) {
 947       // FIXME, should use a 3rd vnet
 948       enqueue(responseNetwork_out, ResponseMsg, latency="1") {
 949         out_msg.Address := address;
 950         out_msg.Type := in_msg.Type;
 951         out_msg.Sender := machineID;
 952         out_msg.Destination.add(map_Address_to_Directory(address));
 953         out_msg.Tokens := in_msg.Tokens;
 954         out_msg.MessageSize := in_msg.MessageSize;
 955         out_msg.DataBlk := in_msg.DataBlk;
 956         out_msg.Dirty := in_msg.Dirty;
 957       }
 958     }
 959   }
 960
 961   action(c_ownedReplacement, "c", desc="Issue writeback") {
 962     assert(is_valid(cache_entry));
 963     enqueue(responseNetwork_out, ResponseMsg, latency = l1_response_latency) {
 964       out_msg.Address := address;
 965       out_msg.Sender := machineID;
 966
 967       out_msg.Destination.add(mapAddressToRange(address,
 968                                                 MachineType:L2Cache,
 969                                                 l2_select_low_bit,
 970                                                 l2_select_num_bits));
 971
 972       out_msg.Tokens := cache_entry.Tokens;
 973       out_msg.DataBlk := cache_entry.DataBlk;
 974       out_msg.Dirty := cache_entry.Dirty;
 975       out_msg.Type := CoherenceResponseType:WB_OWNED;
 976
 977       // always send the data?
 978       out_msg.MessageSize := MessageSizeType:Writeback_Data;
 979     }
 980     cache_entry.Tokens := 0;
 981   }
 982
 983   action(cc_sharedReplacement, "\c", desc="Issue shared writeback") {
 984
 985     // don't send writeback if replacing block with no tokens
 986     assert(is_valid(cache_entry));
 987     assert (cache_entry.Tokens > 0);
 988     enqueue(responseNetwork_out, ResponseMsg, latency = l1_response_latency) {
 989         out_msg.Address := address;
 990         out_msg.Sender := machineID;
 991
 992         out_msg.Destination.add(mapAddressToRange(address,
 993                                                   MachineType:L2Cache,
 994                                                   l2_select_low_bit,
 995                                                   l2_select_num_bits));
 996
 997         out_msg.Tokens := cache_entry.Tokens;
 998         out_msg.DataBlk := cache_entry.DataBlk;
 999         // assert(cache_entry.Dirty == false);
1000         out_msg.Dirty := false;
1001
1002         out_msg.MessageSize := MessageSizeType:Writeback_Data;
1003         out_msg.Type := CoherenceResponseType:WB_SHARED_DATA;
1004     }
1005     cache_entry.Tokens := 0;
1006   }
1007
1008   action(tr_tokenReplacement, "tr", desc="Issue token writeback") {
1009     assert(is_valid(cache_entry));
1010     if (cache_entry.Tokens > 0) {
1011       enqueue(responseNetwork_out, ResponseMsg, latency = l1_response_latency) {
1012         out_msg.Address := address;
1013         out_msg.Sender := machineID;
1014
1015         out_msg.Destination.add(mapAddressToRange(address,
1016                                                   MachineType:L2Cache,
1017                                                   l2_select_low_bit,
1018                                                   l2_select_num_bits));
1019
1020         out_msg.Tokens := cache_entry.Tokens;
1021         out_msg.DataBlk := cache_entry.DataBlk;
1022         // assert(cache_entry.Dirty == false);
1023         out_msg.Dirty := false;
1024
1025         // always send the data?
1026         out_msg.MessageSize := MessageSizeType:Writeback_Control;
1027         out_msg.Type := CoherenceResponseType:WB_TOKENS;
1028       }
1029     }
1030     cache_entry.Tokens := 0;
1031   }
1032
1033
1034   action(d_sendDataWithToken, "d", desc="Send data and a token from cache to requestor") {
1035     assert(is_valid(cache_entry));
1036     peek(requestNetwork_in, RequestMsg) {
1037       enqueue(responseNetwork_out, ResponseMsg, latency = l1_response_latency) {
1038         out_msg.Address := address;
1039         out_msg.Type := CoherenceResponseType:DATA_SHARED;
1040         out_msg.Sender := machineID;
1041         out_msg.Destination.add(in_msg.Requestor);
1042         out_msg.Tokens := 1;
1043         out_msg.DataBlk := cache_entry.DataBlk;
1044         // out_msg.Dirty := cache_entry.Dirty;
1045         out_msg.Dirty := false;
1046         if (in_msg.isLocal) {
1047           out_msg.MessageSize := MessageSizeType:ResponseLocal_Data;
1048         } else {
1049           out_msg.MessageSize := MessageSizeType:Response_Data;
1050         }
1051       }
1052     }
1053     cache_entry.Tokens := cache_entry.Tokens - 1;
1054     assert(cache_entry.Tokens >= 1);
1055   }
1056
1057   action(d_sendDataWithNTokenIfAvail, "\dd", desc="Send data and a token from cache to requestor") {
1058     assert(is_valid(cache_entry));
1059     peek(requestNetwork_in, RequestMsg) {
1060       if (cache_entry.Tokens > (N_tokens + (max_tokens() / 2))) {
1061         enqueue(responseNetwork_out, ResponseMsg, latency = l1_response_latency) {
1062           out_msg.Address := address;
1063           out_msg.Type := CoherenceResponseType:DATA_SHARED;
1064           out_msg.Sender := machineID;
1065           out_msg.Destination.add(in_msg.Requestor);
1066           out_msg.Tokens := N_tokens;
1067           out_msg.DataBlk := cache_entry.DataBlk;
1068           // out_msg.Dirty := cache_entry.Dirty;
1069           out_msg.Dirty := false;
1070           if (in_msg.isLocal) {
1071             out_msg.MessageSize := MessageSizeType:ResponseLocal_Data;
1072           } else {
1073             out_msg.MessageSize := MessageSizeType:Response_Data;
1074           }
1075         }
1076         cache_entry.Tokens := cache_entry.Tokens - N_tokens;
1077       }
1078       else if (cache_entry.Tokens > 1) {
1079         enqueue(responseNetwork_out, ResponseMsg, latency = l1_response_latency) {
1080           out_msg.Address := address;
1081           out_msg.Type := CoherenceResponseType:DATA_SHARED;
1082           out_msg.Sender := machineID;
1083           out_msg.Destination.add(in_msg.Requestor);
1084           out_msg.Tokens := 1;
1085           out_msg.DataBlk := cache_entry.DataBlk;
1086           // out_msg.Dirty := cache_entry.Dirty;
1087           out_msg.Dirty := false;
1088           if (in_msg.isLocal) {
1089             out_msg.MessageSize := MessageSizeType:ResponseLocal_Data;
1090           } else {
1091             out_msg.MessageSize := MessageSizeType:Response_Data;
1092           }
1093         }
1094         cache_entry.Tokens := cache_entry.Tokens - 1;
1095       }
1096     }
1097 //    assert(cache_entry.Tokens >= 1);
1098   }
1099
1100   action(dd_sendDataWithAllTokens, "\d", desc="Send data and all tokens from cache to requestor") {
1101     peek(requestNetwork_in, RequestMsg) {
1102     assert(is_valid(cache_entry));
1103       enqueue(responseNetwork_out, ResponseMsg, latency = l1_response_latency) {
1104         out_msg.Address := address;
1105         out_msg.Type := CoherenceResponseType:DATA_OWNER;
1106         out_msg.Sender := machineID;
1107         out_msg.Destination.add(in_msg.Requestor);
1108         assert(cache_entry.Tokens > (max_tokens() / 2));
1109         out_msg.Tokens := cache_entry.Tokens;
1110         out_msg.DataBlk := cache_entry.DataBlk;
1111         out_msg.Dirty := cache_entry.Dirty;
1112         if (in_msg.isLocal) {
1113           out_msg.MessageSize := MessageSizeType:ResponseLocal_Data;
1114         } else {
1115           out_msg.MessageSize := MessageSizeType:Response_Data;
1116         }
1117       }
1118     }
1119     cache_entry.Tokens := 0;
1120   }
1121
1122   action(e_sendAckWithCollectedTokens, "e", desc="Send ack with the tokens we've collected thus far.") {
1123     // assert(persistentTable.findSmallest(address) != id); // Make sure we never bounce tokens to ourself
1124     assert(is_valid(cache_entry));
1125     if (cache_entry.Tokens > 0) {
1126       enqueue(responseNetwork_out, ResponseMsg, latency = l1_response_latency) {
1127         out_msg.Address := address;
1128         if (cache_entry.Tokens > (max_tokens() / 2)) {
1129           out_msg.Type := CoherenceResponseType:DATA_OWNER;
1130         } else {
1131           out_msg.Type := CoherenceResponseType:ACK;
1132         }
1133         out_msg.Sender := machineID;
1134         out_msg.Destination.add(persistentTable.findSmallest(address));
1135         assert(cache_entry.Tokens >= 1);
1136         out_msg.Tokens := cache_entry.Tokens;
1137         out_msg.DataBlk := cache_entry.DataBlk;
1138         out_msg.MessageSize := MessageSizeType:Response_Control;
1139       }
1140     }
1141     cache_entry.Tokens := 0;
1142   }
1143
1144   action(ee_sendDataWithAllTokens, "\e", desc="Send data and all tokens from cache to starver") {
1145     //assert(persistentTable.findSmallest(address) != id); // Make sure we never bounce tokens to ourself
1146     assert(is_valid(cache_entry));
1147     assert(cache_entry.Tokens > 0);
1148     enqueue(responseNetwork_out, ResponseMsg, latency = l1_response_latency) {
1149       out_msg.Address := address;
1150       out_msg.Type := CoherenceResponseType:DATA_OWNER;
1151       out_msg.Sender := machineID;
1152       out_msg.Destination.add(persistentTable.findSmallest(address));
1153       assert(cache_entry.Tokens > (max_tokens() / 2));
1154       out_msg.Tokens := cache_entry.Tokens;
1155       out_msg.DataBlk := cache_entry.DataBlk;
1156       out_msg.Dirty := cache_entry.Dirty;
1157       out_msg.MessageSize := MessageSizeType:Response_Data;
1158     }
1159     cache_entry.Tokens := 0;
1160   }
1161
1162   action(f_sendAckWithAllButNorOneTokens, "f", desc="Send ack with all our tokens but one to starver.") {
1163     //assert(persistentTable.findSmallest(address) != id); // Make sure we never bounce tokens to ourself
1164     assert(is_valid(cache_entry));
1165     assert(cache_entry.Tokens > 0);
1166     if (cache_entry.Tokens > 1) {
1167       enqueue(responseNetwork_out, ResponseMsg, latency = l1_response_latency) {
1168         out_msg.Address := address;
1169         if (cache_entry.Tokens > (max_tokens() / 2)) {
1170           out_msg.Type := CoherenceResponseType:DATA_OWNER;
1171         } else {
1172           out_msg.Type := CoherenceResponseType:ACK;
1173         }
1174         out_msg.Sender := machineID;
1175         out_msg.Destination.add(persistentTable.findSmallest(address));
1176         assert(cache_entry.Tokens >= 1);
1177         if (cache_entry.Tokens > N_tokens) {
1178           out_msg.Tokens := cache_entry.Tokens - N_tokens;
1179         } else {
1180           out_msg.Tokens := cache_entry.Tokens - 1;
1181         }
1182         out_msg.DataBlk := cache_entry.DataBlk;
1183         out_msg.MessageSize := MessageSizeType:Response_Control;
1184       }
1185     }
1186     if (cache_entry.Tokens > N_tokens) {
1187       cache_entry.Tokens := N_tokens;
1188     } else {
1189       cache_entry.Tokens := 1;
1190     }
1191   }
1192
1193   action(ff_sendDataWithAllButNorOneTokens, "\f", desc="Send data and out tokens but one to starver") {
1194     //assert(persistentTable.findSmallest(address) != id); // Make sure we never bounce tokens to ourself
1195     assert(is_valid(cache_entry));
1196     assert(cache_entry.Tokens > ((max_tokens() / 2) + 1));
1197     enqueue(responseNetwork_out, ResponseMsg, latency = l1_response_latency) {
1198         out_msg.Address := address;
1199         out_msg.Type := CoherenceResponseType:DATA_OWNER;
1200         out_msg.Sender := machineID;
1201         out_msg.Destination.add(persistentTable.findSmallest(address));
1202         if (cache_entry.Tokens > (N_tokens + (max_tokens() / 2))) {
1203           out_msg.Tokens := cache_entry.Tokens - N_tokens;
1204         } else {
1205           out_msg.Tokens := cache_entry.Tokens - 1;
1206         }
1207         assert(out_msg.Tokens > (max_tokens() / 2));
1208         out_msg.DataBlk := cache_entry.DataBlk;
1209         out_msg.Dirty := cache_entry.Dirty;
1210         out_msg.MessageSize := MessageSizeType:Response_Data;
1211     }
1212     if (cache_entry.Tokens > (N_tokens + (max_tokens() / 2))) {
1213       cache_entry.Tokens := N_tokens;
1214     } else {
1215       cache_entry.Tokens := 1;
1216     }
1217   }
1218
1219   action(fo_sendDataWithOwnerToken, "fo", desc="Send data and owner tokens") {
1220     assert(is_valid(cache_entry));
1221     assert(cache_entry.Tokens == ((max_tokens() / 2) + 1));
1222     enqueue(responseNetwork_out, ResponseMsg, latency = l1_response_latency) {
1223         out_msg.Address := address;
1224         out_msg.Type := CoherenceResponseType:DATA_OWNER;
1225         out_msg.Sender := machineID;
1226         out_msg.Destination.add(persistentTable.findSmallest(address));
1227         out_msg.Tokens := cache_entry.Tokens;
1228         assert(out_msg.Tokens > (max_tokens() / 2));
1229         out_msg.DataBlk := cache_entry.DataBlk;
1230         out_msg.Dirty := cache_entry.Dirty;
1231         out_msg.MessageSize := MessageSizeType:Response_Data;
1232     }
1233     cache_entry.Tokens := 0;
1234   }
1235
1236   action(g_bounceResponseToStarver, "g", desc="Redirect response to starving processor") {
1237     // assert(persistentTable.isLocked(address));
1238
1239     peek(responseNetwork_in, ResponseMsg) {
1240       // assert(persistentTable.findSmallest(address) != id); // Make sure we never bounce tokens to ourself
1241       // FIXME, should use a 3rd vnet in some cases
1242       enqueue(responseNetwork_out, ResponseMsg, latency="1") {
1243         out_msg.Address := address;
1244         out_msg.Type := in_msg.Type;
1245         out_msg.Sender := machineID;
1246         out_msg.Destination.add(persistentTable.findSmallest(address));
1247         out_msg.Tokens := in_msg.Tokens;
1248         out_msg.DataBlk := in_msg.DataBlk;
1249         out_msg.Dirty := in_msg.Dirty;
1250         out_msg.MessageSize := in_msg.MessageSize;
1251       }
1252     }
1253   }
1254
1255
1256   action(h_load_hit, "h", desc="Notify sequencer the load completed.") {
1257     assert(is_valid(cache_entry));
1258     DPRINTF(RubySlicc, "Address: %s, Data Block: %s\n",
1259             address, cache_entry.DataBlk);
1260
1261     sequencer.readCallback(address,
1262                            GenericMachineType:L1Cache,
1263                            cache_entry.DataBlk);
1264
1265   }
1266
1267   action(x_external_load_hit, "x", desc="Notify sequencer the load completed.") {
1268     assert(is_valid(cache_entry));
1269     DPRINTF(RubySlicc, "Address: %s, Data Block: %s\n",
1270             address, cache_entry.DataBlk);
1271     peek(responseNetwork_in, ResponseMsg) {
1272
1273       sequencer.readCallback(address,
1274                              getNondirectHitMachType(address, in_msg.Sender),
1275                              cache_entry.DataBlk);
1276
1277     }
1278   }
1279
1280   action(hh_store_hit, "\h", desc="Notify sequencer that store completed.") {
1281     assert(is_valid(cache_entry));
1282     DPRINTF(RubySlicc, "Address: %s, Data Block: %s\n",
1283             address, cache_entry.DataBlk);
1284
1285     sequencer.writeCallback(address,
1286                             GenericMachineType:L1Cache,
1287                             cache_entry.DataBlk);
1288
1289     cache_entry.Dirty := true;
1290     DPRINTF(RubySlicc, "%s\n", cache_entry.DataBlk);
1291   }
1292
1293   action(xx_external_store_hit, "\x", desc="Notify sequencer that store completed.") {
1294     assert(is_valid(cache_entry));
1295     DPRINTF(RubySlicc, "Address: %s, Data Block: %s\n",
1296             address, cache_entry.DataBlk);
1297     peek(responseNetwork_in, ResponseMsg) {
1298
1299       sequencer.writeCallback(address,
1300                               getNondirectHitMachType(address, in_msg.Sender),
1301                               cache_entry.DataBlk);
1302
1303     }
1304     cache_entry.Dirty := true;
1305     DPRINTF(RubySlicc, "%s\n", cache_entry.DataBlk);
1306   }
1307
1308   action(i_allocateTBE, "i", desc="Allocate TBE") {
1309     check_allocate(L1_TBEs);
1310     L1_TBEs.allocate(address);
1311     set_tbe(L1_TBEs[address]);
1312     tbe.IssueCount := 0;
1313     peek(mandatoryQueue_in, RubyRequest) {
1314       tbe.PC := in_msg.ProgramCounter;
1315       tbe.AccessType := cache_request_type_to_access_type(in_msg.Type);
1316       if (in_msg.Type == RubyRequestType:ATOMIC) {
1317         tbe.IsAtomic := true;
1318       }
1319       tbe.Prefetch := in_msg.Prefetch;
1320       tbe.AccessMode := in_msg.AccessMode;
1321     }
1322     tbe.IssueTime := get_time();
1323   }
1324
1325   action(ta_traceStalledAddress, "ta", desc="Trace Stalled Address") {
1326     peek(mandatoryQueue_in, RubyRequest) {
1327       APPEND_TRANSITION_COMMENT(in_msg.LineAddress);
1328     }
1329   }
1330
1331   action(j_unsetReissueTimer, "j", desc="Unset reissue timer.") {
1332     if (reissueTimerTable.isSet(address)) {
1333       reissueTimerTable.unset(address);
1334     }
1335   }
1336
1337   action(jj_unsetUseTimer, "\j", desc="Unset use timer.") {
1338     useTimerTable.unset(address);
1339   }
1340
1341   action(k_popMandatoryQueue, "k", desc="Pop mandatory queue.") {
1342     mandatoryQueue_in.dequeue();
1343   }
1344
1345   action(l_popPersistentQueue, "l", desc="Pop persistent queue.") {
1346     persistentNetwork_in.dequeue();
1347   }
1348
1349   action(m_popRequestQueue, "m", desc="Pop request queue.") {
1350     requestNetwork_in.dequeue();
1351   }
1352
1353   action(n_popResponseQueue, "n", desc="Pop response queue") {
1354     responseNetwork_in.dequeue();
1355   }
1356
1357   action(o_scheduleUseTimeout, "o", desc="Schedule a use timeout.") {
1358     useTimerTable.set(address, 50);
1359   }
1360
1361   action(p_informL2AboutTokenLoss, "p", desc="Inform L2 about loss of all tokens") {
1362     enqueue(responseNetwork_out, ResponseMsg, latency = l1_response_latency) {
1363        out_msg.Address := address;
1364        out_msg.Type := CoherenceResponseType:INV;
1365        out_msg.Tokens := 0;
1366        out_msg.Sender := machineID;
1367
1368        out_msg.Destination.add(mapAddressToRange(address,
1369                                                  MachineType:L2Cache,
1370                                                  l2_select_low_bit,
1371                                                  l2_select_num_bits));
1372
1373        out_msg.MessageSize := MessageSizeType:Response_Control;
1374     }
1375   }
1376
1377
1378   action(q_updateTokensFromResponse, "q", desc="Update the token count based on the incoming response message") {
1379     peek(responseNetwork_in, ResponseMsg) {
1380       assert(is_valid(cache_entry));
1381       assert(in_msg.Tokens != 0);
1382       DPRINTF(RubySlicc, "L1 received tokens for address: %s, tokens: %d\n",
1383               in_msg.Address, in_msg.Tokens);
1384       cache_entry.Tokens := cache_entry.Tokens + in_msg.Tokens;
1385       DPRINTF(RubySlicc, "%d\n", cache_entry.Tokens);
1386
1387       if (cache_entry.Dirty == false && in_msg.Dirty) {
1388         cache_entry.Dirty := true;
1389       }
1390     }
1391   }
1392
1393   action(s_deallocateTBE, "s", desc="Deallocate TBE") {
1394
1395     assert(is_valid(tbe));
1396     if (tbe.WentPersistent) {
1397       // assert(starving == true);
1398       outstandingRequests := outstandingRequests - 1;
1399       enqueue(persistentNetwork_out, PersistentMsg, latency = l1_request_latency) {
1400         out_msg.Address := address;
1401         out_msg.Type := PersistentRequestType:DEACTIVATE_PERSISTENT;
1402         out_msg.Requestor := machineID;
1403         out_msg.Destination.broadcast(MachineType:L1Cache);
1404
1405         //
1406         // Currently the configuration system limits the system to only one
1407         // chip.  Therefore, if we assume one shared L2 cache, then only one
1408         // pertinent L2 cache exist.
1409         //
1410         //out_msg.Destination.addNetDest(getAllPertinentL2Banks(address));
1411
1412         out_msg.Destination.add(mapAddressToRange(address,
1413                                                   MachineType:L2Cache,
1414                                                   l2_select_low_bit,
1415                                                   l2_select_num_bits));
1416
1417         out_msg.Destination.add(map_Address_to_Directory(address));
1418         out_msg.MessageSize := MessageSizeType:Persistent_Control;
1419       }
1420       starving := false;
1421     }
1422
1423     // Update average latency
1424     if (tbe.IssueCount <= 1) {
1425       if (tbe.ExternalResponse == true) {
1426         updateAverageLatencyEstimate(time_to_int(get_time()) - time_to_int(tbe.IssueTime));
1427       }
1428     }
1429
1430     // Profile
1431     //if (tbe.WentPersistent) {
1432     //  profile_token_retry(address, tbe.AccessType, 2);
1433     //}
1434     //else {
1435     //  profile_token_retry(address, tbe.AccessType, 1);
1436     //}
1437
1438     //profile_token_retry(address, tbe.AccessType, tbe.IssueCount);
1439     L1_TBEs.deallocate(address);
1440     unset_tbe();
1441   }
1442
1443   action(t_sendAckWithCollectedTokens, "t", desc="Send ack with the tokens we've collected thus far.") {
1444     assert(is_valid(cache_entry));
1445     if (cache_entry.Tokens > 0) {
1446       peek(requestNetwork_in, RequestMsg) {
1447         enqueue(responseNetwork_out, ResponseMsg, latency = l1_response_latency) {
1448           out_msg.Address := address;
1449           if (cache_entry.Tokens > (max_tokens() / 2)) {
1450             out_msg.Type := CoherenceResponseType:DATA_OWNER;
1451           } else {
1452             out_msg.Type := CoherenceResponseType:ACK;
1453           }
1454           out_msg.Sender := machineID;
1455           out_msg.Destination.add(in_msg.Requestor);
1456           assert(cache_entry.Tokens >= 1);
1457           out_msg.Tokens := cache_entry.Tokens;
1458           out_msg.DataBlk := cache_entry.DataBlk;
1459           out_msg.MessageSize := MessageSizeType:Response_Control;
1460         }
1461       }
1462     }
1463     cache_entry.Tokens := 0;
1464   }
1465
1466   action(u_writeDataToCache, "u", desc="Write data to cache") {
1467     peek(responseNetwork_in, ResponseMsg) {
1468       assert(is_valid(cache_entry));
1469       cache_entry.DataBlk := in_msg.DataBlk;
1470       if (cache_entry.Dirty == false && in_msg.Dirty) {
1471         cache_entry.Dirty := in_msg.Dirty;
1472       }
1473
1474     }
1475   }
1476
1477   action(gg_deallocateL1CacheBlock, "\g", desc="Deallocate cache block.  Sets the cache to invalid, allowing a replacement in parallel with a fetch.") {
1478     assert(getTokens(cache_entry) == 0);
1479     if (L1DcacheMemory.isTagPresent(address)) {
1480       L1DcacheMemory.deallocate(address);
1481     } else {
1482       L1IcacheMemory.deallocate(address);
1483     }
1484     unset_cache_entry();
1485   }
1486
1487   action(ii_allocateL1DCacheBlock, "\i", desc="Set L1 D-cache tag equal to tag of block B.") {
1488     if (is_valid(cache_entry)) {
1489     } else {
1490       set_cache_entry(L1DcacheMemory.allocate(address, new Entry));
1491     }
1492   }
1493
1494   action(pp_allocateL1ICacheBlock, "\p", desc="Set L1 I-cache tag equal to tag of block B.") {
1495     if (is_valid(cache_entry)) {
1496     } else {
1497       set_cache_entry(L1IcacheMemory.allocate(address, new Entry));
1498     }
1499   }
1500
1501   action(uu_profileMiss, "\u", desc="Profile the demand miss") {
1502     peek(mandatoryQueue_in, RubyRequest) {
1503       if (L1DcacheMemory.isTagPresent(address)) {
1504         L1DcacheMemory.profileMiss(in_msg);
1505       } else {
1506         L1IcacheMemory.profileMiss(in_msg);
1507       }
1508     }
1509   }
1510
1511   action(w_assertIncomingDataAndCacheDataMatch, "w", desc="Assert that the incoming data and the data in the cache match") {
1512     peek(responseNetwork_in, ResponseMsg) {
1513       assert(is_valid(cache_entry));
1514       assert(cache_entry.DataBlk == in_msg.DataBlk);
1515     }
1516   }
1517
1518   action(zz_stallAndWaitMandatoryQueue, "\z", desc="Send the head of the mandatory queue to the back of the queue.") {
1519     peek(mandatoryQueue_in, RubyRequest) {
1520       APPEND_TRANSITION_COMMENT(in_msg.LineAddress);
1521     }
1522     stall_and_wait(mandatoryQueue_in, address);
1523   }
1524
1525   action(kd_wakeUpDependents, "kd", desc="wake-up dependents") {
1526     wakeUpBuffers(address);
1527   }
1528
1529   action(ka_wakeUpAllDependents, "ka", desc="wake-up all dependents") {
1530     wakeUpAllBuffers();
1531   }
1532
1533   //*****************************************************
1534   // TRANSITIONS
1535   //*****************************************************
1536
1537   // Transitions for Load/Store/L2_Replacement from transient states
1538   transition({IM, SM, OM, IS, IM_L, IS_L, I_L, S_L, SM_L, M_W, MM_W}, L1_Replacement) {
1539     ta_traceStalledAddress;
1540     zz_stallAndWaitMandatoryQueue;
1541   }
1542
1543   transition({IM, SM, OM, IS, IM_L, IS_L, SM_L}, {Store, Atomic}) {
1544     zz_stallAndWaitMandatoryQueue;
1545   }
1546
1547   transition({IM, IS, IM_L, IS_L}, {Load, Ifetch}) {
1548     zz_stallAndWaitMandatoryQueue;
1549   }
1550
1551
1552   // Lockdowns
1553   transition({NP, I, S, O, M, MM, M_W, MM_W, IM, SM, OM, IS}, Own_Lock_or_Unlock) {
1554     l_popPersistentQueue;
1555   }
1556
1557   // Transitions from NP
1558   transition(NP, Load, IS) {
1559     ii_allocateL1DCacheBlock;
1560     i_allocateTBE;
1561     a_issueReadRequest;
1562     uu_profileMiss;
1563     k_popMandatoryQueue;
1564   }
1565
1566   transition(NP, Ifetch, IS) {
1567     pp_allocateL1ICacheBlock;
1568     i_allocateTBE;
1569     a_issueReadRequest;
1570     uu_profileMiss;
1571     k_popMandatoryQueue;
1572   }
1573
1574   transition(NP, {Store, Atomic}, IM) {
1575     ii_allocateL1DCacheBlock;
1576     i_allocateTBE;
1577     b_issueWriteRequest;
1578     uu_profileMiss;
1579     k_popMandatoryQueue;
1580   }
1581
1582   transition(NP, {Ack, Data_Shared, Data_Owner, Data_All_Tokens}) {
1583     bb_bounceResponse;
1584     n_popResponseQueue;
1585   }
1586
1587   transition(NP, {Transient_GETX, Transient_Local_GETX, Transient_GETS, Transient_Local_GETS}) {
1588     m_popRequestQueue;
1589   }
1590
1591   transition(NP, {Persistent_GETX, Persistent_GETS, Persistent_GETS_Last_Token}, I_L) {
1592     l_popPersistentQueue;
1593   }
1594
1595   // Transitions from Idle
1596   transition(I, Load, IS) {
1597     i_allocateTBE;
1598     a_issueReadRequest;
1599     uu_profileMiss;
1600     k_popMandatoryQueue;
1601   }
1602
1603   transition(I, Ifetch, IS) {
1604     i_allocateTBE;
1605     a_issueReadRequest;
1606     uu_profileMiss;
1607     k_popMandatoryQueue;
1608   }
1609
1610   transition(I, {Store, Atomic}, IM) {
1611     i_allocateTBE;
1612     b_issueWriteRequest;
1613     uu_profileMiss;
1614     k_popMandatoryQueue;
1615   }
1616
1617   transition(I, L1_Replacement) {
1618     ta_traceStalledAddress;
1619     tr_tokenReplacement;
1620     gg_deallocateL1CacheBlock;
1621     ka_wakeUpAllDependents;
1622   }
1623
1624   transition(I, {Transient_GETX, Transient_Local_GETX}) {
1625     t_sendAckWithCollectedTokens;
1626     m_popRequestQueue;
1627   }
1628
1629   transition(I, {Transient_GETS, Transient_GETS_Last_Token, Transient_Local_GETS_Last_Token, Transient_Local_GETS}) {
1630     m_popRequestQueue;
1631   }
1632
1633   transition(I, {Persistent_GETX, Persistent_GETS, Persistent_GETS_Last_Token}, I_L) {
1634     e_sendAckWithCollectedTokens;
1635     l_popPersistentQueue;
1636   }
1637
1638   transition(I_L, {Persistent_GETX, Persistent_GETS, Persistent_GETS_Last_Token}) {
1639     l_popPersistentQueue;
1640   }
1641
1642   transition(I, Ack) {
1643     q_updateTokensFromResponse;
1644     n_popResponseQueue;
1645   }
1646
1647   transition(I, Data_Shared, S) {
1648     u_writeDataToCache;
1649     q_updateTokensFromResponse;
1650     n_popResponseQueue;
1651   }
1652
1653   transition(I, Data_Owner, O) {
1654     u_writeDataToCache;
1655     q_updateTokensFromResponse;
1656     n_popResponseQueue;
1657   }
1658
1659   transition(I, Data_All_Tokens, M) {
1660     u_writeDataToCache;
1661     q_updateTokensFromResponse;
1662     n_popResponseQueue;
1663   }
1664
1665   // Transitions from Shared
1666   transition({S, SM, S_L, SM_L}, {Load, Ifetch}) {
1667     h_load_hit;
1668     k_popMandatoryQueue;
1669   }
1670
1671   transition(S, {Store, Atomic}, SM) {
1672     i_allocateTBE;
1673     b_issueWriteRequest;
1674     uu_profileMiss;
1675     k_popMandatoryQueue;
1676   }
1677
1678   transition(S, L1_Replacement, I) {
1679     ta_traceStalledAddress;
1680     cc_sharedReplacement; // Only needed in some cases
1681     gg_deallocateL1CacheBlock;
1682     ka_wakeUpAllDependents;
1683   }
1684
1685   transition(S, {Transient_GETX, Transient_Local_GETX}, I) {
1686     t_sendAckWithCollectedTokens;
1687     p_informL2AboutTokenLoss;
1688     m_popRequestQueue;
1689   }
1690
1691   // only owner responds to non-local requests
1692   transition(S, Transient_GETS) {
1693     m_popRequestQueue;
1694   }
1695
1696   transition(S, Transient_Local_GETS) {
1697     d_sendDataWithToken;
1698     m_popRequestQueue;
1699   }
1700
1701   transition(S, {Transient_GETS_Last_Token, Transient_Local_GETS_Last_Token}) {
1702     m_popRequestQueue;
1703   }
1704
1705   transition({S, S_L}, Persistent_GETX, I_L) {
1706     e_sendAckWithCollectedTokens;
1707     p_informL2AboutTokenLoss;
1708     l_popPersistentQueue;
1709   }
1710
1711   transition(S, {Persistent_GETS, Persistent_GETS_Last_Token}, S_L) {
1712     f_sendAckWithAllButNorOneTokens;
1713     l_popPersistentQueue;
1714   }
1715
1716   transition(S_L, {Persistent_GETS, Persistent_GETS_Last_Token}) {
1717     l_popPersistentQueue;
1718   }
1719
1720   transition(S, Ack) {
1721     q_updateTokensFromResponse;
1722     n_popResponseQueue;
1723   }
1724
1725   transition(S, Data_Shared) {
1726     w_assertIncomingDataAndCacheDataMatch;
1727     q_updateTokensFromResponse;
1728     n_popResponseQueue;
1729   }
1730
1731   transition(S, Data_Owner, O) {
1732     w_assertIncomingDataAndCacheDataMatch;
1733     q_updateTokensFromResponse;
1734     n_popResponseQueue;
1735   }
1736
1737   transition(S, Data_All_Tokens, M) {
1738     w_assertIncomingDataAndCacheDataMatch;
1739     q_updateTokensFromResponse;
1740     n_popResponseQueue;
1741   }
1742
1743   // Transitions from Owned
1744   transition({O, OM}, {Load, Ifetch}) {
1745     h_load_hit;
1746     k_popMandatoryQueue;
1747   }
1748
1749   transition(O, {Store, Atomic}, OM) {
1750     i_allocateTBE;
1751     b_issueWriteRequest;
1752     uu_profileMiss;
1753     k_popMandatoryQueue;
1754   }
1755
1756   transition(O, L1_Replacement, I) {
1757     ta_traceStalledAddress;
1758     c_ownedReplacement;
1759     gg_deallocateL1CacheBlock;
1760     ka_wakeUpAllDependents;
1761   }
1762
1763   transition(O, {Transient_GETX, Transient_Local_GETX}, I) {
1764     dd_sendDataWithAllTokens;
1765     p_informL2AboutTokenLoss;
1766     m_popRequestQueue;
1767   }
1768
1769   transition(O, Persistent_GETX, I_L) {
1770     ee_sendDataWithAllTokens;
1771     p_informL2AboutTokenLoss;
1772     l_popPersistentQueue;
1773   }
1774
1775   transition(O, Persistent_GETS, S_L) {
1776     ff_sendDataWithAllButNorOneTokens;
1777     l_popPersistentQueue;
1778   }
1779
1780   transition(O, Persistent_GETS_Last_Token, I_L) {
1781     fo_sendDataWithOwnerToken;
1782     l_popPersistentQueue;
1783   }
1784
1785   transition(O, Transient_GETS) {
1786     d_sendDataWithToken;
1787     m_popRequestQueue;
1788   }
1789
1790   transition(O, Transient_Local_GETS) {
1791     d_sendDataWithToken;
1792     m_popRequestQueue;
1793   }
1794
1795   // ran out of tokens, wait for it to go persistent
1796   transition(O, {Transient_GETS_Last_Token, Transient_Local_GETS_Last_Token}) {
1797     m_popRequestQueue;
1798   }
1799
1800   transition(O, Ack) {
1801     q_updateTokensFromResponse;
1802     n_popResponseQueue;
1803   }
1804
1805   transition(O, Ack_All_Tokens, M) {
1806     q_updateTokensFromResponse;
1807     n_popResponseQueue;
1808   }
1809
1810   transition(O, Data_Shared) {
1811     w_assertIncomingDataAndCacheDataMatch;
1812     q_updateTokensFromResponse;
1813     n_popResponseQueue;
1814   }
1815
1816   transition(O, Data_All_Tokens, M) {
1817     w_assertIncomingDataAndCacheDataMatch;
1818     q_updateTokensFromResponse;
1819     n_popResponseQueue;
1820   }
1821
1822   // Transitions from Modified
1823   transition({MM, MM_W}, {Load, Ifetch}) {
1824     h_load_hit;
1825     k_popMandatoryQueue;
1826   }
1827
1828   transition({MM_W}, {Store, Atomic}) {
1829     hh_store_hit;
1830     k_popMandatoryQueue;
1831   }
1832
1833   transition(MM, Store) {
1834     hh_store_hit;
1835     k_popMandatoryQueue;
1836   }
1837
1838   transition(MM, Atomic, M) {
1839     hh_store_hit;
1840     k_popMandatoryQueue;
1841   }
1842
1843   transition(MM, L1_Replacement, I) {
1844     ta_traceStalledAddress;
1845     c_ownedReplacement;
1846     gg_deallocateL1CacheBlock;
1847     ka_wakeUpAllDependents;
1848   }
1849
1850   transition(MM, {Transient_GETX, Transient_Local_GETX, Transient_GETS, Transient_Local_GETS}, I) {
1851     dd_sendDataWithAllTokens;
1852     p_informL2AboutTokenLoss;
1853     m_popRequestQueue;
1854   }
1855
1856   transition({MM_W}, {Transient_GETX, Transient_Local_GETX, Transient_GETS, Transient_Local_GETS}) { // Ignore the request
1857     m_popRequestQueue;
1858   }
1859
1860   // Implement the migratory sharing optimization, even for persistent requests
1861   transition(MM, {Persistent_GETX, Persistent_GETS}, I_L) {
1862     ee_sendDataWithAllTokens;
1863     p_informL2AboutTokenLoss;
1864     l_popPersistentQueue;
1865   }
1866
1867   // ignore persistent requests in lockout period
1868   transition(MM_W, {Persistent_GETX, Persistent_GETS}) {
1869     l_popPersistentQueue;
1870   }
1871
1872   transition(MM_W, Use_TimeoutNoStarvers, MM) {
1873     s_deallocateTBE;
1874     jj_unsetUseTimer;
1875     kd_wakeUpDependents;
1876   }
1877
1878   transition(MM_W, Use_TimeoutNoStarvers_NoMig, M) {
1879     s_deallocateTBE;
1880     jj_unsetUseTimer;
1881     kd_wakeUpDependents;
1882   }
1883
1884   // Transitions from Dirty Exclusive
1885   transition({M, M_W}, {Load, Ifetch}) {
1886     h_load_hit;
1887     k_popMandatoryQueue;
1888   }
1889
1890   transition(M, Store, MM) {
1891     hh_store_hit;
1892     k_popMandatoryQueue;
1893   }
1894
1895   transition(M, Atomic) {
1896     hh_store_hit;
1897     k_popMandatoryQueue;
1898   }
1899
1900   transition(M_W, Store, MM_W) {
1901     hh_store_hit;
1902     k_popMandatoryQueue;
1903   }
1904
1905   transition(M_W, Atomic) {
1906     hh_store_hit;
1907     k_popMandatoryQueue;
1908   }
1909
1910   transition(M, L1_Replacement, I) {
1911     ta_traceStalledAddress;
1912     c_ownedReplacement;
1913     gg_deallocateL1CacheBlock;
1914     ka_wakeUpAllDependents;
1915   }
1916
1917   transition(M, {Transient_GETX, Transient_Local_GETX}, I) {
1918     dd_sendDataWithAllTokens;
1919     p_informL2AboutTokenLoss;
1920     m_popRequestQueue;
1921   }
1922
1923   transition(M, Transient_Local_GETS, O) {
1924     d_sendDataWithToken;
1925     m_popRequestQueue;
1926   }
1927
1928   transition(M, Transient_GETS, O) {
1929     d_sendDataWithNTokenIfAvail;
1930     m_popRequestQueue;
1931   }
1932
1933   transition(M_W, {Transient_GETX, Transient_Local_GETX, Transient_GETS, Transient_Local_GETS}) { // Ignore the request
1934     m_popRequestQueue;
1935   }
1936
1937   transition(M, Persistent_GETX, I_L) {
1938     ee_sendDataWithAllTokens;
1939     p_informL2AboutTokenLoss;
1940     l_popPersistentQueue;
1941   }
1942
1943   transition(M, Persistent_GETS, S_L) {
1944     ff_sendDataWithAllButNorOneTokens;
1945     l_popPersistentQueue;
1946   }
1947
1948   // ignore persistent requests in lockout period
1949   transition(M_W, {Persistent_GETX, Persistent_GETS}) {
1950     l_popPersistentQueue;
1951   }
1952
1953   transition(M_W, Use_TimeoutStarverS, S_L) {
1954     s_deallocateTBE;
1955     ff_sendDataWithAllButNorOneTokens;
1956     jj_unsetUseTimer;
1957   }
1958
1959   // someone unlocked during timeout
1960   transition(M_W, {Use_TimeoutNoStarvers, Use_TimeoutNoStarvers_NoMig}, M) {
1961     s_deallocateTBE;
1962     jj_unsetUseTimer;
1963     kd_wakeUpDependents;
1964   }
1965
1966   transition(M_W, Use_TimeoutStarverX, I_L) {
1967     s_deallocateTBE;
1968     ee_sendDataWithAllTokens;
1969     p_informL2AboutTokenLoss;
1970     jj_unsetUseTimer;
1971   }
1972
1973
1974
1975   // migratory
1976   transition(MM_W, {Use_TimeoutStarverX, Use_TimeoutStarverS}, I_L) {
1977     s_deallocateTBE;
1978     ee_sendDataWithAllTokens;
1979     p_informL2AboutTokenLoss;
1980     jj_unsetUseTimer;
1981
1982   }
1983
1984
1985   // Transient_GETX and Transient_GETS in transient states
1986   transition(OM, {Transient_GETX, Transient_Local_GETX, Transient_GETS, Transient_GETS_Last_Token, Transient_Local_GETS_Last_Token, Transient_Local_GETS}) {
1987     m_popRequestQueue;  // Even if we have the data, we can pretend we don't have it yet.
1988   }
1989
1990   transition(IS, {Transient_GETX, Transient_Local_GETX}) {
1991     t_sendAckWithCollectedTokens;
1992     m_popRequestQueue;
1993   }
1994
1995   transition(IS, {Transient_GETS, Transient_GETS_Last_Token, Transient_Local_GETS_Last_Token, Transient_Local_GETS}) {
1996     m_popRequestQueue;
1997   }
1998
1999   transition(IS, {Persistent_GETX, Persistent_GETS, Persistent_GETS_Last_Token}, IS_L) {
2000     e_sendAckWithCollectedTokens;
2001     l_popPersistentQueue;
2002   }
2003
2004   transition(IS_L, {Persistent_GETX, Persistent_GETS}) {
2005     l_popPersistentQueue;
2006   }
2007
2008   transition(IM, {Persistent_GETX, Persistent_GETS, Persistent_GETS_Last_Token}, IM_L) {
2009     e_sendAckWithCollectedTokens;
2010     l_popPersistentQueue;
2011   }
2012
2013   transition(IM_L, {Persistent_GETX, Persistent_GETS}) {
2014     l_popPersistentQueue;
2015   }
2016
2017   transition({SM, SM_L}, Persistent_GETX, IM_L) {
2018     e_sendAckWithCollectedTokens;
2019     l_popPersistentQueue;
2020   }
2021
2022   transition(SM, {Persistent_GETS, Persistent_GETS_Last_Token}, SM_L) {
2023     f_sendAckWithAllButNorOneTokens;
2024     l_popPersistentQueue;
2025   }
2026
2027   transition(SM_L, {Persistent_GETS, Persistent_GETS_Last_Token}) {
2028     l_popPersistentQueue;
2029   }
2030
2031   transition(OM, Persistent_GETX, IM_L) {
2032     ee_sendDataWithAllTokens;
2033     l_popPersistentQueue;
2034   }
2035
2036   transition(OM, Persistent_GETS, SM_L) {
2037     ff_sendDataWithAllButNorOneTokens;
2038     l_popPersistentQueue;
2039   }
2040
2041   transition(OM, Persistent_GETS_Last_Token, IM_L) {
2042     fo_sendDataWithOwnerToken;
2043     l_popPersistentQueue;
2044   }
2045
2046   // Transitions from IM/SM
2047
2048   transition({IM, SM}, Ack) {
2049     q_updateTokensFromResponse;
2050     n_popResponseQueue;
2051   }
2052
2053   transition(IM, Data_Shared, SM) {
2054     u_writeDataToCache;
2055     q_updateTokensFromResponse;
2056     n_popResponseQueue;
2057   }
2058
2059   transition(IM, Data_Owner, OM) {
2060     u_writeDataToCache;
2061     q_updateTokensFromResponse;
2062     n_popResponseQueue;
2063   }
2064
2065   transition(IM, Data_All_Tokens, MM_W) {
2066     u_writeDataToCache;
2067     q_updateTokensFromResponse;
2068     xx_external_store_hit;
2069     o_scheduleUseTimeout;
2070     j_unsetReissueTimer;
2071     n_popResponseQueue;
2072     kd_wakeUpDependents;
2073   }
2074
2075   transition(SM, Data_Shared) {
2076     w_assertIncomingDataAndCacheDataMatch;
2077     q_updateTokensFromResponse;
2078     n_popResponseQueue;
2079   }
2080
2081   transition(SM, Data_Owner, OM) {
2082     w_assertIncomingDataAndCacheDataMatch;
2083     q_updateTokensFromResponse;
2084     n_popResponseQueue;
2085   }
2086
2087   transition(SM, Data_All_Tokens, MM_W) {
2088     w_assertIncomingDataAndCacheDataMatch;
2089     q_updateTokensFromResponse;
2090     xx_external_store_hit;
2091     o_scheduleUseTimeout;
2092     j_unsetReissueTimer;
2093     n_popResponseQueue;
2094     kd_wakeUpDependents;
2095   }
2096
2097   transition({IM, SM}, {Transient_GETX, Transient_Local_GETX}, IM) { // We don't have the data yet, but we might have collected some tokens.  We give them up here to avoid livelock
2098     t_sendAckWithCollectedTokens;
2099     m_popRequestQueue;
2100   }
2101
2102   transition({IM, SM}, {Transient_GETS, Transient_GETS_Last_Token, Transient_Local_GETS_Last_Token, Transient_Local_GETS}) {
2103     m_popRequestQueue;
2104   }
2105
2106   transition({IM, SM}, Request_Timeout) {
2107     j_unsetReissueTimer;
2108     b_issueWriteRequest;
2109   }
2110
2111   // Transitions from OM
2112
2113   transition(OM, Ack) {
2114     q_updateTokensFromResponse;
2115     n_popResponseQueue;
2116   }
2117
2118   transition(OM, Ack_All_Tokens, MM_W) {
2119     q_updateTokensFromResponse;
2120     xx_external_store_hit;
2121     o_scheduleUseTimeout;
2122     j_unsetReissueTimer;
2123     n_popResponseQueue;
2124     kd_wakeUpDependents;
2125   }
2126
2127   transition(OM, Data_Shared) {
2128     w_assertIncomingDataAndCacheDataMatch;
2129     q_updateTokensFromResponse;
2130     n_popResponseQueue;
2131   }
2132
2133   transition(OM, Data_All_Tokens, MM_W) {
2134     w_assertIncomingDataAndCacheDataMatch;
2135     q_updateTokensFromResponse;
2136     xx_external_store_hit;
2137     o_scheduleUseTimeout;
2138     j_unsetReissueTimer;
2139     n_popResponseQueue;
2140     kd_wakeUpDependents;
2141   }
2142
2143   transition(OM, Request_Timeout) {
2144     j_unsetReissueTimer;
2145     b_issueWriteRequest;
2146   }
2147
2148   // Transitions from IS
2149
2150   transition(IS, Ack) {
2151     q_updateTokensFromResponse;
2152     n_popResponseQueue;
2153   }
2154
2155   transition(IS, Data_Shared, S) {
2156     u_writeDataToCache;
2157     q_updateTokensFromResponse;
2158     x_external_load_hit;
2159     s_deallocateTBE;
2160     j_unsetReissueTimer;
2161     n_popResponseQueue;
2162     kd_wakeUpDependents;
2163   }
2164
2165   transition(IS, Data_Owner, O) {
2166     u_writeDataToCache;
2167     q_updateTokensFromResponse;
2168     x_external_load_hit;
2169     s_deallocateTBE;
2170     j_unsetReissueTimer;
2171     n_popResponseQueue;
2172     kd_wakeUpDependents;
2173   }
2174
2175   transition(IS, Data_All_Tokens, M_W) {
2176     u_writeDataToCache;
2177     q_updateTokensFromResponse;
2178     x_external_load_hit;
2179     o_scheduleUseTimeout;
2180     j_unsetReissueTimer;
2181     n_popResponseQueue;
2182     kd_wakeUpDependents;
2183   }
2184
2185   transition(IS, Request_Timeout) {
2186     j_unsetReissueTimer;
2187     a_issueReadRequest;
2188   }
2189
2190   // Transitions from I_L
2191
2192   transition(I_L, Load, IS_L) {
2193     ii_allocateL1DCacheBlock;
2194     i_allocateTBE;
2195     a_issueReadRequest;
2196     uu_profileMiss;
2197     k_popMandatoryQueue;
2198   }
2199
2200   transition(I_L, Ifetch, IS_L) {
2201     pp_allocateL1ICacheBlock;
2202     i_allocateTBE;
2203     a_issueReadRequest;
2204     uu_profileMiss;
2205     k_popMandatoryQueue;
2206   }
2207
2208   transition(I_L, {Store, Atomic}, IM_L) {
2209     ii_allocateL1DCacheBlock;
2210     i_allocateTBE;
2211     b_issueWriteRequest;
2212     uu_profileMiss;
2213     k_popMandatoryQueue;
2214   }
2215
2216
2217   // Transitions from S_L
2218
2219   transition(S_L, {Store, Atomic}, SM_L) {
2220     i_allocateTBE;
2221     b_issueWriteRequest;
2222     uu_profileMiss;
2223     k_popMandatoryQueue;
2224   }
2225
2226   // Other transitions from *_L states
2227
2228   transition({I_L, IM_L, IS_L, S_L, SM_L}, {Transient_GETS, Transient_GETS_Last_Token, Transient_Local_GETS_Last_Token, Transient_Local_GETS, Transient_GETX, Transient_Local_GETX}) {
2229     m_popRequestQueue;
2230   }
2231
2232   transition({I_L, IM_L, IS_L, S_L, SM_L}, Ack) {
2233     g_bounceResponseToStarver;
2234     n_popResponseQueue;
2235   }
2236
2237   transition({I_L, IM_L, S_L, SM_L}, {Data_Shared, Data_Owner}) {
2238     g_bounceResponseToStarver;
2239     n_popResponseQueue;
2240   }
2241
2242   transition({I_L, S_L}, Data_All_Tokens) {
2243     g_bounceResponseToStarver;
2244     n_popResponseQueue;
2245   }
2246
2247   transition(IS_L, Request_Timeout) {
2248     j_unsetReissueTimer;
2249     a_issueReadRequest;
2250   }
2251
2252   transition({IM_L, SM_L}, Request_Timeout) {
2253     j_unsetReissueTimer;
2254     b_issueWriteRequest;
2255   }
2256
2257   // Opportunisticly Complete the memory operation in the following
2258   // cases.  Note: these transitions could just use
2259   // g_bounceResponseToStarver, but if we have the data and tokens, we
2260   // might as well complete the memory request while we have the
2261   // chance (and then immediately forward on the data)
2262
2263   transition(IM_L, Data_All_Tokens, MM_W) {
2264     u_writeDataToCache;
2265     q_updateTokensFromResponse;
2266     xx_external_store_hit;
2267     j_unsetReissueTimer;
2268     o_scheduleUseTimeout;
2269     n_popResponseQueue;
2270     kd_wakeUpDependents;
2271   }
2272
2273   transition(SM_L, Data_All_Tokens, S_L) {
2274     u_writeDataToCache;
2275     q_updateTokensFromResponse;
2276     xx_external_store_hit;
2277     ff_sendDataWithAllButNorOneTokens;
2278     s_deallocateTBE;
2279     j_unsetReissueTimer;
2280     n_popResponseQueue;
2281   }
2282
2283   transition(IS_L, Data_Shared, I_L) {
2284     u_writeDataToCache;
2285     q_updateTokensFromResponse;
2286     x_external_load_hit;
2287     s_deallocateTBE;
2288     e_sendAckWithCollectedTokens;
2289     p_informL2AboutTokenLoss;
2290     j_unsetReissueTimer;
2291     n_popResponseQueue;
2292   }
2293
2294   transition(IS_L, Data_Owner, I_L) {
2295     u_writeDataToCache;
2296     q_updateTokensFromResponse;
2297     x_external_load_hit;
2298     ee_sendDataWithAllTokens;
2299     s_deallocateTBE;
2300     p_informL2AboutTokenLoss;
2301     j_unsetReissueTimer;
2302     n_popResponseQueue;
2303   }
2304
2305   transition(IS_L, Data_All_Tokens, M_W) {
2306     u_writeDataToCache;
2307     q_updateTokensFromResponse;
2308     x_external_load_hit;
2309     j_unsetReissueTimer;
2310     o_scheduleUseTimeout;
2311     n_popResponseQueue;
2312     kd_wakeUpDependents;
2313   }
2314
2315
2316   // Own_Lock_or_Unlock
2317
2318   transition(I_L, Own_Lock_or_Unlock, I) {
2319     l_popPersistentQueue;
2320     kd_wakeUpDependents;
2321   }
2322
2323   transition(S_L, Own_Lock_or_Unlock, S) {
2324     l_popPersistentQueue;
2325     kd_wakeUpDependents;
2326   }
2327
2328   transition(IM_L, Own_Lock_or_Unlock, IM) {
2329     l_popPersistentQueue;
2330     kd_wakeUpDependents;
2331   }
2332
2333   transition(IS_L, Own_Lock_or_Unlock, IS) {
2334     l_popPersistentQueue;
2335     kd_wakeUpDependents;
2336   }
2337
2338   transition(SM_L, Own_Lock_or_Unlock, SM) {
2339     l_popPersistentQueue;
2340     kd_wakeUpDependents;
2341   }
2342 }
2343