MOESI_hammer: Added full-bit directory support
[gem5.git] / src / mem / protocol / MOSI_SMP_bcast_m-dir.sm
1
2 /*
3 * Copyright (c) 1999-2005 Mark D. Hill and David A. Wood
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are
8 * met: redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer;
10 * redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution;
13 * neither the name of the copyright holders nor the names of its
14 * contributors may be used to endorse or promote products derived from
15 * this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
18 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
19 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
20 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
21 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
22 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
23 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
24 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
25 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
26 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
27 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28 */
29
30 /*
31 * $Id$
32 *
33 */
34
35 machine(Directory, "MOSI Broadcast Optimized") {
36
37
38 MessageBuffer addressFromDir, network="To", virtual_network="0", ordered="true";
39 MessageBuffer dataFromDir, network="To", virtual_network="1", ordered="false";
40
41 MessageBuffer addressToDir, network="From", virtual_network="0", ordered="true";
42 MessageBuffer dataToDir, network="From", virtual_network="1", ordered="false";
43
44
45 enumeration(State, desc="Directory states", default="Directory_State_C") {
46 C, desc="Cold - no processor has requested this line";
47 I, desc="Idle";
48 S, desc="Shared";
49 SS, desc="Shared, 2 or more shares";
50 OS, desc="Owned by a cache";
51 OSS, desc="Owned by a cache, present in at least 3 caches";
52 M, desc="Modified", format="!b";
53 }
54
55 // ** EVENTS **
56
57 enumeration(Event, desc="Directory events") {
58 // From Address network
59 OtherAddress, desc="We saw an address msg to someone else";
60 GETS, desc="A GETS arrives";
61 GET_INSTR, desc="A GETInstr arrives";
62 GETX, desc="A GETX arrives", format="!r";
63 PUTX_Owner, desc="A PUTX arrives, requestor is owner";
64 PUTX_NotOwner, desc="A PUTX arrives, requestor is not owner", format="!r";
65 Memory_Data, desc="Fetched data from memory arrives";
66 Memory_Ack, desc="Writeback Ack from memory arrives";
67 }
68
69 // TYPES
70
71 // DirectoryEntry
72 structure(Entry, desc="...") {
73 State DirectoryState, desc="Directory state";
74 bool DirOwner, default="true", desc="Is dir owner?";
75 MachineID ProcOwner, desc="Processor Owner";
76 DataBlock DataBlk, desc="data for the block";
77 }
78
79 external_type(DirectoryMemory) {
80 Entry lookup(Address);
81 bool isPresent(Address);
82 }
83
84 // to simulate detailed DRAM
85 external_type(MemoryControl, inport="yes", outport="yes") {
86
87 }
88
89 // ** OBJECTS **
90
91 DirectoryMemory directory, constructor_hack="i";
92 MemoryControl memBuffer, constructor_hack="i";
93
94 void profile_request(int cache_state, State directory_state, GenericRequestType request_type);
95
96 State getState(Address addr) {
97 if (directory.isPresent(addr)) {
98 return directory[addr].DirectoryState;
99 }
100 return State:C;
101 }
102
103 void setState(Address addr, State state) {
104 if (directory.isPresent(addr)) {
105 directory[addr].DirectoryState := state;
106 }
107 }
108
109 // ** OUT_PORTS **
110
111 out_port(dataNetwork_out, DataMsg, dataFromDir);
112 out_port(addressNetwork_out, AddressMsg, addressFromDir);
113 out_port(memQueue_out, MemoryMsg, memBuffer);
114
115
116 // ** IN_PORTS **
117
118 // Address Network
119 in_port(addressNetwork_in, AddressMsg, addressToDir) {
120 if (addressNetwork_in.isReady()) {
121 peek(addressNetwork_in, AddressMsg) {
122 if(map_Address_to_Directory(in_msg.Address) != machineID) {
123 trigger(Event:OtherAddress, in_msg.Address);
124 } else if (in_msg.Type == CoherenceRequestType:GETS) {
125 trigger(Event:GETS, in_msg.Address);
126 } else if (in_msg.Type == CoherenceRequestType:GET_INSTR) {
127 trigger(Event:GET_INSTR, in_msg.Address);
128 } else if (in_msg.Type == CoherenceRequestType:GETX) {
129 trigger(Event:GETX, in_msg.Address);
130 } else if (in_msg.Type == CoherenceRequestType:PUTX) {
131 if (in_msg.Requestor == directory[in_msg.Address].ProcOwner && directory[in_msg.Address].DirOwner == false) {
132 trigger(Event:PUTX_Owner, in_msg.Address);
133 } else {
134 trigger(Event:PUTX_NotOwner, in_msg.Address);
135 }
136 } else {
137 error("unexpected message");
138 }
139 }
140 }
141 }
142
143 // off-chip memory request/response is done
144 in_port(memQueue_in, MemoryMsg, memBuffer) {
145 if (memQueue_in.isReady()) {
146 peek(memQueue_in, MemoryMsg) {
147 if (in_msg.Type == MemoryRequestType:MEMORY_READ) {
148 trigger(Event:Memory_Data, in_msg.Address);
149 } else if (in_msg.Type == MemoryRequestType:MEMORY_WB) {
150 trigger(Event:Memory_Ack, in_msg.Address);
151 } else {
152 DEBUG_EXPR(in_msg.Type);
153 error("Invalid message");
154 }
155 }
156 }
157 }
158
159 // *** ACTIONS ***
160
161 action(d_sendDataMsg, "d", desc="Send data message to requestor") {
162 peek(memQueue_in, MemoryMsg) {
163 enqueue(dataNetwork_out, DataMsg, latency="1") {
164 out_msg.Address := in_msg.Address;
165 out_msg.Sender := machineID;
166 out_msg.Destination.add(in_msg.OriginalRequestorMachId);
167 out_msg.DestMachine := MachineType:L1Cache;
168 //out_msg.DataBlk := directory[in_msg.Address].DataBlk;
169 out_msg.DataBlk := in_msg.DataBlk;
170 out_msg.MessageSize := MessageSizeType:Data;
171 DEBUG_EXPR(in_msg.OriginalRequestorMachId);
172 DEBUG_EXPR(out_msg.DataBlk);
173 }
174 }
175 }
176
177 action(j_popAddressQueue, "j", desc="Pop address queue.") {
178 addressNetwork_in.dequeue();
179 }
180
181 action(l_popMemQueue, "q", desc="Pop off-chip request queue") {
182 memQueue_in.dequeue();
183 }
184
185 action(p_profile, "p", desc="Profile this transition.") {
186 peek(addressNetwork_in, AddressMsg) {
187 profile_request(in_msg.CacheState, getState(address), convertToGenericType(in_msg.Type));
188 }
189 }
190
191 action(m_setOwnerRequestor, "m", desc="Set owner = requestor") {
192 peek(addressNetwork_in, AddressMsg) {
193 directory[in_msg.Address].ProcOwner := in_msg.Requestor;
194 directory[in_msg.Address].DirOwner := false;
195 }
196 }
197
198 action(qf_queueMemoryFetchRequest, "qf", desc="Queue off-chip fetch request") {
199 peek(addressNetwork_in, AddressMsg) {
200 enqueue(memQueue_out, MemoryMsg, latency="1") {
201 out_msg.Address := address;
202 out_msg.Type := MemoryRequestType:MEMORY_READ;
203 out_msg.Sender := machineID;
204 out_msg.OriginalRequestorMachId := in_msg.Requestor;
205 out_msg.DataBlk := directory[in_msg.Address].DataBlk;
206 out_msg.MessageSize := in_msg.MessageSize;
207 //out_msg.Prefetch := in_msg.Prefetch;
208 DEBUG_EXPR(out_msg);
209 }
210 }
211 }
212
213 action(qw_queueMemoryWBRequest, "qw", desc="Queue off-chip writeback request") {
214 peek(addressNetwork_in, AddressMsg) {
215 enqueue(memQueue_out, MemoryMsg, latency="1") {
216 out_msg.Address := address;
217 out_msg.Type := MemoryRequestType:MEMORY_WB;
218 out_msg.Sender := machineID;
219 out_msg.OriginalRequestorMachId := in_msg.Requestor;
220 out_msg.DataBlk := in_msg.DataBlk;
221 out_msg.MessageSize := in_msg.MessageSize;
222 //out_msg.Prefetch := in_msg.Prefetch;
223 DEBUG_EXPR(out_msg);
224 }
225 }
226 }
227
228 action(r_writeDataFromRequest, "r", desc="Write request data to memory") {
229 peek(addressNetwork_in, AddressMsg) {
230 directory[in_msg.Address].DataBlk := in_msg.DataBlk;
231 DEBUG_EXPR(in_msg.Address);
232 DEBUG_EXPR(in_msg.DataBlk);
233 }
234 }
235
236 action(x_setOwnerToDirectory, "x", desc="Set owner equal to the directory"){
237 peek(addressNetwork_in, AddressMsg) {
238 directory[in_msg.Address].DirOwner := true;
239 }
240 }
241
242 // TRANSITIONS
243
244 // Ignore all address and data messages not bound for us
245 transition(C, OtherAddress) {
246 j_popAddressQueue;
247 }
248
249 // PUTX_NotOwner Transitions
250 transition({I, S, SS, OS, OSS, M}, PUTX_NotOwner) {
251 p_profile;
252 j_popAddressQueue;
253 }
254
255 // Transitions from Idle
256 transition({C, I}, {GETS,GET_INSTR}, S) {
257 //d_sendDataMsg;
258 qf_queueMemoryFetchRequest;
259 p_profile;
260 j_popAddressQueue;
261 }
262
263 transition({C, I}, GETX, M) {
264 //d_sendDataMsg;
265 qf_queueMemoryFetchRequest;
266 m_setOwnerRequestor;
267 p_profile;
268 j_popAddressQueue
269 }
270
271 // Transitions from Shared
272 transition({S, SS}, {GETS,GET_INSTR}, SS) {
273 //d_sendDataMsg;
274 qf_queueMemoryFetchRequest;
275 p_profile;
276 j_popAddressQueue;
277 }
278
279 transition({S, SS}, GETX, M) {
280 //d_sendDataMsg;
281 qf_queueMemoryFetchRequest;
282 m_setOwnerRequestor;
283 p_profile;
284 j_popAddressQueue;
285 }
286
287 // Transitions from Owned
288 transition({OS, OSS}, {GETS,GET_INSTR}, OSS) {
289 p_profile;
290 j_popAddressQueue;
291 }
292
293 transition({OS, OSS}, GETX, M) {
294 m_setOwnerRequestor;
295 p_profile;
296 j_popAddressQueue;
297 }
298
299 transition(OS, PUTX_Owner, S) {
300 x_setOwnerToDirectory;
301 r_writeDataFromRequest;
302 qw_queueMemoryWBRequest;
303 p_profile;
304 j_popAddressQueue;
305 }
306
307 transition(OSS, PUTX_Owner, SS) {
308 x_setOwnerToDirectory;
309 r_writeDataFromRequest;
310 qw_queueMemoryWBRequest;
311 p_profile;
312 j_popAddressQueue;
313 }
314
315 // Transitions from Modified
316 transition(M, {GETS,GET_INSTR}, OS) {
317 p_profile;
318 j_popAddressQueue;
319 }
320
321 transition(M, GETX) {
322 m_setOwnerRequestor;
323 p_profile;
324 j_popAddressQueue;
325 }
326
327 transition(M, PUTX_Owner, I) {
328 x_setOwnerToDirectory;
329 r_writeDataFromRequest;
330 qw_queueMemoryWBRequest;
331 p_profile;
332 j_popAddressQueue;
333 }
334
335 transition({C, I, S, SS, OS, OSS, M}, Memory_Data) {
336 d_sendDataMsg;
337 l_popMemQueue;
338 }
339
340 transition({C, I, S, SS, OS, OSS, M}, Memory_Ack) {
341 //a_sendAck;
342 l_popMemQueue;
343 }
344
345 }