src/mem/protocol/RubySlicc_Types.sm

   1 /*
   2  * Copyright (c) 1999-2005 Mark D. Hill and David A. Wood
   3  * All rights reserved.
   4  *
   5  * Redistribution and use in source and binary forms, with or without
   6  * modification, are permitted provided that the following conditions are
   7  * met: redistributions of source code must retain the above copyright
   8  * notice, this list of conditions and the following disclaimer;
   9  * redistributions in binary form must reproduce the above copyright
  10  * notice, this list of conditions and the following disclaimer in the
  11  * documentation and/or other materials provided with the distribution;
  12  * neither the name of the copyright holders nor the names of its
  13  * contributors may be used to endorse or promote products derived from
  14  * this software without specific prior written permission.
  15  *
  16  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  17  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  18  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  19  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  20  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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  22  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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  25  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  26  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  27  */
  28
  29 // External Types
  30
  31 //
  32 // **PLEASE NOTE!**  When adding objects to this file you must also add a line
  33 // in the src/mem/ruby/SConscript file.  Otherwise the external object's .hh
  34 // file will not be copied to the protocol directory and you will encounter a
  35 // undefined declaration error.
  36 //
  37
  38 external_type(MessageBuffer, buffer="yes", inport="yes", outport="yes");
  39 external_type(OutPort, primitive="yes");
  40
  41 structure(InPort, external = "yes", primitive="yes") {
  42   bool isReady();
  43   void dequeue();
  44   Time dequeue_getDelayCycles();
  45   void recycle();
  46   bool isEmpty();
  47 }
  48
  49 external_type(NodeID, default="0", primitive="yes");
  50 external_type(MachineID);
  51
  52 structure (Set, external = "yes", non_obj="yes") {
  53   void setSize(int);
  54   void add(NodeID);
  55   void addSet(Set);
  56   void remove(NodeID);
  57   void removeSet(Set);
  58   void broadcast();
  59   void addRandom();
  60   void clear();
  61   int count();
  62   bool isElement(NodeID);
  63   bool isEqual(Set);
  64   bool isSuperset(Set);
  65   bool intersectionIsEmpty(Set);
  66   NodeID smallestElement();
  67 }
  68
  69 structure (NetDest, external = "yes", non_obj="yes") {
  70   void setSize(int);
  71   void setSize(int, int);
  72   void add(NodeID);
  73   void add(MachineID);
  74   void addSet(Set);
  75   void addNetDest(NetDest);
  76   void setNetDest(MachineType, Set);
  77   void remove(NodeID);
  78   void remove(MachineID);
  79   void removeSet(Set);
  80   void removeNetDest(NetDest);
  81   void broadcast();
  82   void broadcast(MachineType);
  83   void addRandom();
  84   void clear();
  85   Set toSet();
  86   int count();
  87   bool isElement(NodeID);
  88   bool isElement(MachineID);
  89   bool isSuperset(Set);
  90   bool isSuperset(NetDest);
  91   bool isEmpty();
  92   bool intersectionIsEmpty(Set);
  93   bool intersectionIsEmpty(NetDest);
  94   MachineID smallestElement(MachineType);
  95 }
  96
  97 structure (Sequencer, external = "yes") {
  98   void readCallback(Address, DataBlock);
  99   void readCallback(Address, GenericMachineType, DataBlock);
 100   void readCallback(Address, GenericMachineType, DataBlock, Time, Time, Time);
 101   void writeCallback(Address, DataBlock);
 102   void writeCallback(Address, GenericMachineType, DataBlock);
 103   void writeCallback(Address, GenericMachineType, DataBlock, Time, Time, Time);
 104   void checkCoherence(Address);
 105   void profileNack(Address, int, int, uint64);
 106   void evictionCallback(Address);
 107   void recordRequestType(SequencerRequestType);
 108   bool checkResourceAvailable(CacheResourceType, Address);
 109 }
 110
 111 structure(RubyRequest, desc="...", interface="Message", external="yes") {
 112   Address LineAddress,       desc="Line address for this request";
 113   Address PhysicalAddress,   desc="Physical address for this request";
 114   RubyRequestType Type,      desc="Type of request (LD, ST, etc)";
 115   Address ProgramCounter,    desc="Program counter of the instruction that caused the miss";
 116   RubyAccessMode AccessMode, desc="user/supervisor access type";
 117   int Size,                  desc="size in bytes of access";
 118   PrefetchBit Prefetch,      desc="Is this a prefetch request";
 119   int contextId,             desc="this goes away but must be replace with Nilay";
 120 }
 121
 122 structure(AbstractEntry, primitive="yes", external = "yes") {
 123   void changePermission(AccessPermission);
 124 }
 125
 126 structure (DirectoryMemory, external = "yes") {
 127   AbstractEntry allocate(Address, AbstractEntry);
 128   AbstractEntry lookup(Address);
 129   bool isPresent(Address);
 130   void invalidateBlock(Address);
 131   void recordRequestType(DirectoryRequestType);
 132 }
 133
 134 structure(AbstractCacheEntry, primitive="yes", external = "yes") {
 135   void changePermission(AccessPermission);
 136 }
 137
 138 structure (CacheMemory, external = "yes") {
 139   bool cacheAvail(Address);
 140   Address cacheProbe(Address);
 141   AbstractCacheEntry allocate(Address, AbstractCacheEntry);
 142   void allocateVoid(Address, AbstractCacheEntry);
 143   void deallocate(Address);
 144   AbstractCacheEntry lookup(Address);
 145   bool isTagPresent(Address);
 146   void profileMiss(RubyRequest);
 147
 148   void profileGenericRequest(GenericRequestType,
 149                              RubyAccessMode,
 150                              PrefetchBit);
 151
 152   void setMRU(Address);
 153   void recordRequestType(CacheRequestType);
 154   bool checkResourceAvailable(CacheResourceType, Address);
 155 }
 156
 157 structure (WireBuffer, inport="yes", outport="yes", external = "yes") {
 158
 159 }
 160
 161 structure (MemoryControl, inport="yes", outport="yes", external = "yes") {
 162   void recordRequestType(CacheRequestType);
 163 }
 164
 165 structure (DMASequencer, external = "yes") {
 166   void ackCallback();
 167   void dataCallback(DataBlock);
 168   void recordRequestType(CacheRequestType);
 169 }
 170
 171 structure (TimerTable, inport="yes", external = "yes") {
 172   bool isReady();
 173   Address readyAddress();
 174   void set(Address, Cycles);
 175   void unset(Address);
 176   bool isSet(Address);
 177 }
 178
 179 structure (GenericBloomFilter, external = "yes") {
 180   void clear(int);
 181   void increment(Address, int);
 182   void decrement(Address, int);
 183   void set(Address, int);
 184   void unset(Address, int);
 185
 186   bool isSet(Address, int);
 187   int getCount(Address, int);
 188 }
 189
 190 structure (Prefetcher, external = "yes") {
 191     void observeMiss(Address, RubyRequestType);
 192     void observePfHit(Address);
 193     void observePfMiss(Address);
 194 }